KR20070064098A - Driving apparatus and liquid crystal display comprising the same - Google Patents

Abstract

A driving device and a liquid crystal display having the same are provided to require no additional voltage generating unit and to reduce fabrication cost and test time, by generating a driving voltage and a gate-on voltage through a built-in voltage generating unit. A driving voltage generating circuit converts a first voltage applied externally, into a second voltage. A driving voltage adjusting circuit(72) has a first transmission unit which is turned on by an external test signal and changes the total impedance. The driving voltage adjusting circuit changes the amplitude of the second voltage and thus controls the operation of the driving voltage generating circuit. A gate-on voltage generating circuit(73) generates a gate-on voltage on the basis of the second voltage. A gate-on voltage adjusting circuit(74) has a second transmission unit which is turned on by an external test signal and changes the total impedance. The gate-on voltage adjusting circuit changes the magnitude of the gate-on voltage and thus controls the operation of the gate-on voltage generating circuit.

Description

Driving apparatus and liquid crystal display including the same {Driving apparatus and liquid crystal display comprising the same}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a detailed circuit diagram of a driving voltage generator and a gate-on voltage generator according to an exemplary embodiment of the present invention.

4 is a detailed circuit diagram of the first transmission unit of FIG. 3.

(Explanation of symbols for the main parts of the drawing)

15, 25: first and second transmission unit

71: drive voltage generation circuit 72: drive voltage adjustment circuit

73: gate on voltage generation circuit 74: gate on voltage adjustment circuit

The present invention relates to a driving device and a liquid crystal display including the same, and more particularly, to a driving device capable of variably generating a high voltage used in a high voltage test and a liquid crystal display including the same.

A typical liquid crystal display includes two display panels including a pixel electrode and a common electrode, a liquid crystal layer having dielectric anisotropy interposed therebetween, and a gate signal composed of a gate on voltage and a gate off voltage. A gate driver to output the data driver, a data driver to output the data signal, and a voltage generator to generate a gate on voltage and a gate off voltage.

The pixel electrodes are arranged in a matrix and are connected to a switching element such as a thin film transistor (TFT). The switching element is turned on or off by the gate on voltage or gate off voltage from the gate driver. Therefore, when the gate driver sequentially applies the gate-on voltage to the switching elements connected to the pixel electrodes, the corresponding switching elements are turned on. As a result, the pixel electrodes receive the voltage of the data signal one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

The voltage and the common voltage of the data signal are applied to the pixel electrode and the common electrode, respectively, to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image.

Conventionally, while using a power board to apply the HVS, the driving voltage, gate on voltage, gate off voltages also had to be forced from the outside.

An object of the present invention is to provide a driving device capable of variably generating a high voltage used in a high voltage test.

Another object of the present invention is to provide a liquid crystal display device capable of variably generating a high voltage used in a high voltage test.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

The driving device according to an embodiment of the present invention for achieving the technical problem, the driving voltage generation circuit for outputting the second voltage of the second magnitude by converting the first voltage of the first magnitude applied from the outside, from the outside A first transmission unit receiving a test signal and being turned on to change the total impedance, and outputting a first feedback signal for controlling the operation of the driving voltage conversion circuit by changing the magnitude of the second voltage according to the change of the total impedance; A voltage adjustment circuit, a gate-on voltage generation circuit that generates a gate-on voltage applied to the switching element based on the second voltage, and a second transmission unit that is turned on by receiving an inspection signal from the outside and changes the total impedance, Controlling the operation of the gate-on voltage conversion circuit by changing the magnitude of the gate-on voltage in accordance with the change of the impedance And a driving device including a gate-on voltage adjusting circuit for outputting a second feedback signal.

According to another exemplary embodiment of the present invention, a liquid crystal display includes a plurality of pixels including a plurality of switching elements and a plurality of pixel electrodes connected to the switching elements, and a second size by converting a first voltage having a first magnitude applied from the outside. A driving voltage generation circuit that outputs a second voltage of the first voltage; and a first transmission unit which is turned on to receive a test signal from the outside to change the total impedance, and changes the magnitude of the second voltage according to the change of the total impedance to drive voltage A driving voltage adjusting circuit for outputting a first feedback signal for controlling the operation of the conversion circuit, a gate-on voltage generating circuit for generating a gate-on voltage applied to the switching element based on the second voltage, and receiving an inspection signal from the outside A second transmission unit is turned on to change the total impedance, the magnitude of the gate-on voltage according to the change of the total impedance And a liquid crystal display including a plurality of pixels electrically connected to the gate-on voltage adjusting circuit for outputting a second feedback signal for controlling the operation of the gate-on voltage converting circuit.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, and only the embodiments make the disclosure of the present invention complete, and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings. 1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the liquid crystal display device 10 according to an exemplary embodiment of the present invention may include a liquid crystal display module 300, a gate driver 400, a data driver 500, and a gate driver connected to the liquid crystal display module 300. A signal controller 600 controlling the 400 and the data driver 500, a voltage generator 700 connected to the gate driver 400, and a gray voltage generator 800 connected to the data driver 500 are included. The external inspection device 900 is further included here.

The liquid crystal display module 300 is connected to the plurality of signal lines G1 -Gn and D1 -Dm and includes a plurality of pixels PX arranged in a substantially matrix form.

The signal lines G1 -Gn and D1 -Dm include a plurality of gate lines G1 -Gn for transmitting a scan signal and a plurality of data lines D1 -Dm for transmitting a data signal. The gate lines G1 -Gn extend substantially in the row direction and are substantially parallel to each other, and the data lines D1 -Dm extend substantially in the column direction and are substantially parallel to each other.

The gate driver 400 is connected to the gate lines G1 -Gn of the liquid crystal display module 300 to drive the driving voltage AVDD and the gate-on voltage generator from the driving voltage generator 721 of the voltage generator 700. A gate signal composed of a combination of the gate-on voltage Von from 722 and the gate-off voltage Voff from the gate-off voltage generator 723 is applied to the gate lines G1 -Gn.

The data driver 500 is connected to the data lines D1-Dm of the liquid crystal display module 300, and selects a gray voltage from the gray voltage generator 800 and uses the data lines D1 -Dm as data signals. To apply. However, when the gray voltage generator 800 provides only a predetermined number of reference gray voltages instead of providing all of the voltages for all grays, the data driver 500 divides the reference gray voltages to divide the gray voltages for all grays. Generate and select the data signal from it. In this case, the data driver 500 receives the driving voltage AVDD from the driving voltage generator 721 of the voltage generator 700, and generates a gray voltage based on the driving voltage AVDD.

The data driver 500 receives the digital image signal DAT for one row of pixels PX according to the data control signal CONT2 from the signal controller 600, and corresponds to each digital image signal DAT. By selecting the gray scale voltage, the digital image signal DAT is converted into an analog data signal and then applied to the data lines D1 -Dm.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like. The signal controller 600 receives the input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE. The signal controller 600 properly processes the input image signals R, G, and B according to the operating conditions of the liquid crystal display module 300 based on the input image signals R, G, and B and the input control signal. After generating the control signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver. Export to 500.

The gate control signal CONT1 includes a scan start signal indicating the start of scanning and at least one clock signal controlling the output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal that defines a duration of the gate-on voltage Von. The data control signal CONT2 includes a horizontal synchronizing start signal indicating the start of the transmission of the image signal for one row of pixels PX and a load signal data clock signal for applying a data signal to the data lines D1 -Dm. The data control signal CONT2 may further include an inversion signal for inverting the voltage polarity of the data signal with respect to the common voltage Vcom.

The voltage generator 700 converts an input voltage Vin, which is a direct current applied from the outside, to generate a driving voltage AVDD having a desired magnitude, a gate on voltage Von, and a gate off voltage Voff. The voltage generator 700 may include a driving voltage generator 721 that generates a driving voltage AVDD, a gate-on voltage generator 722 that is connected to the driving voltage generator 721 and generates a gate voltage (Von). And a gate off voltage generator 723 for generating a gate off voltage Voff. The driving voltage generator 721 and the gate-on voltage generator 722 will be described later with reference to FIGS. 3 and 4.

The gray voltage unit 800 receives the driving voltage AVDD from the driving voltage generator 721 of the voltage generator 700, and based on the driving voltage AVDD, the gray voltage unit 800 is connected to the transmittance of the pixel PX. Generates a set of gradation voltages (or reference gradation voltage sets). One of the two sets has a positive value for the common voltage Vcom and the other set has a negative value.

Each of the driving devices 400, 500, 600, 700, and 800 may be mounted directly on the liquid crystal display module 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal display module 300 in the form of a tape carrier package (TCP), or may be mounted on a separate printed circuit board (not shown). Alternatively, the driving devices 400, 500, 600, 700, and 800 may be integrated in the liquid crystal display module 300 along with the signal lines G1 -Gn, D1-Dm, and the thin film transistor switching element Q. . In addition, the driving devices 400, 500, 600, 700, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

The inspection apparatus 900 is connected to the liquid crystal display device 10 through a connector (not shown) as external equipment. An image signal, a driving voltage, a control signal, and the like required for the inspection operation of the liquid crystal display device 10 are provided to the liquid crystal display device 10 through the connector 900 through the connector 900.

In addition, the inspection apparatus 900 performs the driving voltage AVDD and the gate on voltage Von output from the driving voltage generator 721 and the gate-on voltage generator 722 of the voltage generator 700 for the HVS inspection. ) Is provided to the liquid crystal display device 10 through a connector (not shown) for increasing the size of the? In FIG. 1, the test signal TS is provided from the test apparatus 900, but may be provided from another separate device. Accordingly, the liquid crystal display device 10 operates according to an image signal, a driving voltage, a control signal, and the like provided from the inspection device 900.

2 is a circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 2, one pixel PX includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 150 interposed therebetween.

The upper panel 100 refers to a color filter substrate, and includes a color filter 230, a black matkix, a common electrode 270, an alignment layer, and the like. The lower panel 200 refers to a TFT-Array substrate and includes a switching element Q, a pixel electrode 191, and the like. The liquid crystal layer 150 includes a spacer and a liquid crystal to maintain a gap between the two substrates.

One pixel PX, for example, the i-th (i = 1, 2, ..., n) gate line Gi and the j-th (j = 1, 2, ..., m) data line Dj The pixel PX connected to includes a switching element Q connected to the signal lines Gi and Dj, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100. The control terminal is connected to the gate line Gi, and the input terminal is connected to the data line Dj. The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 150 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage. Unlike in FIG. 2, the common electrode 270 may be provided on the lower panel 100.

The storage capacitor Cst plays an auxiliary role of the liquid crystal capacitor Clc, and a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 overlap each other with an insulator interposed therebetween. A predetermined voltage such as a common voltage is applied to a separate signal line (not shown) provided in the lower panel 100. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line directly above the insulator.

The gate driver applies the gate-on voltage from the gate-on voltage generator to the gate line Gi in response to the gate control signal from the signal controller to turn on the switching element Q connected to the gate line Gi. Then, the data signal applied to the data line Dj is applied to the pixel PX through the switching element Q turned on.

The difference between the voltage of the data signal applied to the pixel PX and the common voltage is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies according to the size of the pixel voltage, and thus the polarization of light passing through the liquid crystal layer 150 is changed. This change in polarization is represented by a change in the transmittance of light by the polarizer attached to the liquid crystal display module 300.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), and in turn, for all the gate lines Gi. The image signal of one frame is displayed by applying a data signal to all the pixels PX by applying a gate-on voltage.

When one frame ends, the next frame starts and the state of the inversion signal applied to the data driver is controlled so that the polarity of the data signal applied to each pixel PX is opposite to that in the previous frame ("frame inversion"). In this case, the polarity of the data signal flowing through one data line may be changed (eg, row inversion and point inversion) or a polarity of the data signal applied to one pixel row may be different depending on the characteristics of the inversion signal within one frame. (Example: Invert Column, Invert Point).

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100. One or more polarizers (not shown) for polarizing light are attached to the outer surface of the liquid crystal display module 300.

3 is a circuit diagram of a driving voltage generator and a gate-on voltage generator according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the driving voltage generator 721 includes a driving voltage AVDD generation circuit 71 and a driving voltage adjustment circuit 72 connected to the driving voltage generation circuit 71.

The driving voltage generation circuit 71 converts a first voltage having a first magnitude applied from the outside to output a second voltage having a second magnitude. The driving voltage generation circuit 71 may be a boost converter.

The driving voltage generation circuit 71 is connected between the inductor L11 to which the input voltage Vin which is a direct current is applied, the diode D11 connected to the inductor L11 in the forward direction, the diode D11 and the ground, and the driving voltage AVDD. Is applied to the capacitor C11 for outputting the oscillator C11, the oscillator 11 for generating a pulse signal having the same pulse width and period, and the first feedback signal VFB1 from the oscillator 11 and the driving voltage adjusting circuit 72. It includes a switching controller 12 for applying a signal for the initial driving, the switching controller 12 and the switching unit 13 connected to the anode terminal of the diode (D11). In this case, the switching unit 13 includes a switching element such as a transistor whose turn-on and turn-off states are changed in accordance with a control signal from the switching control unit 12.

The driving voltage adjusting circuit 72 includes a resistor R11 connected to the capacitor C11 of the driving voltage generating circuit 71, a resistor R12 connected between the resistor R11 and the ground, a resistor R11, and a variable resistor R15. ) Is connected to the first transmission unit 15 and the resistance (R15) connected to the first transmission unit 15 is turned on by receiving the test signal (TS) from the outside to change the total impedance. The driving voltage adjusting circuit 72 changes the magnitude of the second voltage according to the change of the total impedance to output the first feedback signal.

The gate-on voltage generator 722 includes a gate-on voltage generator circuit 73 and a gate-on voltage regulator circuit 74 connected to the gate-on voltage generator circuit 73.

The gate on voltage generation circuit 73 generates a gate on voltage applied to the switching element.

The gate-on voltage generation circuit 73 is connected between the diodes D21 and D22 and the diodes D21 and D22 in a forward direction with a driving voltage AVDD applied from the driving voltage generation unit 721 and a pulse signal from the outside. Is connected between the emitter terminal and the base terminal of transistor Cr21 and transistor Tr21 for outputting the gate-on voltage Von to the collector terminal and the capacitor C21 and diode D22. The signal generator 21 is connected to the resistor R21 and the base terminal of the transistor Tr21.

Here, the signal generator 21 may be a clamp circuit. Diodes D21 and D22 and capacitor C21 function as level shifters.

The pulse signal applied to the capacitor C21 may be generated and applied by the signal controller or may be applied from the outside through a separate oscillator.

The gate-on voltage adjusting circuit 74 changes the magnitude of the gate-on voltage according to the change of the total impedance to output the second feedback signal.

The gate-on voltage adjusting circuit 74 includes a resistor R22 connected to the collector terminal of the transistor Tr21 of the gate-on voltage generating circuit 73, a resistor R23 connected between the resistor R22 and the ground, and a resistor R23. ) And the variable resistor R25 connected to the variable resistor R25 and the test signal TS applied from the outside, the variable resistor R25 connected to the second transmission unit 25, and the resistor R22. Drain and gate terminals are connected to the output terminal of the operational amplifier OP and OP amplifier to which the inverting terminal (+) is applied and the reference voltage Vref is applied to the inverting terminal (-), and the source terminal is grounded. Transistor Tr23, a gate terminal of which is connected to the gate terminal of the transistor Tr23, and a drain terminal of which is connected to the base terminal of the transistor Tr21 of the gate-on voltage generation circuit 73 and the source terminal of which is grounded (Tr24). The transistors Tr23 and Tr24 function as current mirror circuits.

4 is a detailed circuit diagram of the first transmission unit of FIG. 3.

Referring to FIG. 4, the transmission units 15 and 25 are composed of a transmission gate 16, an inverter 18, and a buffer 19.

The transmission gate 16 is connected to each of the divided resistors R11 and R12, R21 and R22, the variable resistors R13 and R15, the buffer 19, and the inverter 18. The outputs of the buffer 19 and the inverter 18 are connected to the transmission gate 16, and the inputs of the buffer 19 and the inverter 18 are connected to a test device for applying a test signal.

Hereinafter, an operation of the driving voltage generator 721 of the voltage generator 700 generating the driving voltage AVDD will be described in detail with reference to FIGS. 3 and 4.

In the oscillation unit 11, a pulse signal having a predetermined pulse width and period is provided to the switching controller 12, and the switching controller 12 provides a switching control signal for initial driving to the switching unit 13. In this case, the switching control signal may be a pulse width modulation (PWM) signal.

The switching controller 12 adjusts the duty ratio of the oscillation signal from the oscillator 11 based on the first feedback signal VFB1 to change the turn-on and turn-off states of the switching unit 13. By this feedback control, a drive voltage AVDD having a constant magnitude is output.

The switching unit 13 is turned on and off at regular intervals according to the switching control signal.

When the switching unit 13 is turned on, the current gradually increases with a slope proportional to the voltage applied across the inductor L11. At this time, the driving voltage AVDD is outputted with the charging voltage of the capacitor C11. When the switching unit 13 is turned off, the current of the inductor L11 flows through the diode D11. For this reason, the voltage of the magnitude | size boosted by the constant voltage is output as drive voltage AVDD, charging the capacitor C11.

In this way, by the operation of the switching unit 13 which repeats the turn-on and turn-off operations for a predetermined period, the input voltage Vin is outputted as a voltage AVDD boosted by a desired magnitude. The input voltage Vin may be about 5V and the driving voltage AVDD may be about 17.5V.

The driving voltage AVDD output through this operation is applied to the driving voltage adjusting circuit 72. At this time, since the test signal TS is not applied from the outside, the first transmission unit 15 is turned off. Therefore, the driving voltage AVDD is divided by a voltage having a corresponding magnitude by the resistors R11 and R12 acting as a voltage divider, and then, as the first feedback signal VFB1, the driving voltage AVDD is applied to the switching controller 12 of the driving voltage generation circuit 71. Is approved.

The driving voltage AVDD from the driving voltage generator 721 is applied to the gate-on voltage generator circuit 73 of the gate-on voltage generator 722.

The driving voltage AVDD is gradually increased by the voltage level of the pulse signal applied by the rectifying operation of the diodes D21 and D22 and the charging operation of the capacitor C21 to be a voltage having a desired size. At this time, a current applied from the signal generator 21 is applied to the base terminal of the transistor Tr21, and a voltage applied between the base terminal and the emitter terminal of the transistor Tr21 is generated by the resistor R21. It is always above the threshold voltage so it is always on. Accordingly, the voltage boosted by the diodes D21 and D22 and the capacitor C21 is generated through the turned-on transistor Tr21 to, for example, a gate-on voltage Von of about + 17.5V to + 32V.

This gate-on voltage Von is applied to the gate-on voltage adjusting circuit 74. At this time, since the test signal TS is not applied from the outside, the second transmission unit 25 is turned off. Therefore, the gate-on voltage AVDD is divided by a voltage having a corresponding magnitude by the resistors R22 and R23 acting as a voltage divider, and then, as the second feedback signal VFB2, to the non-inverting terminal (+) of the operational amplifier OP. Is approved.

The operational amplifier OP outputs a voltage having a corresponding magnitude based on the voltage applied to the non-inverting terminal + and the reference voltage Vref applied to the inverting terminal +, and based on the output voltage of the operational amplifier OP. The current flowing through the transistors Tr23 and Tr24, which are current mirror circuits, is varied. The amount of current applied from the signal generator 21 to the base terminal of the transistor Tr21 changes according to the change in the amount of current flowing through the current mirror circuit. As a result, the output size of the gate-on voltage Von is adjusted to be feedback-controlled so that a constant gate-on voltage Von is output.

A high voltage stress (HVS) test of the liquid crystal display 10 will be described with reference to FIGS. 3 and 4.

3 and 4, the test signal TS from the connector (not shown) includes the driving voltage adjusting circuit 72 of the driving voltage generator 721 and the gate on voltage of the gate on voltage generator 722. Provided to the regulation circuit 74 to turn on the gates of the first and second transmission parts 15 and 25, respectively. As a result, a part of the current flowing to the ground through each of the divided resistors R11 and R12, R22 and R23 flows through the turned-on first and second transmission units 15 and 25 and the variable resistors R13 and R23. do.

When the test signal TS is not provided, the first and second feedback signals VFB1 and VFB2 are output according to the total impedance determined by only the divided resistors R11 and R12, R21 and R22.

However, when the test signal TS is provided, the input of the high level through the buffer 19 and the inverter 18 turns on the transmission gate 16 to turn on the respective divided resistors R11 and R12, R21 and R22 and the variable resistor. Connect (R13, R23). As a result, the impedances defined by the first and second transmissions 15 and 25 and the variable resistors R13 and R23 affect the impedances defined by the divided resistors R11 and R12, R21 and R22. That is, the total impedance is reduced by turning on the transmission gates 16 of the first and second transmission units 15 and 25. Therefore, the magnitudes of the output first and second feedback signals VFB1 and VFB2 are reduced by the amount corresponding to the reduced impedance.

Therefore, the switching control unit 12 increases the duty ratio of the control signal applied to the switching unit 13 by the first feedback signal VFB1 reduced based on the impedance change, and thus the magnitude of the driving voltage AVDD output. Is larger than the rated voltage, i.e. for HVS inspection.

In the case of using the first and second transmissions 15 and 25, not only the instantaneous inrush current is generated in the circuit, but also a stable operation is possible even if a voltage of 5V or more is applied to the test signal because it is not sensitive to the applied voltage. do.

In addition, the gate-on voltage generator 722 also increases the gate-on voltage Von output by the second feedback signal VFB2 reduced based on the impedance change by more than the rated voltage. In detail, the output voltage of the operational amplifier OP decreases due to the reduced second feedback signal VFB2. As a result, the voltage applied to the control terminal of the transistor Tr23 decreases so that the current flowing through the transistor Tr23 decreases, and the current flowing through the transistor Tr24 becomes the same as the current flowing through the transistor Tr23 due to the characteristics of the current mirror circuit. . Therefore, the current applied from the signal generator 21 to the base terminal of the transistor Tr21 increases by the decrease of the current flowing through the transistor Tr24. As a result, the amount of current flowing from the emitter terminal of the transistor Tr21 to the collector terminal increases, and the gate-on voltage Von increases above the rated voltage.

When the HVS inspection driving voltage AVDD and the gate on voltage Von are applied due to the provision of the inspection signal TS, the inspector inspects the operation of the liquid crystal display 10 and, if necessary, The operating state of the liquid crystal display device 10 is inspected while the temperature and the like are changed. For example, the wiring state for transmitting the data voltage and the gate signal, the charging capability of the pixel, and the like are examined.

When the HVS test is finished, the supply of the test image signal, the driving voltage, the test signal TS, and the like applied to the liquid crystal display device 10 through the connector (not shown) is stopped. Accordingly, the first and second transmission gates 15 and 25 of the driving voltage adjusting circuit 72 and the gate-on voltage adjusting circuit 74 are turned off to drive voltage AVDD having a magnitude of a normal rated voltage. ) And gate-on voltage (Von) can be generated.

As such, after the operation of the built-in voltage generator is stopped, the driving voltage AVDD and the gate-on voltage Von of a desired magnitude are forcibly applied to the liquid crystal display through a connector (not shown) using a voltage generator separately installed externally. The HVS test is performed using the built-in voltage generator without the need to apply). This eliminates the need to design and install a separate voltage generator, reducing manufacturing costs and inspection time. In addition, during the test, the process of connecting the voltage generator and the connector (not shown) is omitted, thereby reducing the test time.

In the present embodiment, only the case where the magnitudes of the driving voltage AVDD and the gate-on voltage Von are changed for the HVS inspection operation is described. In addition, it can be applied to various other cases such as changing the magnitude of the output voltage as well as the inspection operation. In addition, the present invention can be applied not only to a liquid crystal display but also to other circuits.

According to the driving device of the present invention as described above and the liquid crystal display including the same, there are one or more of the following effects.

First, the manufacturing cost is reduced because a separate voltage generator is not required for the test operation, and the connection time between the voltage generator and the display device is unnecessary, thereby reducing test time and improving productivity.

Second, since only the test signal and the ground voltage need to be applied to the liquid crystal display without applying all necessary voltages at the time of inspection, the structure of the connector for transmitting these signals to the liquid crystal display is simplified, and the overall structure of the liquid crystal display is provided. It is also simplified.

Third, the instantaneous inrush current does not occur when the first and second transmission units are used, and even if a voltage of 5V or more is applied to the test signal, it does not respond sensitively to the applied voltage, so it can be stably operated and applied to mass production. have.

Claims (11)

A driving voltage generation circuit converting a first voltage having a first magnitude applied from the outside and outputting a second voltage having a second magnitude; A first transmission unit configured to receive a test signal from an external device and to be turned on to change a total impedance, and to control an operation of the driving voltage generation circuit by changing a magnitude of a second voltage according to the change of the total impedance A driving voltage adjusting circuit for outputting a signal; A gate on voltage generation circuit configured to generate a gate on voltage applied to the switching element based on the second voltage; And And a second transmission unit which is turned on by receiving the test signal from the outside and changes the total impedance, and controls the operation of the gate-on voltage conversion circuit by changing the magnitude of the gate-on voltage according to the change of the total impedance. And a gate on voltage adjusting circuit for outputting a second feedback signal. According to claim 1, And the drive voltage generation circuit is a boost converter. The driving voltage adjusting circuit of claim 1, wherein the driving voltage adjusting circuit includes: A voltage divider for dividing the second voltage and outputting the divided voltage as the first feedback signal; A first transmission unit connected to the voltage divider and to which the test signal is applied; And And a resistor connected to the first transmission part. The circuit of claim 1, wherein the gate-on voltage generation circuit A level shifter for increasing the magnitude of the second voltage; A second switching element connected to the level shifter and outputting the gate on voltage; A resistor connected between the first terminal and the control terminal of the second switching element; And And a signal generator for outputting a control signal to the control terminal of the second switching element. The circuit of claim 1, wherein the gate-on voltage adjustment circuit is A voltage divider for dividing the gate-on voltage to output the second feedback signal; A second transmission unit connected to the voltage divider and to which the test signal is applied; A resistor connected to the second transmission unit; An operational amplifier to which the second feedback signal and a reference voltage are applied; And And a current mirror unit connected to a second terminal of the operational amplifier and a control terminal of the second switching element. A plurality of pixels having a plurality of switching elements and a plurality of pixel electrodes connected to the switching elements; A driving voltage generation circuit converting a first voltage having a first magnitude applied from the outside and outputting a second voltage having a second magnitude; A first transmission unit configured to receive a test signal from an external device and to be turned on to change a total impedance, and to control an operation of the driving voltage conversion circuit by changing a magnitude of a second voltage according to the change of the total impedance A driving voltage adjusting circuit for outputting a signal; A gate on voltage generation circuit configured to generate a gate on voltage applied to the switching element based on the second voltage; And A second transmission unit which is turned on by receiving an inspection signal from an external device and changes a total impedance, and a second controlling the operation of the gate-on voltage conversion circuit by changing a magnitude of a gate-on voltage according to the change of the total impedance A liquid crystal display device comprising a plurality of pixels electrically connected to a gate-on voltage adjusting circuit for outputting a feedback signal. The method of claim 6, And the driving voltage generation circuit is a boost converter. The driving voltage adjusting circuit of claim 6, wherein the driving voltage adjusting circuit includes: A voltage divider for dividing the second voltage and outputting the divided voltage as the first feedback signal; A first transmission unit connected to the voltage divider and to which the test signal is applied; And And a resistor connected to the first transmission unit. The circuit of claim 6, wherein the gate-on voltage generation circuit A level shifter for increasing the magnitude of the second voltage; A second switching element connected to the level shifter and outputting the gate on voltage; A resistor connected between the input terminal and the control terminal of the second switching element; And And a signal generator for outputting a control signal to the control terminal of the second switching element. 7. The circuit of claim 6, wherein the gate-on voltage adjustment circuit is A voltage divider for dividing the gate-on voltage to output the second feedback signal; A second transmission unit connected to the voltage divider and to which the test signal is applied; A resistor connected to the second transmission unit; An operational amplifier to which the second feedback signal and a reference voltage are applied; And And a current mirror unit connected to a second terminal of the operational amplifier and a control terminal of the second switching element. The method of claim 6, The test signal is a signal for testing a high voltage stress (HVS).

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