KR20080004898A - Array substrate of transflective type fringe field switching mode liquid crystal display and the method thereof - Google Patents

Abstract

An array substrate of a transflective type fringe field switching mode liquid crystal display and its fabrication method are provided to increase an aperture ratio as well as obtain stability by removing a high temperature process. A glass substrate(51) includes gate lines and data lines which vertically cross each other and pixel areas defined by the lines and divided into a TFT(Thin Film Transistor) region, a reflective region(R) and a transmissive region(T). A TFT(61) is formed at the TFT region and includes a gate electrode(52), an active pattern(54) and source and drain electrodes(60). A resin film(55) is formed at the reflective region(R) and the transmissive region(T) and has an irregular surface at the reflective region(R). A reflective electrode(59) is formed on the resin film(55) and integrally formed with the source and drain electrodes(60). A pixel electrode(62) made of a transparent metal is formed on the resin film(55) at the transmissive region(T) and electrically connected with the reflective electrode(59). A protection layer(63) is formed on the entire surface of the substrate(51) including the TFT(61), the reflective electrode(59) and the pixel electrode(62) at a low temperature process. A slit type common electrode(64) is formed on the protection layer(63) at the reflective region(R) and the transmissive region(T).

Description

Array substrate of transflective fringe field switching mode liquid crystal display device and manufacturing method thereof

1 is a cross-sectional view showing an array substrate of a conventional transflective FFS (Fringe Field Switching) mode LCD.

Figures 2a to 2g is a cross-sectional view for each process for explaining a method for manufacturing an array substrate of a transflective FFS mode LCD according to an embodiment of the present invention.

3 is a plan view corresponding to FIG. 2G;

4 is a plan view illustrating the common electrode of FIG. 3.

Explanation of symbols on the main parts of the drawings

51: glass substrate 52: gate electrode

53: gate insulating film 54: active pattern

55: resin film

55a: resin film with irregularities

56: bottom-Mo film 57: Al film

58: top-Mo film 59: reflective electrode

60: source / drain electrode 61: thin film transistor

62: pixel electrode 63: protective film

64: slit type common electrode

70: gate line 71: data line

100: photosensitive layer

The present invention relates to a method of manufacturing a transflective liquid crystal display device, and more particularly, to an array substrate of a transflective fringe field switching mode (FFS) liquid crystal display device which can obtain a high reflectance using a resin.

The liquid crystal display may be classified into two types: a transmissive liquid crystal display using a backlight as a light source and a reflective liquid crystal display using natural light as a light source.

Since the transmissive liquid crystal display uses a backlight as a light source, it can implement a bright image even in a dark environment, but has a disadvantage in that power consumption is high by using a backlight. On the other hand, the reflective liquid crystal display device does not use a backlight, so the power consumption is small, but the disadvantage is that it is impossible to use when the environment is dark.

Therefore, a semi-transmissive liquid crystal display device has been proposed to solve the above problems. Since the transflective liquid crystal display device can use both a reflection type and a transmissive type as needed, it has a relatively low power consumption and can be used even in a dark environment.

1 is a cross-sectional view illustrating an array substrate of a conventional transflective fringe field switching mode liquid crystal display device (hereinafter referred to as a FFS mode LCD).

First, a gate line including a gate electrode 2 on a thin film transistor TFT region of a glass substrate 1 partitioned into a thin film transistor region TFT, a transmissive region T, and a reflective region R. The common electrode line 2a and the embossed pattern 2b are formed on the reflective region R. Then, the gate insulating film 3 is deposited to cover the gate electrode 2, the common electrode line 2a, and the embossing pattern 2b, and then an undoped amorphous silicon (hereinafter, referred to as a-Si) film and a doping The amorphous silicon (n + a-Si) film is sequentially deposited, and then the n + a-Si film and the a-Si film are patterned to form an active layer 4 on the gate electrode.

Next, a data line (not shown) including source / drain electrodes 8a and 8b is formed on the active layer 4. Next, an organic insulating film 6 having a via hole 9 exposing the common electrode line 2a of the reflective region R is formed on the entire area of the substrate. Then, after forming the common electrode 17 of the ITO material on the organic insulating film 6 of the transmission region (T) and the reflection region (R), the reflection on the common electrode (17) of the reflection region (R) The electrode 11 is formed.

Subsequently, after the protective film 12 is deposited on the entire region of the substrate, the protective film 12 and the organic insulating film 6 are etched to form the via holes 13 exposing the source / drain electrodes 8a and 8b. do. Subsequently, a pixel electrode 15 of ITO material in contact with the source / drain electrodes 8a and 8b is formed on the passivation layer 12, thereby completing the array substrate of the transflective FFS mode liquid crystal display device.

As described above, the transflective FFS mode LCD forms the common electrode and the pixel electrode with a transparent metal such as ITO to increase the aperture ratio and transmittance as compared with the in-plane switching liquid crystal display (LCD). By forming a gap between the electrode and the pixel electrode smaller than the gap between the substrates, a fringe field is formed between the common electrode and the pixel electrode so that all liquid crystal molecules present on the electrodes are operated. Better transmittance is obtained.

The common electrode is formed in a plate type, the pixel electrode is formed in a slit type, and an electric field is formed between the common electrode and the pixel electrode in a direction perpendicular to the cross section of the formed electrode. By this, liquid crystal molecules in the pixel are controlled.

On the other hand, in the conventional transflective FFS mode liquid crystal display, a technique for embossing, ie, forming irregularities on the surface of the reflective film has been proposed in order to improve the luminance in the reflective mode. In this way, when the irregularities are formed, the specular reflection efficiency of reflecting the incident light as it is can be reduced, while the diffuse reflection can be increased, thereby improving the luminance of the reflection mode.

Here, the unevenness may be formed by using a resin, in general, without using a metal pattern as shown. The method using the resin is that the resin flows down by heat to form an uneven round shape overall, and has the advantage of increasing the diffuse reflection efficiency of light.

However, when the protective film is formed by the high temperature process during the subsequent protective film formation, the resin is affected by the material properties of the resin itself, so that shape deformation occurs, and it is difficult to form irregularities using the resin when the high temperature process is performed by the subsequent process. Therefore, a protective film should be formed by a low temperature (about 230 ° C. or lower) process.

On the other hand, when the protective film is formed by a low temperature process, the size of the via hole is very difficult to be controlled by the etch rate during etching of the protective film to form the via hole. Although the size of the via hole is controlled, the size of the via hole is large, resulting in a reduction in the opening area.

As shown in FIG. 1, an embossing pattern, i.e., an unevenness, is formed in the metal pattern, which is advantageous in terms of stabilization of subsequent processes as compared with the case of using a resin. Since the surface curvature is not constant, a large amount of flat surfaces exist between the uneven surface and the uneven surfaces, so that the glare is severe and the reflectance is low.

Accordingly, the present invention has been made to solve the conventional problems as described above, semi-transmissive type that can increase the aperture ratio as well as to improve the stability of the process by removing the high temperature process while forming irregularities using the resin An object of the present invention is to provide an array substrate of an FFS mode liquid crystal display device.

In order to achieve the above object, the present invention is a glass substrate formed by vertically intersecting a gate line and a data line, the pixel region defined by the lines divided into a thin film transistor region, a reflection region and a transmission region; A thin film transistor formed in the thin film transistor region, the thin film transistor including a gate electrode, an active pattern, and a source / drain electrode; A resin film formed in the reflection region and the transmission region, the surface of the portion formed in the reflection region having irregularities; A reflective electrode formed on the resin film in the reflective region and integral with the source / drain electrode; A transparent metal pixel electrode formed on the resin film of the transmission region and electrically connected to the reflective electrode; A protective film formed on a front surface of the substrate including the thin film transistor, the reflective electrode, and the pixel electrode by a low temperature process; And a slit type common electrode formed on the passivation layer of the reflective and transmissive regions.

Here, the source / drain electrodes may be formed of a three-layer film including a bottom-Mo film, an Al film, and a top-Mo film.

The reflective electrode is characterized by consisting of a laminated film of Mo film and Al.

The pixel electrode is in contact with the lower portion or the upper portion of the reflective electrode is characterized in that it is electrically connected.

In addition, the present invention includes forming a gate electrode disposed in the thin film transistor region on the glass substrate partitioned into a thin film transistor region, a reflection region and a transmission region, and connected to a gate line; Forming a gate insulating film on an entire surface of the substrate to cover the gate line and the gate electrode; Forming an active pattern including an amorphous silicon film and a doped amorphous silicon film on the gate insulating film of the thin film transistor region; Forming a resin film having irregularities on the gate insulating films of the reflective and transmissive regions; Forming a source / drain electrode connected to a data line on the active pattern of the thin film transistor region and simultaneously forming a reflective electrode on the resin layer of the reflective region; Forming a pixel electrode on the resin film of the transmission area to be electrically connected to the source / drain electrode through the reflective electrode; Forming a protective film on the entire surface of the substrate including the source / drain electrodes, the reflective electrode, and the pixel electrode by a low temperature process; And forming a slit type common electrode on the passivation layer of the reflective region and the transmissive region, and including an array substrate for a transflective fringe field switching mode liquid crystal display device.

Here, the step of forming a resin film having a concave-convex shape on the gate insulating film of the reflective region and the transmissive region may include: applying a resin on the entire surface of the substrate including the active pattern; And applying a halftone mask to the resin to form the reflective and transmissive regions, and patterning the resin to have irregularities in the reflective region.

In the forming of the source / drain electrodes and simultaneously forming the reflective electrodes on the resin film of the reflective region, a bottom-Mo film, an Al film, and a top-Mo film are sequentially formed on the entire surface of the substrate including the active pattern and the resin film. Depositing; Applying a halftone exposure process on the top-Mo film to form a photosensitive layer having a thickness thinner than a portion covering the source / drain electrodes of the thin film transistor region; Etching the top-Mo film, the Al film, and the bottom-Mo film of the channel portion between the transmission region and the source / drain electrodes by using the photosensitive layer as an etching mask; Ashing the photosensitive layer formed in the reflective region with respect to the photosensitive layer to be removed; The top-Mo film of the reflective region and the doped amorphous silicon film of the channel portion are etched using the ashed photosensitive layer as an etch mask to form a source / drain electrode on the active pattern of the thin film transistor region. Forming a reflective electrode on the resin film in the reflective region; And removing the ashed photosensitive layer.

Forming the protective film by the low temperature process, characterized in that carried out at a low temperature of room temperature ~ 230 ℃.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, the technical characteristics of the semi-transmissive FFS mode LCD according to the present invention, by forming irregularities with the resin to increase the diffuse reflection efficiency, to form a protective film in a low temperature process to remove the high temperature process in the resin subsequent process, formed by a low temperature process In order to solve the via hole size control, which is a problem of the passivation layer, the source and drain electrodes and the reflective electrode are simultaneously formed while inverting the upper and lower positions of the common electrode and the pixel electrode. Direct contact with the reflective electrode integrally formed with the electrode eliminates the via hole formation in the pixel region.

Therefore, the via hole is not required in the pixel area, thereby solving the problem of size control of the via hole for the protective film of the low temperature process, which has been a problem in the conventional transflective FFS mode LCD, and the via ratio is increased because no via hole is formed in the pixel area. It can bring the effect.

In addition, the present invention can prevent the problems caused by the electric field due to the thick thickness of the conventional resin film by forming a resin film for forming the unevenness in the lower portion of the common electrode and the pixel electrode can improve the driving ability of the liquid crystal. .

2A to 2G are cross-sectional views illustrating a method of manufacturing an array substrate of a transflective FFS mode liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 2A, a gate metal film is deposited on a glass substrate 51 in which a pixel region is divided into a thin film transistor region TFT, a reflective region R, and a transmission region T. The gate metal layer is etched using the first mask on the gate electrode 52 to form a gate electrode 52 connected to a gate line (not shown) in the thin film transistor region TFT.

Referring to FIG. 2B, a gate insulating film 53, an amorphous silicon film, and a doped amorphous silicon film are sequentially deposited on the entire surface of the glass substrate 51 to cover the gate line including the gate electrode 52, and then the doping is performed. The doped amorphous silicon film and the amorphous silicon film are etched using the second mask on the amorphous silicon film thus formed to form an active pattern 54 on the gate insulating film 53 of the thin film transistor region TFF.

Referring to FIG. 2C, a resin film 55 is deposited on the entire surface of the glass substrate 51 including the active pattern 54.

Here, the present invention can prevent the problem of weak electric field due to the thick thickness of the conventional resin film by forming the resin film 55 for forming the unevenness in the lower portion of the common electrode and the pixel electrode formed in a subsequent process The driving ability of the liquid crystal can be improved.

Thereafter, a third mask, preferably, a half-tone mask is formed on the resin film 55 to form a concave-convex resin film 55a in the reflective region R. The resin film is etched in the TFT to remove the resin film.

Here, the resin film 55 may be etched by ashing after exposure and development of the photoresist pattern, or may be etched after directly exposing and developing the resin film. have.

Referring to FIG. 2D, a source / drain metal film is deposited on the entire surface of the substrate product in which the resin film 55 having irregularities in the reflective region R is formed. Here, the source / drain metal film is deposited in a three-layer film structure, and an Al-based film having excellent electrical conductivity and excellent reflectance is applied to the second layer film 57, which is a substantially wiring material. 57) The first layer film 56 disposed below uses a Mo-based metal film, and the third layer film 58 disposed on the Al-based film 57 also has the same Mo-based film as the first layer film 56. A metal film is used.

For example, the source / drain metal film has a three-layer structure of a bottom-Mo film 56, an Al film 57, and a top-Mo film 58, and the bottom-Mo film 56 is preferably 500 to 700 mW. 600 μm thick, Al film 57 is deposited at a thickness of 1400-1600 mW, preferably 1500 mW, and Top-Mo film 58 is 100-200 mW to facilitate its removal in subsequent steps. To a thickness of.

Next, a portion of the thin film transistor region TFT formed on the top-Mo film 58 to cover the reflective region R using a fourth mask, preferably a halftone mask. After forming the photosensitive layer 100 having a thickness thinner than the portion covering the region, using the photosensitive layer 100 as an etching mask, the channel portion between the transmission region T and the source / drain electrode forming region is formed. The top-Mo film, the Al film and the bottom-Mo film are etched.

Next, an ashing process is performed on the substrate resultant to remove the photosensitive layer formed in the reflective region R. At this time, since the photosensitive layer portion formed in the source / drain electrode forming region is formed relatively thicker than the photosensitive layer portion formed in the reflective region, it is not completely removed and partially remains.

Referring to FIG. 2E, the active layer of the thin film transistor region TFT is etched by etching the top-Mo film and the doped amorphous silicon film, which are the first layer films of the reflective region R, from which the photosensitive layer 100 is removed. A bottom-Mo film is formed on the resin film 55a on which the source / drain electrodes 60 are formed on the 54 and the thin film transistor 61 is formed, and at the same time, the unevenness of the reflective region R is formed. After forming the reflective electrode 59 composed of the two-layer film 56 and the Al film 57, the photosensitive layer remaining on the source / drain electrode 60 is removed.

According to the present invention, the source / drain electrodes 60 are formed in the thin film transistor region TFT using a metal film for source / drain electrodes, and the source / drain electrodes 60 are integrally formed in the reflective region R. As a result, an Al film having a high reflection efficiency forms a reflection electrode 59 composed of the uppermost layer.

Referring to FIG. 2F, an ITO film for the pixel electrode is deposited on the entire surface of the substrate product on which the data line including the source / drain electrode 60 and the reflective electrode 59 are formed. Then, the ITO film is etched using the fifth mask on the ITO film to form a pixel electrode 62 electrically connected to the reflective electrode 59 on the resin film 55 of the transmission region T.

According to the present invention, the pixel electrode 62 is in direct contact with the reflective electrode 59 integrally formed with the source / drain electrode 60, so that the source / drain electrode 60 and the pixel electrode 62 are in contact with each other. Formation is not necessary.

In other words, the source / drain electrode and the pixel electrode are electrically connected through the via hole formed by the etching of the passivation layer. However, due to the high etch rate during the etching of the passivation layer of the low temperature process to form the via hole, The size control was very difficult, resulting in a large via hole.

Therefore, in the present invention, the pixel electrode 62 is formed to be in direct contact with the reflective electrode 59 formed integrally with the source / drain electrode 60, so that the pixel electrode 62 is formed of the source / drain electrode without forming a via hole. 60) and the electrical connection is made, it is possible to solve the problem of the size control of the via hole even if the subsequent protective film is formed by a low temperature process, and also has the effect of increasing the aperture ratio as the via hole is not formed.

In addition, in the above-described embodiment of the present invention, the pixel electrode 62 is formed by using ITO on the substrate product on which the data line (not shown) including the source / drain electrode 60 and the reflective electrode 59 are formed. However, the present invention is not limited thereto, and in another embodiment, may be formed using IZO, which may be formed in a relatively low temperature process in consideration of the resin film below, and also before the metal film for source / drain electrodes is deposited. It may be formed as a lower layer of the reflective electrode.

Referring to FIG. 2G, the passivation layer 63 is deposited on the entire surface of the substrate including the reflective electrode 59 and the pixel electrode 62 using a low temperature process. In this case, the passivation layer 63 deposits the passivation layer 63 at a temperature of performing annealing on the resin layer at a temperature of 230 ° C. or less. The reason is that when the protective film 63 is deposited at 230 ° C. or higher, the resin film may be sublimed, which may adversely affect equipment contamination and irregularities.

On the other hand, when the protective film is deposited in a low temperature process as in the embodiment of the present invention, the etching rate may be high during the protective film etching process for forming the via hole, but the via hole may increase, as described above. Since the electrode is in direct contact with the reflective electrode formed integrally with the source / drain electrode, the process of forming the via hole is not necessary. Therefore, in the present invention, it is possible to prevent the problem of the size control of the via hole when forming the protective film in a low temperature process, and also has the advantage that the opening ratio increases as the via hole is not formed.

Then, via holes are formed in the pad portion outside the pixel region to etch the passivation layer 63 using the sixth mask on the passivation layer 63 to apply a signal from an external driving device.

Next, after depositing the ITO film for the common electrode on the entire surface of the substrate product on which the via hole is formed, the ITO film is etched using the seventh mask on the ITO film to reflect the reflection region R and the transmission region T. A slit type common electrode 64 is formed on the passivation layer in the region to manufacture an array substrate of a transflective FFS mode liquid crystal display device according to an exemplary embodiment of the present invention.

As described above, the present invention forms a pixel electrode and a common electrode in an inversion format, and simultaneously forms a source / drain electrode and a reflective electrode so that the pixel electrode is in direct contact with a reflective electrode formed integrally with the source / drain electrode. As a result, a via hole for the electrical connection between the pixel electrode and the source / drain electrode is unnecessary.

Therefore, the protective film etching process of the low temperature process for forming the via hole is omitted, thereby preventing the size control problem of the via hole during the protective film etching of the low temperature process.

In addition, the present invention can improve the aperture ratio since no via hole is formed in the pixel region.

3 is a plan view corresponding to FIG. 2G, and as illustrated, the gate line 70 and the data line 71 are arranged to cross each other, and a thin film is formed at the intersection of the gate line 70 and the data line 71. The transistor 61 is arranged, the reflection region R is formed in the reflection region R integrally with the source / drain electrodes, the pixel electrode 62 is disposed in the transmission region T, and The common electrode 64 is disposed in the pixel area partitioned by the gate line 70 and the data line 71.

4 is a plan view illustrating the slit type common electrode 64.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the scope of the following claims is not limited to the scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, the present invention forms a pixel electrode and a common electrode in an inversion format in a semi-transmissive FFS mode LCD that forms irregularities with resin to have high reflectance, and simultaneously forms the source / drain electrode and the reflective electrode. The pixel electrode is in direct contact with the reflective electrode integrally formed with the source / drain electrode, thereby eliminating the need for a via hole for electrical connection between the pixel electrode and the source / drain electrode.

Therefore, since the via hole is not required in the pixel region, the etching process of the protective film formed at a low temperature can be omitted, thereby preventing the problem of the via hole size control during the etching of the protective film. To have

In addition, the present invention can prevent the problems caused by the electric field due to the thick thickness of the conventional resin film by forming a resin film for forming the unevenness in the lower portion of the common electrode and the pixel electrode can improve the driving ability of the liquid crystal. .

Claims (8)

A glass substrate having a gate line and a data line vertically intersecting and having a pixel region defined by the lines divided into a thin film transistor region, a reflection region and a transmission region; A thin film transistor formed in the thin film transistor region, the thin film transistor including a gate electrode, an active pattern, and a source / drain electrode; A resin film formed in the reflection region and the transmission region, the surface of the portion formed in the reflection region having irregularities; A reflective electrode formed on the resin film in the reflective region and integral with the source / drain electrode; A transparent metal pixel electrode formed on the resin film of the transmission region and electrically connected to the reflective electrode; A protective film formed on a front surface of the substrate including the thin film transistor, the reflective electrode, and the pixel electrode by a low temperature process; And A slit type common electrode formed on the passivation layer in the reflective and transmissive regions; An array substrate of a transflective fringe field switching mode liquid crystal display device comprising a. The method of claim 1, And the source / drain electrodes are formed of a three-layer film including a bottom-Mo film, an Al film, and a top-Mo film. The method of claim 1, And the reflective electrode comprises a laminated film of an Mo film and an Al film. The method of claim 1, And the pixel electrode is in contact with and is electrically connected to a lower portion or an upper portion of the reflective electrode. Forming a gate electrode disposed on the thin film transistor region above the glass substrate partitioned into a thin film transistor region, a reflective region and a transmissive region, and connected to a gate line; Forming a gate insulating film on an entire surface of the substrate to cover the gate line and the gate electrode; Forming an active pattern including an amorphous silicon film and a doped amorphous silicon film on the gate insulating film of the thin film transistor region; Forming a resin film having irregularities on the gate insulating films of the reflective and transmissive regions; Forming a source / drain electrode connected to a data line on the active pattern of the thin film transistor region and simultaneously forming a reflective electrode on the resin layer of the reflective region; Forming a pixel electrode on the resin film of the transmission area to be electrically connected to the source / drain electrode through the reflective electrode; Forming a protective film on the entire surface of the substrate including the source / drain electrodes, the reflective electrode, and the pixel electrode by a low temperature process; And Forming a slit common electrode on the protective layer in the reflective region and the transparent region; A method of manufacturing an array substrate for a transflective fringe field switching mode liquid crystal display device comprising a. The method of claim 5, The step of forming a resin film having irregularities on the gate insulating film in the reflective region and the transparent region, Applying a resin on the entire surface of the substrate including the active pattern; And Forming a halftone mask on the resin in the reflective region and the transmissive region, and patterning the resin to have irregularities in the reflective region, wherein the transflective fringe field switching mode liquid crystal display is configured. Method for manufacturing array substrate for device. The method of claim 5, Forming the reflective electrode on the resin film of the reflective region while forming the source / drain electrodes, Sequentially depositing a bottom-Mo film, an Al film, and a top-Mo film on the entire surface of the substrate including the active pattern and the resin film; Applying a halftone exposure process on the top-Mo film to form a photosensitive layer having a thickness thinner than a portion covering the source / drain electrodes of the thin film transistor region; Etching the top-Mo film, the Al film, and the bottom-Mo film of the channel portion between the transmission region and the source / drain electrodes by using the photosensitive layer as an etching mask; Ashing the photosensitive layer formed in the reflective region with respect to the photosensitive layer to be removed; The top-Mo film of the reflective region and the doped amorphous silicon film of the channel portion are etched using the ashed photosensitive layer as an etch mask to form a source / drain electrode on the active pattern of the thin film transistor region. Forming a reflective electrode on the resin film in the reflective region; And Removing the ashed photosensitive layer; and a method of manufacturing an array substrate for a transflective fringe field switching mode liquid crystal display device. The method of claim 5, The forming of the passivation layer by the low temperature process, the method of manufacturing an array substrate for a transflective fringe field switching mode liquid crystal display device, characterized in that performed at a low temperature from room temperature to 230 ℃.

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