KR20080002542A - Method for fabricating thin film transistor and method for fabricating thin film transistor array substrate by applying said method - Google Patents

Abstract

A method for fabricating a TFT(thin film transistor) is provided to increase a dielectric constant by using a gate insulation layer as a composite layer in which an activated nano crystal is capsulated in a polymer cell to form a network combination. A gate electrode(112a) is formed on a substrate(111). A composite layer is formed on the resultant structure, having a structure in which nano crystals having a dielectric constant of at least 9 are capsulated in a polymer cell(113). A semiconductor layer(114) is formed on the composite layer on the gate electrode. Source and drain electrodes(115a,115b) are formed at both sides of the semiconductor layer. The composite layer can be an organic composite layer or an inorganic composite layer. The dielectric constant of the composite layer varies depending on the content or the kind of the nano crystals.

Description

Method for manufacturing thin film transistor and method for manufacturing TFT array substrate using the same {Method For Fabricating Thin Film Transistor And Method For Fabricating Thin Film Transistor Array Substrate By Applying Said Method}

1 is a plan view of a TFT array substrate according to the prior art.

FIG. 2 is a cross-sectional view of the TFT array substrate on the line II ′ of FIG. 1. FIG.

3 is a cross-sectional view of a thin film transistor according to the present invention.

4 is a view showing the activation process of the nanoparticles according to the present invention.

5 is a cross-sectional view of a TFT array substrate according to the present invention.

* Explanation of symbols on the main parts of the drawings

111: substrate 112: gate wiring

112a: gate electrode 112b: storage electrode

113: polymer cell 114: semiconductor layer

114a: ohmic contact layer 115: data wiring

115a: source electrode 115b: drain electrode

116: protective film 117: pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device (LCD), and more particularly, to a method of manufacturing a thin film transistor, which is easy to process and has a high dielectric constant, and a method of manufacturing a TFT array substrate using the same.

BACKGROUND ART Liquid crystal display devices, which have recently been spotlighted as flat panel display devices, have been actively researched due to their high contrast ratio, suitable for gradation display or moving picture display, and low power consumption.

In particular, it can be manufactured with a thin thickness so that it can be used as an ultra-thin display device such as a wall-mounted TV in the future, and is light in weight and consumes significantly less power than a CRT CRT. It is being used as a next generation display device such as being used as a personal mobile phone terminal, a TV and an aviation monitor.

Such a liquid crystal display device generally includes a TFT array substrate having a thin film transistor, a pixel electrode, and a storage capacitor formed in each pixel region defined by a gate wiring and a data wiring, a color filter layer array substrate having a color filter layer and a common electrode formed thereon; It consists of a liquid crystal layer interposed between the two substrates, by applying a voltage to the electrode to rearrange the liquid crystal molecules of the liquid crystal layer to adjust the amount of light transmitted to display an image.

Hereinafter, a liquid crystal display device according to the related art will be described in detail with reference to the accompanying drawings. Hereinafter, the description will be limited to the TFT array substrate of the liquid crystal display device.

1 is a plan view of a TFT array substrate according to the prior art, and FIG. 2 is a cross-sectional view of the TFT array substrate on the line II ′ of FIG. 1.

First, as illustrated in FIGS. 1 and 2, the TFT array substrate 11 of the liquid crystal display device has the gate lines 12 arranged in a row and the data lines 15 vertically intersecting the gate lines 12. The unit pixel is defined by (), and the gate electrode 12a, the gate insulating layer 13, the semiconductor layer 14, the ohmic contact layer 14a, and the intersection point of the gate line 12 and the data line 15 are defined. A thin film transistor (TFT) stacked on the source / drain electrodes 15a and 15b to control the turn-on or turn-off of the voltage, and the pixel electrode 17 to apply a signal voltage to the liquid crystal layer to transmit light. And a storage capacitor for reducing the level-shift voltage and maintaining the pixel information during the non-selection period.

The storage capacitor Cst is formed on the same layer as the gate wiring 12 and is parallel to the gate wiring 12, the pixel electrode 17, the storage electrode 12b, and the pixel electrode 17. The gate insulating layer 13 and the passivation layer 16 interposed therebetween keep the charge charged in the liquid crystal during the turn-off period of the thin film transistor.

As illustrated in FIG. 1, the storage capacitor Cst may be formed in the middle of a unit pixel, but may be formed in the gate wiring using a predetermined region of the gate wiring as a capacitor electrode.

A gate insulating layer 13, which is an insulating layer, is further provided between the gate line 12 and the data line 15, and a passivation layer 16 is further provided between the thin film transistor and the pixel electrode.

The gate insulating layer 13 and the protective layer 16 may be formed of an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx) having a dielectric constant of about 7.5, and typically, plasma enhanced chemical vapor deposition (PECVD). It forms by vapor deposition by the method.

However, when the gate insulating film is formed by depositing the inorganic material as described above, there are the following problems.

In other words, when the gate insulating film is formed of an inorganic material, even if the time is sufficiently long, the gate insulating film having a uniform thickness cannot be formed by only one deposition process. There was a downside. And, in the case of deposition equipment is expensive equipment has a problem that a lot of equipment management costs and investment costs are consumed. Accordingly, a technique of forming a gate insulating film using an organic material having a dielectric constant of 3 to 4, which can be easily formed using a relatively inexpensive equipment, has been proposed.

Unlike the inorganic gate insulating film, the organic gate insulating film is formed by a coating method such as spin coating or slit coating rather than a PECVD method, thereby making the manufacturing process easier and advantageous in terms of equipment cost. The surface can be planarized by removing the step difference between the gate wiring and the gate electrode.

However, the organic gate insulating layer has a smaller dielectric constant value compared with the inorganic gate insulating layer. If the dielectric constant is small, the parasitic capacitance Cgs formed between the gate wiring layer and the data wiring layer is reduced. In general, in the case of the opposite electrode and the insulating film provided therebetween, the capacitance value is proportional to the dielectric constant of the insulating film and the thickness of the insulating film, and is inversely proportional to the area of the opposite electrode.

As such, when the parasitic capacitance Cgs is decreased, the voltage drop ΔVp is further increased, as shown in Equation 1 below, thereby causing flicker, image sticking, and brightness of the screen. Poor effects such as uniformity occur.

In this case, Cgs is a parasitic capacitance formed between the TFT gate electrode and the source electrode (or drain electrode), Clc is an electrostatic capacitance accumulated in the liquid crystal cell, and Cst is a capacitance formed in the storage capacitor. ΔVp is the difference voltage between the data voltage Vd applied to the source electrode and the voltage Vlc charged to the liquid crystal cell, and ΔVg is the gate voltage Vgh of the low level and the gate voltage Vgl of the low level. Is the difference voltage.

That is, the parasitic capacitance Cgs is an item that most affects ΔVp as in Equation 1, and is closely related to the panel characteristics and the image quality characteristics. In this case, the parasitic capacitance Cgs may be increased in order to decrease ΔVp, and the dielectric constant of the gate insulating layer may be increased in order to increase the parasitic capacitance Cgs. It would be desirable to.

In the case of the organic gate insulating film, since it is formed by a coating method, there is an advantage that the manufacturing process is easier, but there is a problem that the thickness of the gate insulating film is locally uneven. That is, in the case of spin coating, the gate insulating film is coated on the substrate while the substrate is rotated in one direction, and the thickness of the gate insulating film at the edge of the substrate is thicker than the center of the substrate by the centrifugal force caused by the rotation. In addition, in the case of slit coating, the gate insulating film is coated on the substrate using a slit in which an insulating material is sprayed from one corner of the substrate to the opposite corner, and the nozzle is stagnated at the start of spraying and the end of spraying to insulate the gate. The injection amount of the material is increased, and as a result, the thickness of the gate insulating film at the portion where the injection is started or terminated becomes thick.

As described above, the TFT array substrate according to the related art as described above has the following problems.

First, the inorganic gate insulating film formed of silicon nitride has a problem that the deposition process such as PECVD is difficult and the cost of the deposition equipment is high, while the organic gate insulating film formed of poly glycol mono ethyl acetate (PGMEA) has a low dielectric constant. There was a problem that ΔVp was further increased or the thickness was uneven when the gate insulating film was coated.

As a result, it is preferable that the gate insulating layer be formed of a material having a high dielectric constant and easy to process and uniform in coating. The present invention has been proposed to achieve the above object, in particular, a polymer cell The present invention relates to a method of manufacturing a thin film transistor and a method of manufacturing a TFT array substrate using the same, wherein a gate insulating film is formed by coating a composite layer having a structure in which nanoparticles having high dielectric constant is encapsulated on a substrate.

In this case, the dielectric film of the composite thin film used as the gate insulating film is determined by the content or type of nanoparticles encapsulated in the polymer cell, and has a high dielectric constant of at least 9 to obtain a high dielectric constant gate insulating film. It is characterized by using nanoparticles.

A method of manufacturing a thin film transistor according to the present invention for achieving the above object comprises the steps of forming a gate electrode on a substrate, the structure of the nanoparticles having a dielectric constant of 9 or more inside the polymer cell on the front surface including the gate electrode Forming a composite layer, forming a semiconductor layer on the composite layer above the gate electrode, and forming source / drain electrodes on both sides of the semiconductor layer, respectively.

The thin film transistor formed by such a process includes the gate insulating film of high dielectric constant.

In this case, the method of forming the composite layer, comprising the step of dehydrogenating the nanoparticles to activate and filling the activated nanoparticles in the polymer cell, depending on the content or type of the nanoparticles Therefore, the dielectric constant of the composite layer is changed.

As such, the dielectric constant can be increased by forming a gate insulating film as a composite layer having a structure in which nanoparticles having a dielectric constant of 9 or more is encapsulated inside the polymer cell, and is formed by a coating process instead of a deposition process such as PECVD, thereby making the process easier. And simple.

Meanwhile, a method of manufacturing a TFT array substrate according to the present invention for achieving another object includes forming a gate electrode and a gate wiring on a substrate, and having a dielectric constant of 9 or more inside a polymer cell on the front surface including the gate electrode. Forming a composite layer having an encapsulated structure, forming a semiconductor layer on the composite layer above the gate electrode, and forming source / drain electrodes on both sides of the semiconductor layer, and simultaneously Forming a vertically crossing data line, forming a passivation layer on the entire surface including the source / drain electrodes, and forming a pixel electrode contacting the drain electrode on the passivation layer. do.

Hereinafter, a method of manufacturing a thin film transistor and a method of manufacturing a TFT array substrate of a liquid crystal display device using the same according to the present invention will be described in detail with reference to the drawings.

3 is a cross-sectional view of a thin film transistor according to the present invention, FIG. 4 is a view illustrating an activation process of nanoparticles according to the present invention, and FIG. 5 is a cross-sectional view of a TFT array substrate according to the present invention.

Method of manufacturing thin film transistor

Referring to Figure 3, first, on the substrate 111, copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), Low-resistance metals such as tantalum (Ta) and molybdenum-tungsten (MoW) are deposited by high-temperature sputtering and then patterned by photolithography to form the gate electrode 112a.

Subsequently, a gate insulating film is formed by coating a composite layer having a structure in which nanoparticles having a dielectric constant of 9 or greater is filled in the capsule-shaped polymer cell 113 on the entire surface including the gate electrode 112a. In this case, the composite layer is formed by forming a network bond between the two after the activated nanoparticles are filled in the polymer cell, the dielectric constant of the first composite layer can be changed according to the type or content of the nanoparticles The dielectric constant of the gate insulating film (first composite layer) can be increased.

The polymer cell 113 is an inorganic polymer of polyphosphazene, polysiloxane, polysilane, organic polymer of polyacrylate, polyimide, polyester, and the like. It can be formed by selecting at least one of the group consisting of organic / inorganic hybrid polymers, using a homopolymer form of a single type of monomer, or a copolymerized copolymer of different monomers. Form can be used.

Therefore, it may be an organic composite layer composed of a plurality of polymer cells or an inorganic composite layer.

In addition, the nanoparticles are barium strontium titanate, barium zirconate titanate, lead zirconate titanate, lead lanthanum titanate ), Strontium titanate, Barium titanate, Barium magnesium fluoride, Bismuth titanate, Strontium bismuth tantalate, At least one selected from the group consisting of strontium bismuth tanalate niobate and a metal oxide-based material may be used.

Here, the metal oxide-based material may be aluminum oxide (Al ₂ O ₃ ), magnesium oxide (MgO), calcium oxide (Calcium oxide, CaO), zirconium oxide (Zirconium oxide, ZrSiO ₄ or ZrO ₂ ), titanium Titanium oxide, TiO ₂ , Hafnium oxide, HfSiO ₄ or HfO ₂ , Yttrium oxide, Y ₂ O ₃ , Strontium oxide, SrO, Tantalum oxide, Ta ₂ O ₅ ), lanthanum oxide (Lanthanum oxide, La ₂ O ₃ ), barium oxide (Barium oxide, BaO) is at least one of the group consisting of.

At this time, a method of forming a composite layer composed of a plurality of polymer cells is largely phase separation method and emulsification method. First, in the phase separation method, a mixture of polymers and nanoparticles forming a homogeneous phase is subjected to phase separation by polymerization, cooling, or solvent evaporation. It's a way to use the principles that cause them.

That is, a polymer dispersion composition comprising a homogeneous mixture of monomers and nanoparticles is applied onto a substrate, and then phase-separated from the nanoparticles by polymerizing the monomers into polymers by UV irradiation. This completes a droplet containing nanoparticles inside the polymer cell.

On the other hand, in the phase separation method, since the quadrature size is sensitively changed depending on the temperature and the UV irradiation amount, it is difficult to obtain reproducibility, so that the emulsification method can be applied. The emulsification method is a method in which nanoparticles and an aqueous polymer solution form a heterogeneous phase from the beginning, and as the water evaporates, the nanoparticles are encapsulated by the polymer.

That is, the hollow polymer cell is first formed, and then the polymer cell is placed in a solution containing nanoparticles so that the solution is absorbed into the polymer cell. Next, evaporation of the solvent leaves only the solute nanoparticles inside the polymer cell.

This method has the advantage that the size of the quadrature is uniform since the polymer cell is first manufactured in a constant size and then the nanoparticles are filled therein.

Here, the nanoparticles to be filled in the polymer cell is characterized in that the activated, by using the activated nanoparticles it is possible to obtain a more stable composite layer by a compound bond with the polymer cell.

In order to activate the nanoparticles, the nanoparticles must be dehydrogenated, as shown in FIG. 4, to combine the nanoparticles with oleic acid (Oleic acid, C ₁₈ H ₃₄ O ₂ ). Subsequently, dehydrogenation occurs in the process of binding oleic acid to the nanoparticles, and eventually oxygen (O ⁻ ) is activated by surface end groups of the nanoparticles by dehydrogenation of the nanoparticles.

As such, the dielectric constant can be increased by forming a gate insulating film with a composite layer that encapsulates the activated nanoparticles in the polymer cell to be network bonded, and can be formed by a coating process instead of a deposition process such as PECVD. And simple.

This is completely different from the nanoparticles dispersed in the polymer matrix. That is, a composite layer in which nanoparticles are uniformly dispersed by grouping nanoparticles on a polymer substrate may have a different dielectric constant for each position, but a composite layer having a structure in which nanoparticles are filled inside a polymer cell has the same dielectric constant for each polymer cell unit. This means that the dielectric constant is uniform for each position, thereby improving the reliability of the device.

As described above, after the gate insulating film is formed, amorphous silicon (a-Si) is deposited on the entire surface including the gate insulating film to a thin thickness of 500 Å or less at a high temperature to form the semiconductor layer 114, and then n-type impurities are formed. At the same time as the implantation, amorphous silicon (a-Si) is deposited to a thickness of about 300 to 700 Pa at a high temperature to form an n + a-Si ohmic contact layer. The a-Si deposition and the n + a-Si deposition are performed continuously in the same process chamber. Of course, they may be formed in separate process chambers, respectively.

Further, copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta) on the front surface including the ohmic contact layer 114a. ) And low-resistance metals such as molybdenum-tungsten (MoW) are deposited by high-temperature sputtering and then patterned by photolithography to form source / drain electrodes 115a and 115b on both sides of the semiconductor layer.

As a result, a thin film transistor TFT including the gate electrode 112a, the gate insulating layer 113, the semiconductor layer 114, the ohmic contact layer 114a, and the source / drain electrodes 115a and 115b is completed.

TFT Array Substrate Manufacturing Method

The method for manufacturing a TFT array substrate of a liquid crystal display device according to the present invention is the same as or similar to the method for manufacturing a thin film transistor described above. Therefore, the same reference numerals will be used for the same or similar patterns.

Referring to Figure 5, first, on the substrate 111, copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), Low-resistance metals such as tantalum (Ta) and molybdenum-tungsten (MoW) are deposited by high-temperature sputtering technology and then patterned by photolithography to form gate wiring (not shown), gate electrode 112a, and storage electrode ( 112b).

Subsequently, a gate insulating film is formed by coating a composite layer having a structure in which nanoparticles having a dielectric constant of 9 or greater is filled in the capsule-shaped polymer cell 113 on the entire surface including the gate electrode 112a. In this case, the composite layer is formed by forming a network bond between the two after the activated nanoparticles are filled in the polymer cell, it is possible to change the dielectric constant of the first composite layer according to the type or content of the nanoparticles, The dielectric constant of the gate insulating film (first composite layer) can be increased.

The polymer cell 113 is an inorganic polymer of polyphosphazene, polysiloxane, polysilane, organic polymer of polyacrylate, polyimide, polyester, and the like. It can be formed by selecting at least one of the group consisting of organic / inorganic hybrid (Hybrid) polymer, using a homo-polymer form consisting of a single type of monomer or a copolymer form consisting of different monomers Can be used.

Therefore, it may be an organic composite layer composed of a plurality of polymer cells or an inorganic composite layer.

In addition, the nanoparticles are barium strontium titanate, barium zirconate titanate, lead zirconate titanate, lead lanthanum titanate ), Strontium titanate, Barium titanate, Barium magnesium fluoride, Bismuth titanate, Strontium bismuth tantalate, At least one selected from the group consisting of strontium bismuth tanalate niobate and a metal oxide-based material may be used.

Here, the metal oxide-based material may be aluminum oxide (Al ₂ O ₃ ), magnesium oxide (MgO), calcium oxide (Calcium oxide, CaO), zirconium oxide (Zirconium oxide, ZrSiO ₄ or ZrO ₂ ), titanium Titanium oxide, TiO ₂ , Hafnium oxide, HfSiO ₄ or HfO ₂ , Yttrium oxide, Y ₂ O ₃ , Strontium oxide, SrO, Tantalum oxide, Ta ₂ O ₅ ), lanthanum oxide (Lanthanum oxide, La ₂ O ₃ ), barium oxide (Barium oxide, BaO) is at least one of the group consisting of.

At this time, a method of forming a composite layer composed of a plurality of polymer cells is largely phase separation method and emulsification method. First, in the phase separation method, a mixture of polymers and nanoparticles forming a homogeneous phase is subjected to phase separation by polymerization, cooling, or solvent evaporation. It's a way to use the principles that cause them.

Here, the method for forming the composite layer will be described in detail with reference to one embodiment.

First, a hollow polymer cell 113 is manufactured by foaming a polymer.

In this case, as described above, the inorganic polymer of polyphosphazene, polysiloxane, polysilane, polyacrylate, polyimide, polyester ( At least one selected from the group consisting of an organic polymer and an organic / inorganic hybrid polymer of polyester) can be formed, using a homopolymer form consisting of a single type of monomer, or made of different monomers. Copolymer forms can be used.

The method of foaming a polymer includes a method using mechanical stirring, a method using a reaction gas, a method using a blowing agent, a method by spraying, and the like.

Thereafter, the above-described nanoparticles are absorbed into the polymer cell 113. At this time, since the nanoparticles are mixed with a solvent, the solvent inside the polymer cell is removed through a slow drying process, leaving only the nanoparticles.

As such, by forming the polymer cell 133 first before filling the nanoparticles, a polymer cell 133 having a uniform size can be obtained to ensure reproducibility, and when used as a gate insulating film, the thickness of the gate insulating film can be uniformly formed. Can be.

Next, the polymer cell filled with the nanoparticles is put back into another solvent to complete the composite layer, and then it is formed on the entire surface of the substrate by a printing method, a coating method, or a coating method, and the gate insulating film is completed by drying the solvent.

Herein, it is preferable to use activated nanoparticles filled in the polymer cell, and by using the activated nanoparticles, a more stable composite layer can be obtained by compound bonding with the polymer cell.

In order to activate the nanoparticles, the nanoparticles must be dehydrogenated, as shown in FIG. 4, to combine the nanoparticles with oleic acid (Oleic acid, C ₁₈ H ₃₄ O ₂ ). Subsequently, dehydrogenation occurs in the process of binding oleic acid to the nanoparticles, and eventually oxygen (O ⁻ ) is activated by surface end groups of the nanoparticles by dehydrogenation of the nanoparticles.

As such, the dielectric constant can be increased by forming a gate insulating film with a composite layer that encapsulates the activated nanoparticles in the polymer cell to be network bonded, and can be formed by a coating process instead of a deposition process such as PECVD. And simple.

This is completely different from the nanoparticles dispersed in the polymer matrix. That is, a composite layer in which nanoparticles are uniformly dispersed by grouping nanoparticles on a polymer substrate may have a different dielectric constant for each position, but a composite layer having a structure in which nanoparticles are filled inside a polymer cell has the same dielectric constant for each polymer cell unit. This means that the dielectric constant is uniform for each position, thereby improving the reliability of the device.

As described above, after the gate insulating film is formed, amorphous silicon (a-Si) is deposited on the entire surface including the gate insulating film to a thin thickness of 500 m or less at a high temperature to form the semiconductor layer 114, and then n-type impurities are formed. At the same time as the implantation, amorphous silicon (a-Si) is deposited to a thickness of about 300 to 700 Pa at a high temperature to form an n + a-Si ohmic contact layer. The a-Si deposition and the n + a-Si deposition are performed continuously in the same process chamber. Of course, they can also be formed in separate process chambers.

Further, copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta) on the front surface including the ohmic contact layer 114a. Metal having low resistivity, such as molybdenum-tungsten (MoW), is deposited by high-temperature sputtering, and then patterned by photolithography to form data lines 115 and source / drain electrodes 115a and 115b.

As a result, gate wirings and data wirings defining pixels are perpendicularly intersected with each other, and the gate electrode 112a, the gate insulating film 113, the semiconductor layer 114, the ohmic contact layer 114a, and the intersection of the two wirings are formed. A thin film transistor TFT formed of the source / drain electrodes 115a and 115b is provided.

Subsequently, a protective film is formed on the entire surface including the thin film transistor. In this case, the protective layer 116 may be formed by coating an organic material such as benzocyclobutene (BCB) or an acrylic material or by depositing an inorganic material such as SiNx or SiOx.

Finally, the protective layer 116 is removed to expose a portion of the drain electrode 115b to form a contact hole, and an indium tin oxide (ITO) or indium zinc oxide (IZO) is formed on the entire protective layer 116 including the contact hole. And depositing and patterning a transparent conductive material of () to form a pixel electrode 117 that is in contact with the drain electrode (115b).

Although not shown, the TFT array substrate formed as described above is provided with a liquid crystal layer between the two substrates that is oppositely bonded to the opposing substrate, and the opposing substrate includes a black matrix for preventing light leakage and an R, A color filter layer having G and B color resists formed in a predetermined order, an overcoat layer for protecting the color filter layer on the color filter layer and planarizing the surface of the color filter layer, and a pixel on a TFT array substrate formed on the overcoat layer In addition to the electrodes, a common electrode forming an electric field is formed.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

The method of manufacturing a TFT array substrate of the present invention as described above has the following effects.

First, it is possible to increase the dielectric constant by forming a gate insulating film with a composite layer that encapsulates the activated nanoparticles in the polymer cell to become a network bond, as well as to form a coating process rather than a deposition process such as PECVD, making the process easier. And simple.

Second, it is possible to improve the stability of the composite layer by activating the nanoparticles filled in the polymer cell to form a chemical network bond between the polymer cell and the nanoparticles.

Third, the dielectric constant of the gate insulating film may be appropriately controlled by the type or content of the nanoparticles.

Fourth, when a polymer cell having a uniform size is formed and used as the gate insulating film, the thickness of the gate insulating film can be uniformly formed.

Claims (21)

Forming a gate electrode on the substrate, Forming a composite layer of a structure in which nanoparticles having a dielectric constant of 9 or more are encapsulated inside a polymer cell on a front surface including the gate electrode; Forming a semiconductor layer on the composite layer on the gate electrode; And forming source / drain electrodes on both sides of the semiconductor layer, respectively. The method of claim 1, The composite layer is a method of manufacturing a thin film transistor, characterized in that the organic composite layer or an inorganic composite layer. The method of claim 1, The method for forming the composite layer, Dehydrogenating and activating the nanoparticles; The method of manufacturing a thin film transistor comprising the step of filling the activated nanoparticles in the polymer cell. The method of claim 3, wherein In the step of dehydrogenating the nanoparticles, the method of manufacturing a thin film transistor, characterized in that for bonding the nanoparticles and oleic acid (Oleic acid, C ₁₈ H ₃₄ O ₂ ). The method of claim 3, wherein A method of manufacturing a thin film transistor, characterized in that the activated oxygen is formed on the surface end groups of the nanoparticles by dehydrogenation of the nanoparticles. The method of claim 1, A method of manufacturing a thin film transistor, characterized in that the dielectric constant of the composite layer varies depending on the content or type of the nanoparticles. The method of claim 1, The polymer cell is an inorganic polymer of polyphosphazene, polysiloxane, polysilane, organic polymer of polyacrylate, polyimide, polyester, and organic / inorganic. A method of manufacturing a thin film transistor, characterized in that formed by using at least one selected from the group consisting of a hybrid polymer. The method of claim 7, wherein  The polymer substrate is a homopolymer or a method of manufacturing a thin film transistor, characterized in that the copolymer (Copolymer). The method of claim 1, The nanoparticles are barium strontium titanate, barium zirconate titanate, lead zirconate titanate, lead lanthanum titanate, Strontium titanate, Barium titanate, Barium magnesium fluoride, Bismuth titanate, Strontium bismuth tantalate, Strontium A method of manufacturing a thin film transistor, characterized in that at least one selected from the group consisting of titanium bismuth tanalate niobate and a metal oxide-based material is used. The method of claim 9, The metal oxide-based material is composed of Al ₂ O ₃ , MgO, CaO, ZrSiO ₄ , HfSiO ₄ , Y ₂ O ₃ , ZrO ₂ , HfO ₂ , SrO, La ₂ O ₃ , Ta ₂ O ₅ , BaO, TiO ₂ At least one of the group of the method for manufacturing a thin film transistor. The method of claim 1, The composite layer is a method of manufacturing a thin film transistor, characterized in that formed by any one of a printing method, coating method or coating method. Forming a gate electrode and a gate wiring on the substrate; Forming a composite layer of a structure in which nanoparticles having a dielectric constant of 9 or more are encapsulated inside a polymer cell on a front surface including the gate electrode; Forming a semiconductor layer on the composite layer on the gate electrode; Forming source and drain electrodes on both sides of the semiconductor layer, and simultaneously forming data lines perpendicular to the gate lines; Forming a protective film on the entire surface including the source / drain electrodes; Forming a pixel electrode contacting the drain electrode on the passivation layer. The method of claim 12, And said composite layer is an organic composite layer or an inorganic composite layer. The method of claim 12, The method for forming the composite layer, Dehydrogenating and activating the nanoparticles; And filling the activated nanoparticles into the polymer cell. The method of claim 14, Dehydrogenating the nanoparticles, the method of manufacturing a TFT array substrate, characterized in that for bonding the nanoparticles and oleic acid (Oleic acid, C ₁₈ H ₃₄ O ₂ ). The method of claim 12, Method of manufacturing a TFT array substrate, characterized in that the dielectric constant of the composite layer varies depending on the content or type of the nanoparticles. The method of claim 12, The polymer cell is an inorganic polymer of polyphosphazene, polysiloxane, polysilane, organic polymer of polyacrylate, polyimide, polyester, organic / inorganic A method of manufacturing a TFT array substrate, characterized in that formed using at least one selected from the group consisting of a hybrid polymer. The method of claim 17,  The polymer substrate is a method of manufacturing a TFT array substrate, characterized in that the homopolymer or a copolymer (Copolymer). The method of claim 12, The nanoparticles are barium strontium titanate, barium zirconate titanate, lead zirconate titanate, lead lanthanum titanate, Strontium titanate, Barium titanate, Barium magnesium fluoride, Bismuth titanate, Strontium bismuth tantalate, Strontium A method for manufacturing a TFT array substrate, characterized in that at least one selected from the group consisting of titanium bismuth tanalate niobate and a metal oxide-based material is used. The method of claim 19, The metal oxide-based material is composed of Al ₂ O ₃ , MgO, CaO, ZrSiO ₄ , HfSiO ₄ , Y ₂ O ₃ , ZrO ₂ , HfO ₂ , SrO, La ₂ O ₃ , Ta ₂ O ₅ , BaO, TiO ₂ At least one of the group, the manufacturing method of the TFT array substrate. The method of claim 12, The composite layer is a method of manufacturing a TFT array substrate, characterized in that formed by any one of a printing method, coating method or coating method.

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