KR20080002054A - In-plane switching mode liquid crystal display device and method for manufacturing the same - Google Patents

Abstract

An IPS(In-Plane Switching) LCD(Liquid Crystal Display) device and a manufacturing method thereof are provided to form a first light blocking pattern in a portion adjacent to data lines of a side of a pixel area to be overlapped with a pixel electrode and form a second light blocking pattern in a portion adjacent to data lines of the other side of the pixel area to be overlapped with a common electrode, thereby increasing transmittance by minimizing the generation of a disclination line. An IPS LCD device comprises first(100) and second substrates, plural gate lines and data lines(102), a TFT(Thin Film Transistor), first and second storage patterns(111a,111b), a common electrode(104), a pixel electrode(103), first and second light blocking patterns(121a,121b), and a liquid crystal layer. The first and second substrates are opposite to each other. The plural gate lines and data lines, separately formed in first and second directions, cross each other on the first substrate to define a pixel area. The TFT is formed in the intersection of the gate lines and the data lines. The first and second storage patterns are separately formed in the edge portion of the second direction of the pixel area. The common electrode is electrically connected to the first storage pattern, and is diverged from the forming portion of the first storage pattern to the inside of the pixel area to be spaced from the second storage pattern. The pixel electrode is electrically connected to the second storage pattern, and is diverged from the forming portion of the second storage pattern to the inside of the pixel area to be spaced from the first storage pattern. The first light blocking pattern is formed in a spaced area between the second storage pattern and the common electrode. The second light blocking pattern is formed in a spaced area between the first storage pattern and the pixel electrode. The liquid crystal layer is formed between the first and second substrates.

Description

In-Plane Switching mode Liquid Crystal Display Device and Method for Manufacturing the Same}

1 is a schematic cross-sectional view illustrating a driving principle of a general transverse electric field type liquid crystal display device.

2 is a plan view showing a conventional transverse electric field type liquid crystal display device

3A and 3B are plan views showing the correlation between the rubbing direction and the electric field direction when 8V and 10V are applied to the data lines, respectively.

4 is a plan view showing a horizontal transverse electric field (H-IPS) type liquid crystal display device

5 is a plan view showing a transverse electric field type liquid crystal display device of the present invention.

FIG. 6 is a structural cross-sectional view taken along lines II ′ and II ′ II ′ of FIG. 5.

7A to 7C are process plan views for manufacturing the transverse electric field type liquid crystal display device of the present invention.

8A to 8C are cross-sectional views for manufacturing a transverse electric field type liquid crystal display device of the present invention.

* Description of the symbols for the main parts of the drawings

101: gate line 102: data line

102a: source electrode 102b: drain electrode

103: pixel electrode 104: common electrode

111: common line 111a: first storage pattern

111b: second storage pattern 113: pixel storage pattern

114: common electrode storage pattern 121a: first light shielding pattern

121b: second light blocking pattern 131: first contact hole

132: second contact hole

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a transverse field type liquid crystal display device having a light shielding pattern at a portion adjacent to a data line in a horizontal transverse electric field type mode and reducing the generation of foreground lines, and a manufacturing method thereof.

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELD), and vacuum fluorescent (VFD) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display device because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention has been developed in various ways such as a television and a computer monitor for receiving and displaying broadcast signals.

In order to use such a liquid crystal display as a general screen display device in various parts, it is a matter of how high quality images such as high definition, high brightness and large area can be realized while maintaining the characteristics of light weight, thinness and low power consumption. Can be.

The general liquid crystal display device is comprised from the 1st board | substrate and the 2nd board | substrate bonded by the fixed space, and the liquid crystal layer injected between the said 1st board | substrate and the 2nd board | substrate.

More specifically, the first substrate has a plurality of gate lines in one direction at regular intervals and a plurality of data lines at regular intervals in a direction perpendicular to the gate line to define the pixel region P. do. In addition, a pixel electrode is formed in each of the pixel regions P, and a thin film transistor T is formed at a portion where each of the gate lines and the data lines intersect, and the data of the data line according to a signal applied to the gate line. A signal is applied to each pixel electrode.

In addition, a black matrix layer is formed on the second substrate to block light in portions other than the pixel region P. R, G, and B color filter layers for expressing color are formed at portions corresponding to the pixel regions. The common electrode for realizing an image is formed on the color filter layer.

In the liquid crystal display as described above, the liquid crystal of the liquid crystal layer formed between the first and second substrates is aligned by an electric field between the pixel electrode and the common electrode, and the light passes through the liquid crystal layer according to the degree of alignment of the liquid crystal layer. You can express the image by adjusting the amount of.

Such a liquid crystal display device is called a twisted nematic (TN) mode liquid crystal display device, and the TN mode liquid crystal display device has a disadvantage in that the viewing angle is narrow, and thus an in-plane (IPS: In-Plane) is used to overcome the disadvantage of the TN mode. Switching mode liquid crystal display device has been developed.

Meanwhile, in an IPS mode liquid crystal display, a pixel electrode and a common electrode are formed parallel to each other at a predetermined distance in a pixel area of a first substrate, thereby generating a lateral electric field (horizontal electric field) between the pixel electrode and the common electrode. The liquid crystal layer is oriented by the transverse electric field.

Hereinafter, a conventional transverse electric field type liquid crystal display device will be described with reference to the accompanying drawings.

Hereinafter, with reference to the accompanying drawings illustrating a conventional as follows.

1 is a schematic cross-sectional view for describing a driving principle of a general transverse electric field type liquid crystal display device.

As shown in FIG. 1, a general transverse electric field type liquid crystal display device is formed to face each other while being spaced apart from the lower substrate 10, which is a thin film transistor array substrate, and the upper substrate 20, which is a color filter array substrate, between the upper and lower substrates 10 and 20. The liquid crystal layer 3 is interposed therebetween, and both the common electrode 13 and the pixel electrode 15 are formed on the inner surface of the lower substrate 10.

The liquid crystal layer 3 is driven by the horizontal electric field of the common electrode 13 and the pixel electrode 15, and the liquid crystal molecules are moved by the horizontal electric field in the liquid crystal layer 3, so that the viewing angle is widened. .

2 is a plan view illustrating a conventional transverse electric field type liquid crystal display device.

As illustrated in FIG. 2, in the conventional transverse electric field type liquid crystal display device, a gate line 11 and a data line 12 are formed on the lower substrate 10 to cross each other vertically and define a pixel area, and are common in the pixel area. The electrode 13 and the pixel electrode 15 are formed in a direction parallel to the data line 12 and are alternately formed.

The gate electrode 11a is formed to protrude from the gate line 11, and a gate insulating layer (not shown) is disposed on an entire surface of the lower substrate 10 including the gate electrode 11a. And a thin film transistor TFT including a semiconductor layer 18 overlapping the semiconductor layer 18, a source electrode 12a protruding from the data line 12 on both sides of the semiconductor layer 18, and a drain electrode 12b spaced apart from the predetermined distance. ) Is formed. The drain electrode 12b of the thin film transistor TFT is connected to the pixel electrode 15.

The common electrode 13 is formed to be spaced apart from the pixel electrode 15 by a predetermined interval, and simultaneously formed when the gate line 11 or the data line 12 is formed. In the drawing shown, the common electrode 13 is formed on the same layer as the gate line 11.

A protective film (not shown) is further deposited between the data line 12 and the pixel electrode 15.

A first alignment layer (not shown) is formed on the entire lower substrate 10 including the passivation layer and the pixel electrode 15.

In addition, the common electrode 13 receives a voltage signal from the common line 19, and the pixel electrode 15 receives a pixel voltage through the drain electrode 12b and is common with the pixel electrode 15. A horizontal electric field is formed between the electrodes 13 to drive the liquid crystal 3.

The common electrode 13 may be divided into a first common electrode 13a formed in the outermost region of the pixel region and a second common electrode 13b formed in the center of the pixel region. Among the common electrodes 13, the first common electrode 13a positioned outside the pixel area may prevent crosstalk, which is a poor image quality occurring between the data line 12 and the pixel electrode 15. For the purpose of minimizing and preventing light leakage, the width is wider than that of the common electrode 13b formed at the center, and thus, the aperture ratio is lowered.

This opening ratio drop problem has a close relationship with the rubbing direction that determines the initial direction of the liquid crystal molecules and the electric field direction that induces driving of the liquid crystal molecules when a voltage is applied.

In addition, the conventional arrangement structure of the electrode forming the transverse electric field has a problem of reducing the aperture ratio in relation to the rubbing direction and the electric field direction.

3A and 3B are enlarged views of the region A of FIG. 2 and are shown based on a correlation between a rubbing direction and an electric field direction, and a rubbing direction for inducing an initial arrangement of liquid crystal molecules is a diagonal direction (for example, It is assumed that the transverse electric field 26 is formed in the upper left direction in the lower right direction and in a direction orthogonal to the pixel electrode and the common electrode when voltage is applied.

3A illustrates the common electrodes 13a and 13b under the condition that voltages of 5V and 8V are applied to the common electrodes 13a and 13b and the pixel electrode 15, and voltages of 8V are applied to the data line 12. A voltage difference of 3 V is generated between the pixel electrodes 15, and the first director 24 of the liquid crystal molecules is determined by the electric field due to the voltage difference.

FIG. 3B shows that even when a voltage difference of 3 V occurs between the common electrodes 13a and 13b and the pixel electrode 15 as in FIG. 3A, when the voltage applied to the data line 12 is changed, the electric field of the actual driving region is also changed. A change is generated to have a second director 28 which is rotated slightly more than the first director 24 according to FIG. 3A, and thus the common electrodes 13a and 13b and the pixel electrode 15 are connected to FIGS. Likewise, a change in color may occur due to a signal voltage difference even under a condition where the same voltage is applied.

This problem can be solved by increasing the width of the common electrode positioned at the periphery of each pixel region. However, as the width of the electrode becomes wider, the aperture ratio decreases.

The conventional transverse electric field type liquid crystal display device has the following problems.

First, the alignment of the liquid crystal corresponding to the region between the outermost common electrode and the data line is unstable due to the difference in the signal voltage applied to the data line.

Recently, in order to prevent light leakage due to unstable liquid crystal alignment between the outermost common electrode and the data line, a method of reducing the area between the outermost common electrode and the data line by increasing the width of the outermost common electrode has been introduced. However, in this case, the loss of the aperture ratio occurs as much as the light shielding outermost common electrode is covered.

Second, even if the area between the outermost common electrode and the data line is minimized, the rubbing direction (also in the actual driving area, that is, between the outermost common electrode and the pixel electrode) is influenced by the signal voltage applied to the data line in the voltage-on state. The alignment misalignment of the liquid crystal occurs in the direction from the lower right to the upper left). The misalignment of the liquid crystal acts as a factor that lowers the contrast ratio and lowers the color.

Third, when the common electrode and the pixel electrode are arranged in a direction parallel to the data line, that is, in a vertical direction, the electric field is formed in the horizontal direction, so the characteristics of the left and right viewing angles are good, but the upper and lower viewing angles are relatively inferior.

In order to solve the above problems, the present invention forms an electrode in the horizontal direction, and selects a phase difference of the liquid crystal cell to a predetermined value, thereby improving luminance without decreasing aperture ratio and improving left and right viewing angle characteristics. It is an object to provide a transverse electric field type liquid crystal display device.

The present invention has been made to solve the above problems, and in the horizontal transverse electric field mode, providing a transverse electric field type liquid crystal display device having a light shielding pattern at a portion adjacent to the data line to reduce the generation of foreground lines and a method of manufacturing the same. , Its purpose is.

The transverse field type liquid crystal display device according to the present invention for achieving the above object defines a pixel region crossing each other on the first substrate and the second substrate facing each other and on the first substrate, and defining the first direction and the first direction, respectively. A plurality of gate lines and data lines formed in two directions, a thin film transistor formed at an intersection of the gate lines and data lines, a first storage pattern and a second storage formed at edge portions of a second direction of the pixel region, respectively. A pattern, a common electrode electrically connected to the first storage pattern, and branched from the forming portion of the first storage pattern to the pixel area so as to be spaced apart from the second storage pattern, and electrically connected to the second storage pattern. Connected to the first storage pattern and spaced apart from the first storage pattern to form a portion of the second storage pattern in the pixel area. A pixel electrode which is branched, a first light shielding pattern formed in a spaced area between the second storage pattern and the common electrode, a second light shielding pattern formed in a spaced area between the first storage pattern and the pixel electrode, and the It is characterized by including a liquid crystal layer between the first and second substrates.

The common electrode and the pixel electrode are made of a transparent electrode.

The common electrode and the pixel electrode are formed on the same layer.

A common line is further formed adjacent to the gate line.

The second storage pattern is integrally connected to the common line.

The common line is bent from the second storage pattern and formed in a direction parallel to the gate line.

The first storage pattern and the second storage pattern are formed on the same layer as the gate line.

The first storage pattern and the second storage pattern are made of a light blocking metal.

A common electrode connection pattern overlapping the first storage pattern is further formed on the first storage pattern.

The first storage capacitor is formed at a portion where the first storage pattern and the common electrode connection pattern overlap.

The second storage pattern is electrically connected to the common electrode.

A pixel electrode connection pattern overlapping the second storage pattern is further formed on the second storage pattern.

A second storage capacitor is formed at a portion where the second storage pattern and the pixel electrode connection pattern overlap.

The first storage pattern is electrically connected to the pixel electrode.

The common electrode connection pattern and the pixel electrode connection pattern are formed on the same layer as the pixel electrode.

The first blocking pattern is integrally formed with the first storage pattern, and the second blocking pattern is integrally formed with the second storage pattern.

The pixel electrode is electrically connected to the thin film transistor.

In addition, a method of manufacturing a transverse electric field type liquid crystal display device of the present invention for achieving the same object comprises the steps of preparing a first substrate and a second substrate facing each other, and on the first substrate Depositing a first metal layer and selectively removing the first metal layer to form a gate line in a first direction, a gate electrode protruding from the gate line, and a second edge portion of the pixel region in a second direction crossing the first direction; Forming first and second light blocking patterns into the pixel area in the first and second storage patterns and the first and second storage patterns, and depositing and selectively removing a second metal layer on the first substrate. A data line in a second direction, and a source electrode and a drain electrode protruding from the data line so as to define a pixel area crossing the gate line. Forming a transparent electrode on the first substrate, and selectively removing the transparent electrode, the common electrode connection pattern overlapping the first storage pattern, and the second light blocking pattern branched into the common electrode connection pattern. Forming a common electrode partially overlapping with each other, forming a pixel electrode connection pattern overlapping the second storage pattern, and a pixel electrode branched into the pixel electrode connection pattern to partially overlap the first light blocking pattern; and Another feature is that it comprises the step of forming a liquid crystal layer between the first and second substrates.

The first metal layer is a light shielding metal.

The transparent electrode is made of any one of indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).

The method may further include forming a common line in a first direction integrally with the second storage pattern.

After the removal of the second metal layer, the method may further include forming a passivation layer and forming a first contact hole and a second contact hole on the drain electrode and the common line, respectively.

When the common electrode connection pattern is formed, the common electrode connection pattern and the common line are electrically connected through the second contact hole.

The pixel electrode, the drain electrode, and the first light blocking pattern are electrically connected to each other through the drain electrode and the first contact hole when the pixel electrode is formed.

After selectively removing the first metal layer, forming a gate insulating film over the first substrate.

Hereinafter, a transverse electric field type liquid crystal display device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view illustrating a horizontal transverse electric field (H-IPS) type liquid crystal display device.

As shown in FIG. 4, a horizontal transverse electric field type liquid crystal display device includes a gate line 21, a data line 22, a gate line, and data on a first substrate (not shown) that cross each other to define pixel regions. And a thin film transistor TFT formed at an intersection of the lines, a pixel electrode 24b and a common electrode 24a which are alternately formed in the pixel region in a direction parallel to the gate line 21. In addition, the common electrode 24a is formed in the direction of the data line 22 adjacent to the data line 22 on both outer edges of the pixel region, and connects the common electrode 24a to the common electrode 24a. And a pixel electrode connection pattern 23b for connecting the pixel electrode 24b. The pixel electrode connection pattern 23b includes a storage pattern 31a bent from a common line 31 formed in the same direction as the gate line.

The thin film transistor may include a gate electrode formed on the gate line 21, a source electrode 22a protruding from the data line 22 to the gate electrode, and a drain spaced apart from the source electrode 22a by a predetermined interval. And an electrode 22b, wherein the pixel electrode 24b is electrically connected to the drain electrode 22b through the first contact hole 26a.

The protrusion pattern 31b protruding from the common line 31 is electrically connected to the common electrode connection pattern 23a through the second contact hole 26b.

As such, when the pixel electrode 24b and the common electrode 24a are disposed in a horizontal direction (gate line direction) or a level similar to the horizontal direction, the width of the common electrode connection pattern 23a may be adjusted to the data line 22. Can be reduced. This is a value smaller than the width of the outermost common electrode in the structure having the pixel electrode and the common electrode arrangement in the conventional vertical direction. Therefore, the aperture ratio can be improved over the conventional structure.

On the other hand, the storage pattern 31a overlapped with each other overlaps the pixel electrode connection pattern 23b so that the storage capacitor Cst is defined at the overlapped portion.

However, in the horizontal transverse type liquid crystal display device having such a structure, the liquid crystal is twisted due to the potential difference between the pixel electrode and the common electrode, and the edges of the common electrode connection pattern and the pixel electrode connection pattern are not shorted when the electrode is formed. It is formed by securing a gap. As a result, unwanted foreground lines (disclination) occur as much as spaced portions between the edge portions, and the luminance decreases due to the generation of the foreground lines.

In addition, since a storage capacitor (Cst) is formed only between the pixel electrode connection pattern and the storage pattern in the pixel region, an overlapping region must be widened (that is, the pixel electrode to form a storage capacitor having a rated capacity). Since the overlap area between the connection pattern and the storage pattern needs to be increased), the area occupied by the light blocking common electrode pattern in the pixel area is increased, thereby reducing the transmission area as a whole.

Hereinafter, the transverse electric field type liquid crystal display device of the present invention which prevents a problem in the horizontal transverse electric field type system of such a shape will be described.

FIG. 5 is a plan view illustrating a transverse electric field type liquid crystal display device of the present invention, and FIG. 6 is a structural cross-sectional view taken along line II ′ and line II ′ of FIG. 5.

As shown in FIGS. 5 and 6, the transverse electric field type liquid crystal display device of the present invention crosses the first substrate 100 and the second substrate (not shown) and the pixel regions on the first substrate 100 that face each other. And a plurality of gate lines 101 and data lines 102 formed in a first direction and a second direction, respectively, and a thin film transistor formed at an intersection of the gate line 101 and the data line 102. A TFT, a first storage pattern 111a and a second storage pattern 111b formed on an edge portion of the pixel area in the second direction, respectively, and the first storage pattern 111a overlapping each other. A common electrode connection pattern 114, a plurality of common electrodes 104 branching from the common electrode connection pattern 114 and entering the pixel area, and the second storage pattern 111b and overlapping the common electrode connection pattern 114. The pixel electrode connection pattern 113 and the above A plurality of pixel electrodes 103 branching from the small electrode connection pattern 113 and entering the pixel area, and a first light blocking pattern formed in a spaced area between the second storage pattern 111b and the common electrode 104. A second light blocking pattern 121b formed between the first storage pattern 111a and the pixel electrode 103, and between the first substrate 100 and the second substrate. It comprises a liquid crystal layer (not shown).

The pixel electrode 103 is spaced apart from the first storage pattern 111a, and the common electrode 104 is spaced apart from the second storage pattern 111b. In addition, a first light blocking pattern 121a is formed in a space between the pixel electrode 103 and the first storage pattern 111a, and a space between the common electrode 104 and the second storage pattern 111b. The second light blocking pattern 121b is formed on the substrate.

The first and second light blocking patterns 121a and 121b may be electrically insulated between the pixel electrode 103 and the first storage pattern 111a and between the common electrode 104 and the second storage pattern 111b. Foreground is generated in the spaced apart space for the purpose, because the decrease in brightness is formed to cover this area.

Here, the first and second light blocking patterns 121a and 121b are made of the same metal as the gate line 101 and are formed in the same patterning process.

5 and 6, the first storage pattern 111a and the common electrode connection pattern 114 overlap each other at both edge portions adjacent to the data line 102 in each pixel area. By forming the second storage capacitor Cst2 in which the storage capacitor Cst1, the second storage pattern 111b, and the pixel electrode connection pattern 113 overlap each other, a storage capacitor is formed in at least two regions, thereby increasing storage capacity. As a result, compared to the general horizontal transverse electric field structure of FIG. 4, a process margin may be provided when forming storage to secure a storage capacitor. In addition, in the case of securing the same capacity as the general horizontal transverse electric field structure, the area of the first and second storage patterns 111a and 111b can be reduced, so that the opening ratio can be relatively increased.

The first and second storage patterns 111a and 111b may be formed of the same light blocking metal as the gate line 101, and may include the pixel electrode connection pattern 113, the common electrode connection pattern 114, and the pixel electrode 103. ) And the common electrode 104 are formed by patterning in the same process, if both are made of a transparent transparent electrode.

In this case, the transparent electrode is made of any one of indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).

In addition, the common line 111 is formed in a first direction parallel to the gate line 101 integrally with the second storage pattern 111b.

Here, the second storage pattern 111b is electrically connected to the common line 111, and the common line 111 and the second storage pattern 111b are integrally formed.

The first storage pattern 111a and the second storage pattern 111b are formed on the same layer as the gate line 101. The first storage pattern 111a and the second storage pattern 111b are made of a light blocking metal.

The common electrode connection pattern 111a overlapping the first storage pattern 111a is further formed on the first storage pattern 111a.

The first storage capacitor Cst1 is formed at a portion where the first storage pattern 111a and the common electrode connection pattern 114 overlap each other by further interposing a gate insulating layer 118 and a protective layer 119 between the two patterns. Is formed. In the first storage capacitor Cst1, a pixel voltage signal is applied to the first storage pattern 111a, and a common voltage signal applied to a common line is applied to the common electrode connection pattern 114 to function as a capacitor. will be.

A second storage capacitor Cst2 is formed at a portion where the second storage pattern 111b and the pixel electrode connection pattern 113 overlap with each other by further interposing a gate insulating layer 118 and a protective layer 119 between the two patterns. do. Here, a common voltage signal is applied to the second storage pattern 111b and a pixel voltage signal is applied to the pixel electrode connection pattern 113.

The common electrode connection pattern 114 and the pixel electrode connection pattern 113 are formed on the same layer as the pixel electrode 103.

The first light blocking pattern 121a is integrally formed with the first storage pattern 111a, and the second light blocking pattern 121b is integrally formed with the second storage pattern 111b.

A gate insulating film 118 is interposed between the layer such as the gate line 101 and the data line 102, and the pixel electrode of the transparent electrode component and the layer such as the data line 102. A protective film 119 is interposed between the layers 103 and the common electrode 104 or the like.

The pixel electrode 113 is electrically connected to the thin film transistor TFT.

The thin film transistor TFT may include a gate electrode (integrated with the gate line) formed in the gate line 101, a protrusion protruding from the data line 102 to the gate electrode, and having a 'U' shape. And an electrode 102a and a drain electrode 102b spaced apart from the source electrode 102a by a predetermined distance, wherein the pixel electrode 103 is formed of the drain electrode 102b and the first contact hole. In this case, the first contact hole 131 is removed from the passivation layer 119 and the gate insulating layer 118 at the lower side thereof to expose the first light blocking pattern 121. The pixel electrode 103 buried in the first contact hole 131 is contacted with the first light blocking pattern 121 and the drain electrode 102b together. Therefore, the pixel voltage is transferred to the pixel electrode 103 and the first light shielding pattern 121 together through the drain electrode 102b, and the pixel electrode connection pattern and the first light shielding integrated with the pixel electrode 103 are integrated. The first and second storage patterns are integrated together with the pattern 121.

Here, the passivation layer 119 and the gate insulating layer 118 are removed by a predetermined width between the common line 111 and the common electrode connection pattern 114 to form a second contact hole 132, and the second contact hole. The common electrode connection pattern 114 is filled with 132 to be in electrical contact with the common electrode connection pattern 114 and the common line 111. Therefore, the signal applied through the common line 111 is branched and transmitted to each common electrode 104 through the common electrode connection pattern 114.

Hereinafter, the manufacturing method of the transverse electric field type liquid crystal display device of this invention is demonstrated with reference to drawings.

7A to 7C are process plan views for manufacturing the transverse electric field liquid crystal display device of the present invention, and FIGS. 8A to 8C are process cross sectional views for manufacturing the transverse electric field liquid crystal display device of the present invention.

The manufacturing method of the transverse electric field type liquid crystal display device of the present invention includes a plurality of pixel areas on the substrate 100 and proceeds after preparing the first substrate 100 and the second substrate (not shown) facing each other.

7A and 8A, a first metal layer is deposited on the first substrate 100 and selectively removed, thereby protruding from the gate line 101 and the gate line 101 in the first direction. The first and second storage patterns 111a and 111b and the first and second storage patterns 111a at both edge portions of the pixel region in the gate electrode 101a and the second direction crossing the first direction. First and second light blocking patterns 121a and 121b are formed in the pixel area at 111b. At this time, the common line 111 bent together in a direction parallel to the gate line 101 is formed together with the second storage pattern 111b.

7B and 8B, the gate line 101, the gate electrode 101a, the first and second storage patterns 111a and 111b, and the first and second light blocking patterns 121a and 121b are included. The gate insulating layer 118 is formed on the entire surface of the first substrate 100.

Subsequently, an amorphous silicon layer 135a and an impurity layer 135b are sequentially deposited on the gate insulating layer 118 and selectively removed to form a semiconductor layer pattern.

Subsequently, a second metal layer is deposited on the first substrate 100 and selectively removed so as to define a pixel region crossing the gate line 101 to define a data region 102 and the data line 102. The source electrode 102a and the drain electrode 102b protruding from the data line 102 are formed. When the source / drain electrodes 102a and 102b are formed, the impurity layer exposed between the source / drain electrodes 102a and 102b is removed together to form an impurity layer pattern 135b and the amorphous silicon layer ( The semiconductor layer 135 of the laminated body of 135a) and the impurity layer pattern 135b is formed.

Subsequently, a passivation layer 119 is formed on the gate insulating layer 118 including the data line 102, the source / drain electrodes 102a / 102b, and the semiconductor layer 135, and the passivation layer 119 and the gate are formed. A first contact hole 131 exposing a predetermined portion of the drain electrode 102b and a predetermined portion of the first light blocking pattern 121a adjacent thereto by selectively removing the insulating layer 118, and the first storage pattern The method may further include forming a second contact hole 132 exposing a predetermined portion of the common line 111 adjacent to 111a.

7C and 8C, the transparent electrode is formed by filling the first and second contact holes 131 and 132 on the passivation layer 119 including the first and second contact holes 131 and 132. Depositing and selectively removing the light emitting layer, and branching the common electrode connection pattern 114 overlapping the first storage pattern 111a and the common electrode connection pattern 114 to partially remove the second light blocking pattern 121b. Forming a common electrode 104 overlapping each other, and branching the pixel electrode connection pattern 113 overlapping the second storage pattern 111b and the pixel electrode connection pattern 113 to form the first light blocking pattern 121a. ) Is formed to partially overlap the pixel electrode 103. Here, the common electrode connection pattern 114 and the common line 111 are electrically connected through the second contact hole 132. The pixel electrode 103 and the drain electrode 102b are electrically connected to each other through the drain electrode 102b and the lower first light blocking pattern 121a and the first contact hole 131.

Although not shown, a color filter array (not shown) including a black matrix layer and a color filter layer corresponding to the above-described thin film transistor array is formed on the second substrate, and then a liquid crystal is formed between the first and second substrates. Form a layer (not shown).

The transverse electric field type liquid crystal display according to the present invention is based on a horizontal in-plane switching (H-IPS) method, and in order to prevent the occurrence of a driving failure region caused by the foreground line occurring at the edge of the pixel region, A first light shielding pattern is formed on a portion adjacent to one data line to overlap the pixel electrode, and a second light shielding pattern is formed on a portion adjacent to the other data line so as to overlap with the common electrode, thereby minimizing the generation of foreground lines. Can be increased.

In addition, at least two storage capacitors may be formed in one pixel area by forming a storage capacitor formed in an overlap period between the storage pattern and the pixel electrode connection pattern or the common electrode connection pattern on both sides adjacent to the data line. When implemented in the same manner as the capacity of the storage capacitor used in the transverse electric field method, it is possible to reduce the area of the storage pattern used to form the storage capacitor. In addition, when the area of the storage pattern is not reduced, the capacity of the storage capacitor is increased as a whole, thereby securing a margin for securing the storage capacitor.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

The above-described transverse electric field type liquid crystal display device and a manufacturing method thereof have the following effects.

First, the transverse electric field type liquid crystal display device of the present invention is based on a horizontal in-plane switching (H-IPS) method. In order to prevent the occurrence of a driving failure region due to the foreground line occurring at the edge of the pixel region, A first light shielding pattern is formed on a portion of the region adjacent to the data line to overlap the pixel electrode, and a second light shielding pattern is formed on a portion of the region adjacent to the other data line so as to overlap with the common electrode, thereby minimizing foreground lines. This can increase the transmittance.

Second, by forming a storage capacitor formed in an overlap period between the storage pattern and the pixel electrode connection pattern or the common electrode connection pattern on both sides adjacent to the data line, at least two storage capacitors may be formed in one pixel area, thereby providing general horizontality. When implemented in the same manner as the capacity of the storage capacitor used in the transverse electric field method, it is possible to reduce the area of the storage pattern used to form the storage capacitor. In addition, when the area of the storage pattern is not reduced, the capacity of the storage capacitor is increased as a whole, thereby securing a margin for securing the storage capacitor.

Claims (25)

A first substrate and a second substrate facing each other; A plurality of gate lines and data lines defining pixel regions crossing each other on the first substrate and formed in first and second directions, respectively; A thin film transistor formed at an intersection of the gate line and the data line; First and second storage patterns respectively formed at edge portions of a second direction of the pixel area; A common electrode electrically connected to the first storage pattern and branched from the forming portion of the first storage pattern to the pixel area to be spaced apart from the second storage pattern; A pixel electrode electrically connected to the second storage pattern and branched from the forming portion of the second storage pattern to the pixel area so as to be spaced apart from the first storage pattern; A first light shielding pattern formed in a spaced area between the second storage pattern and the common electrode; A second light blocking pattern formed in a spaced area between the first storage pattern and the pixel electrode; And  A transverse electric field liquid crystal display device comprising a liquid crystal layer between the first and second substrates. The method of claim 1, And the common electrode and the pixel electrode are formed of a transparent electrode. The method of claim 2, And the common electrode and the pixel electrode are formed on the same layer. The method of claim 1, And a common line is formed adjacent to the gate line. The method of claim 4, wherein And the second storage pattern is integrally connected to the common line. The method of claim 1, And wherein the common line is bent from the second storage pattern in a direction parallel to the gate line. The method of claim 1, And the first storage pattern and the second storage pattern are formed on the same layer as the gate line. The method of claim 1, And wherein the first storage pattern and the second storage pattern are made of a light shielding metal. The method of claim 1, And a common electrode connection pattern overlapping the first storage pattern on the first storage pattern. The method of claim 9, And a first storage capacitor formed at a portion where the first storage pattern and the common electrode connection pattern overlap each other. The method of claim 10, And the second storage pattern is electrically connected to the common electrode. The method of claim 9, And a pixel electrode connection pattern overlapping the second storage pattern on the second storage pattern. The method of claim 12, And a second storage capacitor is formed at a portion where the second storage pattern and the pixel electrode connection pattern overlap each other. The method of claim 13, And the first storage pattern is electrically connected to the pixel electrode. The method of claim 12, The common electrode connection pattern and the pixel electrode connection pattern are formed on the same layer as the pixel electrode. The method of claim 1, And the first light blocking pattern is integrally formed with the first storage pattern, and the second light blocking pattern is integrally formed with the second storage pattern. The method of claim 1, And the pixel electrode is electrically connected to the thin film transistor. Preparing a first substrate and a second substrate having a plurality of pixel regions and opposing each other; Depositing and selectively removing a first metal layer on the first substrate to form a gate line in a first direction, a gate electrode protruding from the gate line, and the pixel region in a second direction crossing the first direction Forming first and second light blocking patterns on both edge portions of the first and second storage patterns and the first and second storage patterns into the pixel area in the first and second storage patterns; A data line, a source electrode and a drain electrode protruding from the data line in a second direction to deposit a second metal layer on the first substrate and selectively remove the second metal layer to define a pixel area intersecting the gate line. Forming; A common electrode is deposited on the first substrate and selectively removed to form a common electrode connection pattern overlapping the first storage pattern, and a common electrode partially branched into the common electrode connection pattern to partially overlap the second light blocking pattern. Forming a pixel electrode connection pattern overlapping the second storage pattern, and a pixel electrode branched into the pixel electrode connection pattern to partially overlap the first light blocking pattern; And Forming a liquid crystal layer between the first and second substrates. The method of claim 18, The first metal layer is a light shielding metal. The method of claim 18, The transparent electrode may be formed of any one of indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). The method of claim 18, And forming a common line in a first direction integrally with the second storage pattern. The method of claim 18, After selectively removing the second metal layer, forming a passivation layer, and forming a first contact hole and a second contact hole on the drain electrode and the common line, respectively. Method of manufacturing the display device. The method of claim 22, And forming the common electrode connection pattern to electrically connect the common electrode connection pattern and the common line through the second contact hole. The method of claim 22, And forming the pixel electrode to electrically connect the pixel electrode, the drain electrode, and the first light blocking pattern through the drain electrode and the first contact hole. The method of claim 18, And after the selective removal of the first metal layer, forming a gate insulating film over the entire surface of the first substrate.

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