KR20070110592A - Liquid crystal display - Google Patents

Abstract

An LCD is provided to improve the response rate and the transmittance with the increased aperture ratio of the LCD and improve the lateral visibility by forming first and second uneven portions including a plurality of protrusions at an oblique edge of a pixel electrode. A plurality of pixel electrodes(191) are formed on a substrate. Each of the pixel electrodes includes at least one oblique edge. A first uneven portion and a second uneven portion including a plurality of protrusions are formed at the oblique edge. A width of each protrusion of the first uneven portion is wider than a width of each protrusion of the second uneven portion. A height of each protrusion of the first uneven portion is shorter than a height of each protrusion of the second uneven portion. A gate line(121) is formed on the substrate. A data line(179) intersects the gate line. A thin film transistor is connected to the gate line and the data line.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of a pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

4, 5, and 6 are cross-sectional views of the liquid crystal panel assembly shown in FIG. 3 taken along lines IV-IV, V-V, and VI-VI, respectively.

FIG. 7 is a plan view illustrating a pixel electrode of the liquid crystal panel assembly shown in FIG. 3. FIG.

8 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

FIG. 9 is a layout view of a pixel electrode and a common electrode of the liquid crystal panel assembly of FIG. 8. FIG.

10A to 10C are plan views of electrode pieces serving as the basis of the respective subpixel electrodes shown in FIG. 8.

11 is an equivalent circuit diagram of two subpixels of a liquid crystal display according to another exemplary embodiment of the present invention.

12 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

13 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

FIG. 14 is a plan view illustrating a pixel electrode of the liquid crystal panel assembly shown in FIG. 13. FIG.

15 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

16 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

17 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

18 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

19 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

20 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

<Description of Drawing>

12, 22: polarizing plates 11, 21: alignment film

71, 71a-b, 72, 72a-b, 73, 74, 75, 76a-b, 77a-b, 78a-b: common electrode cutout

81, 81a, 81b, 82, 82a, 82b: contact auxiliary member

91, 91a-b, 92a-b, 93a-b, 94a-b, 97, 98a-b, 99a-b: pixel electrode cutout

110, 210: substrate

121, 121a, 121b, 129a, 129b: gate line

124, 124a, and 124b: gate electrode

131: sustain electrode wire

133a, 133b, 133c, 133d, 133e, 133f, and 137: sustain electrode

140: gate insulating film

154, 154a, 154b: semiconductor

161, 163a, 165a, 163b, and 165b: ohmic contact members

171, 171a, 171b, 176, 179, 179a, 179b: data line

173, 173a, and 173b: source electrode

175, 175a, 175b, 177a, 177b: drain electrode

180: shield

181, 181a, 181b, 182, 182a, 182b, 185, 185a, 185b: contact hole

191, 191a, and 191b: pixel electrodes

220: light blocking member 230: color filter

250: overcoat 270: common electrode

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

800: gray voltage generator

The present invention relates to a liquid crystal display device.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two display panels on which an electric field generating electrode such as a pixel electrode and a common electrode are formed, and a liquid crystal layer interposed therebetween. Is applied to generate an electric field in the liquid crystal layer, thereby determining the orientation of the liquid crystal molecules of the liquid crystal layer and controlling the polarization of incident light to display an image.

The liquid crystal display also includes a switching element connected to each pixel electrode and a plurality of signal lines such as a gate line and a data line for controlling the switching element and applying a voltage to the pixel electrode.

Among such liquid crystal display devices, a liquid crystal display device having a vertically aligned mode in which the long axis of the liquid crystal molecules are arranged perpendicular to the upper and lower display panels without an electric field applied to the liquid crystal display device is gaining attention due to its large contrast ratio and wide reference viewing angle. . Here, the reference viewing angle refers to a viewing angle having a contrast ratio of 1:10 or a luminance inversion limit angle between gray levels.

Means for implementing a wide viewing angle in a vertical alignment mode liquid crystal display include a method of forming a cutout in the field generating electrode and a method of forming a protrusion on the field generating electrode. Since the inclination and the projection can determine the direction in which the liquid crystal molecules are tilted, the reference viewing angle can be widened by using these to disperse the oblique directions of the liquid crystal molecules in various directions.

By the way, the part with protrusions or cutouts is difficult to transmit light, so the more they are, the lower the opening ratio. In order to increase the aperture ratio, an ultra-high opening ratio structure in which a pixel electrode is widened is proposed. However, in this case, the distance between the pixel electrodes is close and the distance between the pixel electrode and the data line is also close, so that a strong lateral field is formed near the edge of the pixel electrode. Due to this lateral electric field, the alignment of the liquid crystal molecules is disturbed, resulting in texture or light leakage and a long response time.

In addition, the liquid crystal display of the vertical alignment mode is less lateral visibility than the front visibility. For example, in the case of a patterned vertically aligned (PVA) type liquid crystal display device having an incision, the image becomes brighter toward the side, and in severe cases, the luminance difference between the high grays is disappeared, and the picture may be clumped.

One technical problem to be achieved by the present invention is to improve the response speed and transmittance while increasing the aperture ratio of the liquid crystal display.

Another technical problem to be achieved by the present invention is to improve side visibility.

According to an exemplary embodiment of the present invention, a liquid crystal display includes a substrate and a plurality of pixel electrodes formed on the substrate, wherein the pixel electrode includes at least one hypotenuse, and the hypotenuse First and second uneven portions including a plurality of protrusions are formed, and the width of the protrusion of the first uneven portion is greater than the width of the protrusion of the second uneven portion, and the height of the protrusion of the first uneven portion is the second uneven portion. Lower than the height of the projections.

The semiconductor device may further include a gate line formed on the substrate, a data line crossing the gate line, and a thin film transistor connected to the gate line and the data line.

The device may further include an inclination direction determining member formed on the pixel electrode.

The pixel electrode may include a first peripheral side that is substantially parallel to the data line, and the inclination direction determining member may include a cutout having an oblique portion extending at an oblique angle with the first peripheral side.

The cutout is formed with a third and fourth uneven portion including a plurality of protrusions, the width of the protrusion of the third uneven portion is greater than the width of the protrusion of the fourth uneven portion, the height of the protrusion of the third uneven portion is It may be lower than the height of the projection of the fourth uneven portion.

The pixel electrode may include at least two parallelogram electrodes having different inclination directions.

A liquid crystal display according to another exemplary embodiment of the present invention includes a substrate, a plurality of pixel electrodes formed on the substrate, each pixel including first and second subpixel electrodes, and each of the first and second subpixel electrodes. Includes at least one hypotenuse, a first uneven portion including a plurality of protrusions is formed on the hypotenuse of the first subpixel electrode, and a second unevenness includes a plurality of protrusions on the hypotenuse of the second subpixel electrode. The width | variety of the protrusion of the said 1st uneven part is formed, and the height of the protrusion of a said 1st uneven part is lower than the height of the protrusion of a said 2nd uneven part.

Voltages of the first subpixel electrode and the second subpixel electrode may be different from each other.

The first subpixel electrode and the second subpixel electrode may receive different data voltages obtained from one image information.

A first thin film transistor connected to the first subpixel electrode, a second thin film transistor connected to the second subpixel electrode, a first signal line connected to the first thin film transistor, and connected to the second thin film transistor The display device may further include a second signal line and a third signal line connected to the first and second thin film transistors and intersecting the first and second signal lines.

The first and second thin film transistors may be turned on according to signals from the first and second signal lines, respectively, to transmit signals from the third signal line.

The first and second thin film transistors may be turned on according to signals from the third signal line, respectively, to transmit signals from the first and second signal lines.

The first subpixel electrode and the second subpixel electrode may be capacitively coupled.

The first thin film transistor is connected to the first subpixel electrode, the first signal line is connected to the first thin film transistor, and the second signal line is connected to the first thin film transistor and crosses the first signal line. It may include.

The device may further include an inclination direction determining member formed on the pixel electrode.

The pixel electrode may include a first peripheral side extending substantially in the vertical direction, and the inclined direction determining member may include a cutout having an oblique line extending at an oblique angle with the first peripheral side.

The pixel electrode may include at least two parallelogram electrodes having different inclination directions.

The first subpixel electrode includes one right inclination parallelogram electrode piece and one left inclination parallelogram electrode piece, and the second subpixel electrode is three right inclination parallelogram electrode piece and three left inclination parallelogram shape. It may comprise an electrode piece.

The right inclined parallelogram electrode piece and the left inclination parallelogram electrode piece may be alternately arranged up and down.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 connected to the signal generator 500 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The liquid crystal panel assembly 300 includes a plurality of signal lines (not shown) and a plurality of pixels PX connected to the plurality of signal lines (not shown) and arranged in a substantially matrix form when viewed in an equivalent circuit. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal line includes a plurality of gate lines (not shown) that transmit gate signals (also referred to as "scan signals") and a plurality of data lines (not shown) that transmit data signals. The gate lines extend substantially in the row direction and are substantially parallel to each other, and the data lines extend substantially in the column direction and are substantially parallel to each other.

Each pixel PX, for example, a pixel connected to an i-th (i = 1, 2, ..., n) gate line G _i and a j-th (j = 1, 2, ..., m) data line Dj PX includes a switching element Q connected to the signal line G _i D _j , a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. FIG. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

Referring back to FIG. 1, the gray voltage generator 800 generates a plurality of gray voltages (or reference gray voltages) related to the transmittance of the pixel PX.

The gate driver 400 is connected to the gate line of the liquid crystal panel assembly 300 to apply a gate signal Vg formed by a combination of the gate on voltage Von and the gate off voltage Voff to the gate line.

The data driver 500 is connected to the data line of the liquid crystal panel assembly 300 and selects a gray voltage from the gray voltage generator 800 and applies the gray voltage to the data line as a data signal. However, when the gray voltage generator 800 provides only a predetermined number of reference gray voltages instead of providing all of the voltages for all grays, the data driver 500 divides the reference gray voltages to divide the gray voltages for all grays. Generate and select the data signal from it.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 600, and 800 may be integrated in the liquid crystal panel assembly 300. In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, a liquid crystal panel assembly according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 to 7, and FIGS. 1 and 2 described above.

FIG. 3 is a layout view of a liquid crystal panel assembly according to an exemplary embodiment of the present invention, and FIGS. 4, 5, and 6 respectively illustrate lines IV-IV, V-V, and VI-VI of the liquid crystal panel assembly shown in FIG. 7 is a cross-sectional view of the liquid crystal panel assembly of FIG. 3.

Referring to FIGS. 3, 4, 5, and 6, the liquid crystal panel assembly according to the present exemplary embodiment may be disposed between the lower panel 100 and the upper panel 200 facing each other and the two display panels 100 and 200. The liquid crystal layer 3 present.

First, the lower panel 100 will be described.

A gate conductor including a plurality of gate lines 121 and a plurality of storage electrode lines 131 is formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upward and downward and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal may be mounted on a flexible printed circuit film (not shown) attached to the substrate 110 or directly mounted on the substrate 110, It may be integrated into the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The storage electrode line 131 receives a predetermined voltage and has a stem line extending substantially in parallel with the gate line 121 and a plurality of first, second, third and fourth storage electrodes 133a, 133b, 133c, 133d) a set and a plurality of connections 133e, 133f, 133g. Each of the storage electrode lines 131 is positioned between two adjacent gate lines 121.

The first and second storage electrodes 133a and 133b extend in the vertical direction and face each other, and the third and fourth storage electrodes 133c and 133d also extend in the vertical direction and face each other. The first connector 133e is connected between the second and fourth sustain electrodes 133b and 133d. The second connection portion 133f extends obliquely from the top of the first storage electrode 133a to the bottom of the third storage electrode 133c, and the second connection portion 133g is approximately the bottom of the second storage electrode 133b. Is obliquely extended to the upper end of the fourth sustain electrode 133d at. However, the shape and arrangement of the storage electrode line 131 may be modified in various ways.

The gate conductors 121 and 131 may be formed of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum (Mo), It may be made of molybdenum-based metals such as molybdenum alloys, chromium (Cr), tantalum (Ta), and titanium (Ti). However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium. Good examples of such a combination include a chromium bottom film, an aluminum (alloy) top film, and an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate conductors 121 and 131 may be made of various other metals or conductors.

Side surfaces of the gate conductors 121 and 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate conductors 121 and 131.

On the gate insulating layer 140, a plurality of island semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated as a-Si), polycrystalline silicon, or the like are formed. The semiconductor 154 is positioned over the gate electrode 124.

A pair of island-like ohmic contacts 163 and 165 are formed on the semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide.

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data signal and mainly extends in the vertical direction to cross the gate line 121 and the storage electrode line 131. Each data line 171 extends toward the gate electrode 124 and has a large end portion for connecting the plurality of source electrodes 173 bent in a U shape to another layer or the data driver 500. 179. When the data driver 500 is integrated on the substrate 110, the data line 171 may extend to be directly connected to the data driver 500.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 around the gate electrode 124. Each drain electrode 175 has one wide end and the other end having a rod shape, and the rod end portion is partially surrounded by the source electrode 173.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the semiconductor 154 form one thin film transistor (TFT), and a channel of the thin film transistor. ) Is formed in the semiconductor 154 between the source electrode 173 and the drain electrode 175.

The data conductors 171 and 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum and titanium, or an alloy thereof, and a refractory metal film (not shown) and a low resistance conductive film (not shown). It may have a multi-layer structure including). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data conductors 171 and 175 may be made of various other metals or conductors.

In addition, the data conductors 171 and 175 may be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 below and the data conductors 171 and 175 thereon, and lower the contact resistance therebetween. The semiconductor 154 may be exposed between the source electrode 173 and the drain electrode 175 without being blocked by the data conductors 171 and 175.

A passivation layer 180 is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154. The passivation layer 180 may be made of an inorganic insulator or an organic insulator, and may have a flat surface. The organic insulator preferably has a dielectric constant of 4.0 or less, and may have photosensitivity. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 while maintaining excellent insulating properties of the organic layer.

The passivation layer 180 is formed with a plurality of contact holes 182 and 185 respectively exposing the end portion 179 of the data line 171 and one end of the drain electrode 175, and the passivation layer 180. In the gate insulating layer 140, a plurality of contact holes 181 exposing the end portions 129 of the gate line 121 are formed.

A plurality of pixel electrodes 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 to which the data voltage is applied is formed between the two electrodes 191 and 270 by generating an electric field together with the common electrode 270 of the common electrode display panel 200 to which the common voltage is applied. The direction of the liquid crystal molecules 31 of the liquid crystal layer 3 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules 31 determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The pixel electrode 191 overlaps the storage electrode line 131 including the storage electrodes 133a-133d and the connection parts 133e, 133f, and 133g, and the pixel electrode 191 and the drain electrode 175 electrically connected thereto are held. The capacitor which overlaps with the electrode line 131 is called a "storage capacitor", and the storage capacitor enhances the voltage holding capability of the liquid crystal capacitor.

Each pixel electrode 191 has four peripheral sides substantially parallel to the gate line 121 or the data line 171 and has a substantially rectangular shape in which the left corner is chamfered. The oblique side edges 90a and 90b of the pixel electrode 191 form an angle of about 45 ° with respect to the gate line 121.

Hereinafter, the shape of the pixel electrode 191 will be described in detail with reference to FIG. 7.

A central cutout 91, a lower cutout 94a, and an upper cutout 94b are formed in the pixel electrode 191, and the pixel electrode 191 includes a plurality of cutouts 91, 94a, and 94b. It is divided into partitions of. The cutouts 91, 94a and 94b are almost inverted symmetric with respect to an imaginary transverse centerline bisecting the pixel electrode 191.

The lower and upper cutouts 94a and 94b extend obliquely from the right side to the left side of the pixel electrode 191 and overlap the second and third connection portions 133f and 133g, respectively. The lower and upper cutouts 94a and 94b are positioned at the lower half and the upper half with respect to the horizontal center line of the pixel electrode 191, respectively. The lower and upper cutouts 94a and 94b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121.

The central cutout 91 includes a horizontal portion and a pair of diagonal lines connected thereto. The horizontal portion extends shortly along the horizontal center line of the pixel electrode 191, and the pair of diagonal portions substantially extends toward the right side of the pixel electrode 191 from the horizontal portion with the lower cutout 94a and the upper cutout 94b, respectively. Stretched side by side.

Therefore, the lower half of the pixel electrode 191 is divided into two regions by the lower cutout 94a, and the upper half is also divided into two regions by the upper cutout 94b. In this case, the number of regions or the number of cutouts may vary according to design factors such as the size of the pixel electrode 191, the length ratio of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The lower incision 94a includes a first hypotenuse 92a facing the chamfered hypotenuse 90a and a second hypotenuse 93a facing the oblique portion of the central incision 91. 94b) includes a third hypotenuse 92b facing the chamfered hypotenuse 90b and a fourth hypotenuse 94b facing the oblique portion of the central cutout 91.

Concave-convex portions 193 are formed on the oblique portions of the hypotenuses 90a and 90b, the lower cutout 94a, the upper cutout 92b, and the central cutout 91 of the pixel electrode 191. The uneven portion 193 includes a plurality of protrusions 195, and the protrusions 195 have a substantially rectangular shape.

Projections 195a formed with the chamfered hypotenuses 90a and 90b of the pixel electrode 191, the first hypotenuse 92a of the lower incision 94a and the third hypotenuse 92b of the upper incision 94b. The width W1 of the projections 195b formed on the oblique portion of the central cutout 91, the second hypotenuse 93a of the lower incision 94a and the fourth hypotenuse 93b of the upper incision 94b. ) Is greater than the width W2.

The protrusions 195b formed with the chamfered sides 90a and 90b of the pixel electrode 191, the first hypotenuse 92a of the lower cutout 94a and the third hypotenuse 92b of the upper cutout 94b. The height H1 of the protrusion 195a which is formed in the oblique part of the center incision part 91, the 2nd hypotenuse 93a of the lower incision part 94a, and the 4th hypotenuse 93b of the upper incision part 94b. ) Is greater than the height H2.

That is, the uneven portion 195 is formed differently according to the portion of the pixel electrode 191. As a result, the visibility of the display device may be improved by changing the luminance according to the portion of the pixel electrode 191.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the upper panel 200 will be described.

A light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 is called a black matrix and blocks light leakage between the pixel electrodes 191. The light blocking member 220 includes a linear portion 221 corresponding to the data line 171 and a planar portion 222 corresponding to the thin film transistor, and prevents light leakage between the pixel electrodes 191 and prevents the pixel electrode 191. Define the facing opening area. However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 is also formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The overcoat 250 may be made of an insulating material to prevent the color filter 230 from being exposed and to provide a flat surface. The overcoat 250 may be omitted.

The common electrode 270 is formed on the overcoat 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO, and the plurality of cutouts 71, 72a, and 72b are formed in the common electrode 270.

One set of cutouts 71-72b faces one pixel electrode 191 and includes a central cutout 71, a lower cutout 72a, and an upper cutout 72b. Each of the cutouts 71-72b is disposed between the adjacent cutouts 91-92b of the pixel electrode 191 or between the cutouts 92a and 92b and the concave hypotenuse 90a and 90b of the pixel electrode 191. have. In addition, each cutout 71-72b includes at least one diagonal line extending substantially in parallel with the lower cutout 92a or the upper cutout 92b of the pixel electrode 191. The cutouts 71-72b are almost inverted symmetric with respect to the horizontal center line of the pixel electrode 191.

The lower and upper cutouts 72a and 72b each include an oblique section, a horizontal section and a vertical section. The diagonal portion extends from the upper side or the lower side of the pixel electrode 191 to the left side. The horizontal part and the vertical part extend from each end of the oblique part along the sides of the pixel electrode 191 while overlapping the sides and form an obtuse angle with the oblique part.

The central cutout 71 includes a central transverse portion, a pair of oblique portions and a pair of longitudinal longitudinal portions. The central horizontal portion extends from the left side of the pixel electrode 191 to the right along the horizontal center line of the pixel electrode 191. The pair of oblique portions extends in parallel with the lower and upper cutouts 72a and 72b while forming an obtuse angle with the central horizontal portion from the end of the central horizontal portion toward the right side of the pixel electrode 191. The vertical longitudinal portion extends along the right side of the pixel electrode 191 from the end of the diagonal line and overlaps the right side, and forms an obtuse angle with the diagonal line.

The number of the cutouts 71-72b may also vary according to design factors, and the light blocking member 220 may overlap the cutouts 71-72b to block light leakage near the cutouts 71-72b.

At least one cutout 71-72b, 91-94b may be replaced with a protrusion (not shown) or depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 191 and 270.

Alignment layers 11 and 21 are formed on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers.

Polarizers 12 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers 12 and 22 are orthogonal to each other, and one of the polarization axes is relative to the gate lines 121a and 121b. Side by side is preferred. In the case of a reflective liquid crystal display, one of the two polarizers 12 and 22 may be omitted.

The liquid crystal display may include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit (not shown) for supplying light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 applies the input image signals R, G, and B to the operating conditions of the liquid crystal panel assembly 300 and the data driver 500 based on the input image signals R, G, and B and the input control signal. After properly processing and generating the gate control signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is exported to the gate driver 400, and the data control signal CONT2 and the processed image signal ( DAT) is output to the data driver 500. The output video signal DAT has a predetermined number (or gradation) as a digital signal.

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of transmission of image data to a group of subpixels, a load signal LOAD and a data clock signal for applying a data signal to the liquid crystal panel assembly 300. (HCLK). The data control signal CONT2 is also an inverted signal that inverts the voltage polarity of the data signal relative to the common voltage Vcom (hereinafter referred to as " polarity of the data signal " RVS) may be further included.

In response to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for a group of subpixels, and the gray level corresponding to each digital image signal DAT. By selecting the voltage, the digital image signal DAT is converted into an analog data signal and then applied to the corresponding data line.

The gate driver 400 applies a gate-on voltage Von to the gate line according to the gate control signal CONT1 from the signal controller 600 to turn on the switching element connected to the gate line. Then, the data signal applied to the data line is applied to the corresponding pixel through the turned-on switching element.

When the potential difference occurs at both ends of the liquid crystal capacitor Clc, a primary electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated in the liquid crystal layer 3. [Hereinafter, the pixel electrode 191 and the common electrode 270 will be referred to as "field generating electrodes." Then, the liquid crystal molecules of the liquid crystal layer 3 respond to the electric field, and its long axis is in the direction of the electric field. The angle of inclination is perpendicular, and the degree of change in polarization of incident light in the liquid crystal layer 3 varies according to the degree of inclination of the liquid crystal molecules. This change in polarization is represented by a change in transmittance by the polarizer, through which the liquid crystal display displays an image.

The direction in which the liquid crystal molecules are inclined is primarily due to the incisions 71, 72a, 72b, 91, 94a, and 94b of the field generating electrodes 191 and 270 and the hypotenuses 90a and 90b of the pixel electrode 191. It is determined by the horizontal component produced by the distortion. The horizontal component of this main electric field is substantially perpendicular to the sides of the cutouts 71, 72a, 72b, 91, 94a, 94b and the hypotenuses 90a, 90b of the pixel electrode 191.

Since the liquid crystal molecules on each of the subregions divided by the cutouts 71, 72a, 72b, 91, 94a, and 94b are inclined in a direction perpendicular to the periphery, the four directions are approximately four directions. As described above, when the liquid crystal molecules are inclined in various directions, the reference viewing angle of the liquid crystal display is increased.

As the distance between the cutouts 71, 72a, 72b, 91, 94a, and 94b increases, the transmittance of the liquid crystal display is secured, but the cutouts 71, 72a, 72b, 91, 94a, 94b, or the pixel electrode ( Liquid crystal molecules located at relatively long distances from the hypotenuses 90a and 90b of 191 are less likely to be affected by the electric field. Therefore, the movement of the liquid crystal molecules due to the electric field is slowed, the response speed of the liquid crystal display device is delayed.

When the uneven portions 193 are formed in the cutouts 91, 94a and 94b and the hypotenuses 90a and 90b of the pixel electrode as in the present invention, the cutouts 91, 94a and 94b or the hypotenuses 90a and 90b are formed. It can be easily affected by the electric field it produces. Therefore, the movement of the liquid crystal molecules is faster and the response speed is improved. Also, textures around the cutouts 71, 72a, 72b, 91, 94a, and 94b may be controlled. The response speed of the liquid crystal display device can be improved.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby allocating data signals to all the pixels PX. Is applied to display an image of one frame.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data signal applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). In this case, the polarities of the data signals flowing through one data line are changed (eg, row inversion and point inversion) according to the characteristics of the inversion signal RVS within one frame, or the polarities of the data signals applied to a group of pixels are also different from each other. Can be different (eg invert columns, invert points).

A liquid crystal display according to another exemplary embodiment of the present invention will now be described with reference to FIGS. 8 to 10C.

8 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

The liquid crystal panel assembly according to the present exemplary embodiment also includes a lower panel (not shown) and an upper panel (not shown) facing each other and a liquid crystal layer (not shown) interposed between the two display panels.

The layered structure of the liquid crystal panel assembly according to the present embodiment is usually the same as the layered structure of the liquid crystal panel assembly shown in Figs.

Referring to the lower panel, a plurality of gate conductors including a plurality of gate lines 121 is formed on an insulating substrate (not shown). Each gate line 121 includes a gate electrode 124 and an end portion 129. A gate insulating film (not shown) is formed on the gate conductor 121. An island semiconductor 154 is formed on the gate insulating film, and a plurality of ohmic contacts (not shown) are formed thereon. A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contact member and the gate insulating layer. The data line 171 includes a plurality of source electrodes 173 and end portions 179. A passivation layer (not shown) is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154, and a plurality of contact holes 181, 182, and 185 are formed in the passivation layer and the gate insulating layer. A plurality of pixel electrodes 191 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer. An alignment layer (not shown) is formed on the pixel electrode 191, the contact auxiliary members 81 and 82, and the passivation layer.

Referring to the upper panel, a light blocking member (not shown), a plurality of color filters (not shown), an overcoat (not shown), a common electrode (not shown) on an insulating substrate (not shown), and An alignment film (not shown) is formed.

However, the pixel electrode 191 and the common electrode 270 according to the present exemplary embodiment may have a form different from that of the liquid crystal panel assembly illustrated in FIGS. 3 to 7. Hereinafter, the pixel electrode 191 and the common electrode 270 according to the present exemplary embodiment will be described in detail with reference to FIGS. 9 to 10C and 8.

FIG. 9 is a diagram illustrating a pixel electrode and a common electrode in the liquid crystal panel assembly of FIG. 8, and FIGS. 10A to 10C are plan views of electrode pieces that are the basis of the respective subpixel electrodes shown in FIG. 9.

The pixel electrode 191 shown in FIG. 9 includes at least one parallelogram electrode piece 196 shown in FIG. 10A and one parallelogram electrode piece 197 shown in FIG. 10B. When the electrode pieces 196 and 197 shown in FIGS. 10A and 10B are connected up and down, the base electrodes 198 shown in FIG. 10C are formed. Each of the subpixel electrodes 191a and 191b connects the base electrodes 198. It has a structure based on. An uneven portion 193 is formed on at least one side of the pixel electrode 191. However, in FIG. 9 to FIG. 10C described below for convenience, illustration of the uneven portion 193 is omitted, which will be described later.

As shown in FIGS. 10A and 10B, each of the electrode pieces 196 and 197 has a pair of oblique edges 196o and 197o and a pair of transverse edges 196t and 197t and is approximately Parallelogram. Each of the oblique sides 196o and 197o forms an oblique angle with respect to the horizontal sides 196t and 197t, and the size of the oblique angle is preferably about 45 degrees to 135 degrees. For convenience, it is divided according to the inclined direction ("inclination direction") in the vertical state with respect to the bases 196t and 197t forward, and the case inclined to the right as in FIG. 10A is called "right inclination" and left as in FIG. 8B. The case of tilting is called "left slope".

The lengths of the horizontal sides 196t and 197t of the electrode pieces 196 and 197, that is, the distance between the width W and the horizontal sides 196t and 197t, that is, the height H may be freely determined according to the size of the display panel assembly 300. Can be. In addition, the horizontal edges 196t and 197t of each of the electrode pieces 196 and 197 may be deformed or bent in consideration of a relationship with other portions, and will be referred to as a parallelogram in the future.

The common electrodes 270 are formed with cutouts 61 and 62 facing the electrode pieces 196 and 197, and the electrode pieces 196 and 197 have two subregions (centered around the cutouts 61 and 62). S1, S2). There are at least one notch in the incisions 61, 62. The incisions 61 and 62 form obtuse angles with the oblique portions 61o and 62o and the oblique portions 61o and 62o parallel to the hypotenuses 196o and 197o of the electrode pieces 196 and 197, respectively. And horizontal portions 61t and 62t overlapping the horizontal sides 196t and 197t of.

Each of the subregions S1 and S2 has two primary edges defined by the oblique portions 61o and 62o of the incisions 61 and 62 and the hypotenuses 196t and 197t of the electrode pieces 196 and 197. ) The distance between the periphery, i.e. the width of the subregion, is preferably about 25-40 mu m.

The basic electrode 198 shown in FIG. 10C is formed by combining the right inclined electrode piece 196 and the left inclined electrode piece 197. The angle formed by the right inclined electrode piece 196 and the left inclined electrode piece 197 is preferably approximately right angle, and the connection between the two electrode pieces 196 and 197 is made only in part. The unconnected portion forms the incision 90 and is located on the recessed side. However, the cutout 90 may be omitted.

Outer horizontal sides 196t and 197t of the two electrode pieces 196 and 197 form a horizontal side 198t of the basic electrode 198, and corresponding hypotenuses 196o and 197o of the two electrode pieces 196 are connected to each other. Curved edges 198o1 and 198o2 of the basic electrode 198 are formed.

Curved edges 198o1 and 198o2 meet convex edges 198o1 and transverse sides 198t and obtuse angles such as about 135 ° and acute angles, for example about 45 °. And a concave edge 198o2. The curved sides 198o1 and 198o2 are formed by a pair of hypotenuse sides 196o and 197o at approximately right angles, and thus the angle of bending is approximately right angles.

The cutout 60 extends from the concave vertex CV on the concave side 198o2 to the center of the base electrode 198 toward the convex vertex VV on the convex side 198o1.

In addition, the cutouts 61 and 62 of the common electrode 270 are connected to each other to form one cutout 60. At this time, the horizontal portions 61t and 62t overlapped by the cutouts 61 and 62 are combined to form one horizontal portion 60t1. This new form of incision 60 can be described again as follows.

The cutout 60 is connected to both ends of the bent part 60o having the bend point CP, the central horizontal portion 60t1 connected to the bend point CP of the bent part 60o, and the bent part 60o. And a pair of terminal cross sections 60t2. The bent portion 60o of the incision 60 consists of a pair of oblique portions that meet at right angles, and is substantially parallel to the bend sides 198o1 and 198o2 of the base electrode 198, and the base electrode 198 is left-right and right-sided. Divide into wealth The central horizontal portion 60t1 of the incision 60 forms an obtuse angle, for example about 135 °, with the bend 60o and extends toward the convex vertex VV of the basic electrode 198. The terminal horizontal portion 60t2 is aligned with the horizontal side 198t of the base electrode 198 and forms an obtuse angle with the bend portion 60o, for example, about 135 °.

The base electrode 198 and the incision 60 are approximately inverted symmetric with respect to an imaginary straight line (referred to as a "horizontal center line" forward) connecting the convex vertex (VV) and the concave vertex (CV) of the base electrode 198.

The pixel electrode 191 consists of two left inclined electrode pieces 197 and two right inclined electrode pieces 196, and has a structure substantially the same as that of the basic electrode 198 shown in FIG. 10C. The pixel electrode 191 has a structure that is bent three times, and has a better longitudinal expression than the structure that is curved once.

The pixel electrode 191 has a plurality of horizontal cutouts 91a and 91b and a vertical cutout 95. The vertical cutout 95 extends in parallel with the hypotenuse of the parallelogram electrode pieces 196 and 197. The common electrode 270 has cutouts 71a and 71b facing the pixel electrode 191. The cutouts 71a and 71b extend substantially parallel to the vertical cutout 95 of the pixel electrode 191.

Referring back to FIG. 8, a plurality of uneven parts 193 are formed at each hypotenuse and vertical cutout 95 of the pixel electrode 191. The uneven portion 193 includes a plurality of protrusions 195a and 195b. The sizes of the protrusions 195a and 195b vary depending on the position of the pixel electrode 191. That is, the width W1 of the first protrusion 195a is larger than the width W2 of the second protrusion 195b, and the height H1 of the first protrusion 195b is smaller than the height H2 of the second protrusion 195b.

A liquid crystal panel assembly according to another exemplary embodiment of the present invention will now be described in detail with reference to FIGS. 11 to 14.

11 is an equivalent circuit diagram of two subpixels of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 11, each pixel PX includes a pair of subpixels, and each subpixel includes liquid crystal capacitors Clca and Clcb. At least one of the two subpixels includes a switching element (not shown) connected to the gate line, the data line, and the liquid crystal capacitors Clca and Clcb.

The liquid crystal capacitor Clca / Clcb has two terminals of the subpixel electrode PEa / PEb of the lower panel 100 and the common electrode CE of the upper panel 200, and the subpixel electrodes PEa / PEb and the common electrode. The liquid crystal layer 3 between (CE) functions as a dielectric. The pair of subpixel electrodes PEa and PEb are separated from each other and form one pixel electrode PE. The common electrode CE is formed on the entire surface of the upper panel 200 and receives the common voltage Vcom. The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 may be aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field.

In addition, since the color filter CF and the polarizer (not shown) have been described above, they will be omitted.

Next, a liquid crystal panel assembly according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 12 and 13, and FIGS. 1 and 11 described above.

12 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 12, the liquid crystal panel assembly according to the present exemplary embodiment includes a signal line including a plurality of pairs of gate lines GLa and GLb, a plurality of data lines DL, and a plurality of storage electrode lines SL, and a plurality of connected signal lines. The pixel PX is included.

Each pixel PX includes a pair of subpixels PXa and PXb, and each subpixel PXa / PXb is a switching element connected to a corresponding gate line GLa / GLb and a data line DL, respectively. Qa / Qb, a liquid crystal capacitor Clca / Clcb connected thereto, and a storage capacitor Csta / Cstb connected to the switching element Qa / Qb and the storage electrode line SL.

Each switching element Qa / Qb is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line GLa / GLb, and the input terminal of the data line DL. ) And the output terminal is connected to the liquid crystal capacitor Clca / Clcb and the storage capacitor Csta / Cstb.

The storage capacitor Csta / Cstb, which serves as an auxiliary role of the liquid crystal capacitor Clca / Clcb, is formed by overlapping the storage electrode line SL and the pixel electrode PE provided in the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the storage electrode line SL. However, the storage capacitors Csta and Cstb may be formed such that the subpixel electrodes PEa and PEb overlap the front gate line directly above the insulator.

Since the liquid crystal capacitors Clca and Clcb have been described above, detailed descriptions thereof will be omitted.

In the liquid crystal display including the liquid crystal panel assembly, the signal controller 600 receives the input image signals R, G, and B for one pixel PX and outputs the two subpixels PXa and PXb. The image signal DAT may be converted and transmitted to the data driver 500. Alternatively, the gray voltage generator 800 separately sets the gray voltage sets for the two subpixels PXa and PXb and alternately provides them to the data driver 500, or alternately selects them in the data driver 500. Different voltages may be applied to the subpixels PXa and PXb. However, at this time, it is preferable to correct the image signal or to create a set of gray voltages so that the composite gamma curve of the two subpixels PXa and PXb is close to the reference gamma curve at the front. For example, the composite gamma curve at the front side matches the reference gamma curve at the front side determined to be most suitable for this liquid crystal panel assembly, and the composite gamma curve at the side side is closest to the reference gamma curve at the front side.

Two examples of the liquid crystal panel assembly illustrated in FIG. 12 will be described in detail with reference to FIGS. 13 to 15.

FIG. 13 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention, FIG. 14 is a plan view illustrating a pixel electrode of the liquid crystal panel assembly illustrated in FIG. 13, and FIG. 15 is a liquid crystal panel according to another exemplary embodiment of the present invention. A layout of the assembly.

13 and 15, the liquid crystal panel assembly according to each embodiment also includes a lower panel (not shown) and an upper panel (not shown) facing each other and a liquid crystal layer (not shown) interposed between the two display panels. do.

The layered structure of the liquid crystal panel assembly according to the present embodiment is usually the same as the layered structure of the liquid crystal panel assembly shown in Figs.

Referring to FIGS. 13 and 14, the lower panel includes a plurality of gates including a plurality of pairs of first and second gate lines 121a and 121b and storage electrode lines 131 on an insulating substrate (not shown). A conductor is formed. Each gate line 121a and 121b includes first and second gate electrodes 124a and 124b and end portions 129a and 129b. The storage electrode line 131 includes a storage electrode 137. A gate insulating film (not shown) is formed on the gate conductors 121a, 121b, and 131. First and second island-like semiconductors 154a and 154b are formed on the gate insulating film, and a plurality of ohmic contacts (not shown) are formed thereon. A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contact member and the gate insulating layer. The data line 171 includes a plurality of source electrodes 173 and end portions 179. The drain electrode 175 includes an extension 177 overlapping the sustain electrode 137. A passivation layer (not shown) is formed on the data conductors 171 and 175 and the exposed portions of the semiconductors 154a and 154b, and the plurality of contact holes 181a, 181b, 182, 185a, and 185b are formed in the passivation layer and the gate insulating layer. Is formed. A plurality of pixel electrodes 191 and a plurality of contact auxiliary members 81a, 81b, and 82 are formed on the passivation layer. An alignment layer (not shown) is formed on the pixel electrode 191, the contact auxiliary members 81a, 81b, and 82, and the passivation layer.

The liquid crystal panel assembly of FIG. 15 is similar to the liquid crystal panel assembly of FIG. 13 except that the storage electrode line is omitted and the extension 177 of the drain electrode 175 is not provided.

Referring to the upper panel of the liquid crystal panel assembly according to the exemplary embodiment of FIGS. 13 and 15, a light blocking member (not shown), a plurality of color filters (not shown), an overcoat (not shown) on an insulating substrate (not shown) Not shown), a common electrode (not shown), and an alignment film (not shown) are formed.

13 and 15, unlike the liquid crystal panel assembly of FIGS. 3 to 6, the liquid crystal panel assembly includes first and second subpixel electrodes 191a and 191b having pixel electrodes 191 separated from each other. Include.

Different data voltages, which are set in advance with respect to one input image signal, are applied to the pair of subpixel electrodes 191a and 191b, the size of which is set according to the size and shape of the subpixel electrodes 191a and 191b. Can be. The areas of the subpixel electrodes 191a and 191b may be different from each other. For example, the second subpixel electrode 191b receives a higher voltage than the first subpixel electrode 191a and has a larger area than the first subpixel electrode 191a.

The angle at which the liquid crystal molecules are inclined depends on the intensity of the electric field. Since the voltages of the two liquid crystal capacitors Clca and Clcb are different from each other, the angles at which the liquid crystal molecules are inclined are different and thus the luminance of the two subpixels is different. Therefore, if the voltage of the first liquid crystal capacitor Clca and the voltage of the second liquid crystal capacitor Clcb are properly adjusted, the image viewed from the side may be as close as possible to the image viewed from the front, that is, the side gamma curve may be front gamma curve. As close as possible to this, side visibility can be improved.

In addition, when the area of the first subpixel electrode 191a to which a high voltage is applied is smaller than the area of the second subpixel electrode 191b, the side gamma curve may be closer to the front gamma curve. In particular, when the area ratios of the first and second subpixel electrodes 191a and 191b are approximately 1: 2 to 1: 3, the side gamma curve becomes closer to the front gamma curve, thereby improving side visibility.

The direction of the secondary electric field generated by the voltage difference between the subpixel electrodes 191a and 191b is perpendicular to the periphery of the subregion. Thus, the direction of the negative electric field coincides with the direction of the horizontal component of the main electric field. As a result, the negative electric field between the subpixel electrodes 191a and 191b acts to strengthen the crystal in the oblique direction of the liquid crystal molecules.

In addition, unlike the liquid crystal panel assembly illustrated in FIGS. 3 to 7, the liquid crystal panel assembly according to each of FIGS. 13 and 15 may have two gate lines 121a and 121b, gate electrodes 124a and 124b, and an island type semiconductor ( 154a and 154b, source electrodes 173a and 173b, and drain electrodes 175a and 175b.

The first and second gate electrodes 124a and 124b, the first and second source electrodes 173a and 173b, and the first and second drain electrodes 175a and 175b are formed of the first and second semiconductors 154a and 154b. Together with the first and second thin film transistors (Qa / Qb), the channels of the first and second thin film transistors (Qa / Qb) are formed of the first and second source electrodes ( The first and second semiconductors 154a and 154b are formed between 173a and 173b and the first and second drain electrodes 175a and 175b.

On the other hand, an uneven portion 193 formed of a plurality of protrusions 195a and 195b is formed on each side of the first and second subpixel electrodes 191a and 191b.

The protrusions 195a formed on the first subpixel electrode 191a and the protrusions 195b formed on the second subpixel electrode 191b have different sizes. The width W1 of the protrusion 195a of the first subpixel electrode 191a is greater than the protrusion width W2 of the second subpixel electrode 191b, and the width W1 of the protrusion 195a of the first subpixel electrode 191a is increased. The height H1 is smaller than the height H2 of the protrusion of the second subpixel electrode 191b.

As such, the side visibility may be improved by varying the sizes of the protrusions 195a and 195b according to the first and second subpixel electrodes 191a and 191b.

Meanwhile, the first and second subpixel electrodes 191a and 191b of the liquid crystal panel assembly illustrated in FIGS. 13 and 14 are separated from each other with the gap 97 interposed therebetween.

A central cutout 97, first and second lower cutouts 98a and 99a, and first and second upper cutouts 98a and 98b are formed in the second subpixel electrode 191b.

A plurality of cutouts 73, 74, 75, 76a, 76b, 77a, 77b, 78a, 78b are formed in the common electrode.

On the other hand, the pixel electrode 191 of the liquid crystal panel assembly shown in FIG. 15 includes at least one parallelogram electrode piece 196 shown in FIG. 10A and a parallelogram electrode piece 197 shown in FIG. 10B, similarly to FIG. 8. ) Includes one. When the electrode pieces 196 and 197 shown in FIGS. 10A and 10B are connected up and down, the base electrodes 198 shown in FIG. 10C are formed. Each of the subpixel electrodes 191a and 191b connects the base electrodes 198. It has a structure based on.

The first subpixel electrode 191a consists of a left inclined electrode piece 197 and a right inclined electrode piece 196, and has a structure substantially the same as that of the basic electrode 198 shown in FIG. 10C.

The second subpixel electrode 191b is formed of a combination of two or more left inclined electrode pieces 197 and two or more right inclined electrode pieces 196, and is coupled to the basic electrode 198 illustrated in FIG. 10C. Left and right inclined electrode pieces 196 and 197 are included.

The second subpixel electrode 191b illustrated in FIG. 15 includes six electrode pieces 191b1-191b6, and two of the electrode pieces 191b5 and 191b6 are disposed above and below the first subpixel electrode 191a. It is arranged.

The heights of the intermediate electrode pieces and the electrode pieces disposed above and below are different from each other. For example, the height of the upper and lower electrode pieces is about 1/2 of the intermediate electrode pieces, so that the area ratio of the first subpixel electrode 191a and the second subpixel electrode 191b becomes approximately 1: 2. By adjusting the height of the upper and lower electrode pieces in this way, a desired area ratio can be obtained.

In FIG. 15, the positional relationship and the bending directions of the first and second subpixel electrodes 191a and 191b may be changed, and the pixel electrode 191 of FIG. 9 may be deformed by inverting, symmetrically moving or rotating the pixel electrode 191 of FIG. 9. .

Many features of the liquid crystal panel assembly shown in FIGS. 3 to 7 can also be applied to the liquid crystal panel assembly shown in FIGS. 13 and 14 and the liquid crystal panel assembly shown in FIG. 15.

Next, a liquid crystal panel assembly according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 16 to 18 and FIGS. 1 and 11 described above.

16 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 16, the liquid crystal panel assembly according to the present exemplary embodiment includes a signal line including a plurality of gate lines GL, a plurality of pairs of data lines DLc and DLd, and a plurality of storage electrode lines SL, and a plurality of signal lines connected thereto. The pixel PX is included.

Each pixel PX includes a pair of subpixels PXc and PXd, and each subpixel PXc / PXd is a switching element connected to a corresponding gate line GL and a data line DLc / DLd, respectively. Qc / Qd, a liquid crystal capacitor Clcc / Clcd connected thereto, and a storage capacitor Cstc / Cstd connected to the switching element Qc / Qd and the storage electrode line SL.

Each switching element Qc / Qd is also a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line GL, and the input terminal of the data line DLc / DLd. ), And the output terminal is connected to the liquid crystal capacitor (Clcc / Clcd) and the holding capacitor (Cstc / Cstd).

Operations of the liquid crystal display including the liquid crystal capacitors Clcc and Clcd, the storage capacitors Cstc and Cstd, and the liquid crystal panel assembly as described above are substantially the same as in the foregoing embodiment, and thus detailed description thereof will be omitted. However, in the liquid crystal panel assembly shown in FIG. 12, the two subpixels PXa and PXa constituting one pixel PX receive a data voltage with a parallax, whereas in the present embodiment, the two subpixels PXc and PXd The data voltage is applied at the same time.

Next, two examples of the liquid crystal panel assembly illustrated in FIG. 16 will be described in detail with reference to FIGS. 17 and 18.

17 and 18 are layout views of a liquid crystal panel assembly according to another exemplary embodiment of the present invention, respectively.

As shown in FIGS. 17 and 18, the liquid crystal panel assembly according to the present exemplary embodiment includes a lower panel (not shown) and an upper panel (not shown) facing each other, and a liquid crystal layer (shown between the two display panels). And a pair of polarizers (not shown) attached to the outer surface of the display panel.

The layered structure of the liquid crystal panel assembly according to the embodiment of each of FIGS. 17 and 18 is generally the same as the layered structure of the liquid crystal panel assembly shown in FIGS. 3 and 6.

Referring to the lower panel of the liquid crystal panel assembly according to the exemplary embodiment of FIG. 17, a gate conductor including a plurality of gate lines 121 and a plurality of storage electrode lines 131 is formed on an insulating substrate (not shown). . Each gate line 121 includes a plurality of pairs of first and second gate electrodes 124c and 124d and an end portion 129. Each storage electrode line 131 includes a storage electrode 137. A gate insulating film (not shown) is formed on the gate conductor 121. First and second island-like semiconductors 154c and 154d are formed on the gate insulating film, and a plurality of ohmic contacts (not shown) are formed thereon. A data conductor including a plurality of pairs of first and second data lines 171c and 171d and a plurality of first and second drain electrodes 175c and 175d is formed on the ohmic contact member. The first and second data lines 171c and 171d include a plurality of first and second source electrodes 173c and 173d and end portions 179a and 179b, respectively, and the first drain electrode 175c extends. A portion 177c is included, and the second drain electrode 175d also includes an extension 177d. A protective film (not shown) is formed on the data conductors 171c, 171d, 175c, and 175d and the exposed semiconductors 154c and 154d, and the plurality of contact holes 181, 182c, 182d, 185c and 185d) are formed. A plurality of pixel electrodes 191 including the first and second subpixel electrodes 191a and 191b and a plurality of contact assistants 81, 82c, and 82d are formed on the passivation layer. An alignment layer (not shown) is formed on the pixel electrode 191, the contact auxiliary members 81c, 81d, and 82, and the passivation layer.

Unlike the liquid crystal panel assembly of FIG. 16, the liquid crystal panel assembly according to the exemplary embodiment of FIG. 18 omits the storage electrode line, and the first and second drain electrodes 177c and 177d do not include an extension part.

Referring to the upper panel of the liquid crystal panel assembly of FIGS. 17 and 18, a light blocking member (not shown), a plurality of color filters (not shown), and an overcoat (not shown) are disposed on an insulating substrate (not shown). , A common electrode (not shown), and an alignment film (not shown) are formed.

However, in the liquid crystal panel assembly according to the exemplary embodiment of FIG. 17, the number of gate lines 121 is half and the number of data lines 171c and 171d is twice as compared with the liquid crystal panel assemblies illustrated in FIGS. 13 and 15. . The first and second thin film transistors Qc and Qd connected to the first and second subpixel electrodes 191c and 191d forming one pixel electrode 191 have the same gate line 121 and different data lines ( 171c, 171d).

The pixel electrode 191 of the liquid crystal panel assembly illustrated in FIG. 17 is the same as the pixel electrode 191 of the liquid crystal panel assembly illustrated in FIGS. 13 and 14, and the pixel electrode 191 of the liquid crystal panel assembly illustrated in FIG. 18. Is the same as the pixel electrode 191 of the liquid crystal panel assembly shown in FIG. 15.

Many of the features of the liquid crystal panel assembly illustrated in FIGS. 3 to 15 may also be applied to the liquid crystal panel assembly illustrated in FIGS. 17 and 18.

Next, a liquid crystal panel assembly according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 19 and 20.

19 is an equivalent circuit diagram of one pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 19, the liquid crystal panel assembly according to the present exemplary embodiment includes a signal line including a plurality of gate lines GL and a plurality of data lines DL and a plurality of pixels PX connected thereto.

Each pixel PX includes a pair of first and second subpixels PXe and PXf and a coupling capacitor Ccp connected between the two subpixels PXe and PXf.

The first subpixel PXe includes a switching element Q connected to a corresponding gate line GL and a data line DL, a first liquid crystal capacitor Clce, and a storage capacitor Cst connected thereto. The second subpixel PXf includes a second liquid crystal capacitor Clcf connected to the coupling capacitor Ccp.

The switching element Q is also a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line GL, and the input terminal of which is connected to the data line DL. The output terminal is connected to the liquid crystal capacitor Clce, the holding capacitor Cste, and the coupling capacitor Ccp.

The switching element Q applies the data voltage from the data line DL to the first liquid crystal capacitor Clce and the coupling capacitor Ccp according to the gate signal from the gate line GL, and the coupling capacitor Ccp The voltage is changed in magnitude and transferred to the second liquid crystal capacitor Clcf.

If the common voltage Vcom is applied to the storage capacitor Cste and the capacitors Clce, Cste, Clcf, and Ccp are represented by the same reference numerals, the voltage Ve charged in the first liquid crystal capacitor Clce is assumed to be the same. And the voltage Vf charged in the second liquid crystal capacitor Clcf have the following relationship.

Vf = Ve × [Ccp / (Ccp + Clcf)]

Since the value of Ccp / (Ccp + Clcf) is less than 1, the voltage Vf charged in the second liquid crystal capacitor Clcf is always smaller than the voltage Ve charged in the first liquid crystal capacitor Clce. This relationship holds true even when the voltage applied to the storage capacitor Cste is not the common voltage Vcom.

An appropriate ratio of the first liquid crystal capacitor Clce and the second liquid crystal capacitor Clcf voltage Vf can be obtained by adjusting the capacitance of the coupling capacitor Ccp.

Next, an example of such a liquid crystal panel assembly will be described in detail with reference to FIG. 20.

20 is a layout view illustrating a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 20, the liquid crystal panel assembly according to the present exemplary embodiment also includes a lower panel (not shown) and an upper panel (not shown) facing each other and a liquid crystal layer (not shown) interposed between the two display panels. do.

The layered structure of the liquid crystal panel assembly according to the present embodiment is usually the same as the layered structure of the liquid crystal panel assembly shown in Figs.

Referring to the lower panel, a plurality of gate conductors including a plurality of gate lines 121 is formed on an insulating substrate (not shown). Each gate line 121 includes a gate electrode 124 and an end portion 129. A gate insulating film (not shown) is formed on the gate conductor 121. An island semiconductor 154 is formed on the gate insulating film, and a plurality of ohmic contacts (not shown) are formed thereon. A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contact member and the gate insulating layer. The data line 171 includes a plurality of source electrodes 173 and end portions 179. A passivation layer (not shown) is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154, and a plurality of contact holes 181, 182, and 185 are formed in the passivation layer and the gate insulating layer. A plurality of pixel electrodes 191 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer. An alignment layer (not shown) is formed on the pixel electrode 191, the contact auxiliary members 81 and 82, and the passivation layer.

Referring to the upper panel, a light blocking member (not shown), a plurality of color filters (not shown), an overcoat (not shown), a common electrode (not shown) may be disposed on an insulating substrate (not shown), And an oriented film (not shown) is formed.

The pixel electrode 191 and the common electrode 270 according to the present exemplary embodiment are similar in shape to the pixel electrode 191 and the common electrode 270 of the liquid crystal panel assembly illustrated in FIG. 3. However, unlike FIG. 3, the pixel electrode 191 according to the present exemplary embodiment includes first and second subpixel electrodes 191a and 191b separated from each other. The first subpixel electrode 191a is connected to the drain electrode 175 through the contact hole 185.

In the liquid crystal panel assembly according to the present exemplary embodiment, the drain electrode 175 includes a coupling electrode 176. The coupling electrode 176 extends substantially in parallel with the data line 171, and is formed to have substantially the same shape as the central cutout 71 of the common electrode 270.

The coupling electrode 176 overlaps the second subpixel electrode 191b. The coupling electrode 176 and the second subpixel electrode 191b form a "coupled capacitor" Ccp.

Many features of the liquid crystal panel assembly illustrated in FIGS. 3 to 18 may also be applied to the liquid crystal panel assembly illustrated in FIG. 20.

According to the present invention, it is possible to improve response speed and transmittance while increasing the aperture ratio of the liquid crystal display, and improve side visibility.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (19)

Board, A plurality of pixel electrodes formed on the substrate Including, The pixel electrode includes at least one hypotenuse, The hypotenuse is provided with first and second uneven portions including a plurality of protrusions, The width of the protrusion of the first uneven portion is greater than the width of the protrusion of the second uneven portion, and the height of the protrusion of the first uneven portion is lower than the height of the protrusion of the second uneven portion. Liquid crystal display. In claim 1, A gate line formed on the substrate, A data line intersecting the gate line, and A thin film transistor connected to the gate line and the data line Liquid crystal display further comprising. In claim 2, And an inclination direction determination member formed on the pixel electrode. In claim 3, The pixel electrode includes a first peripheral side that is substantially parallel to the data line, And the inclination direction determining member includes a cutout portion having an oblique portion extending at an oblique angle with the first peripheral portion. In claim 4, The cutout is formed with third and fourth uneven portions including a plurality of protrusions, The width of the protrusion of the third uneven portion is greater than the width of the protrusion of the fourth uneven portion, and the height of the protrusion of the third uneven portion is lower than the height of the protrusion of the fourth uneven portion. Liquid crystal display. In claim 2, The pixel electrode includes at least two parallelogram electrodes having different inclination directions. Board, A plurality of pixel electrodes formed on the substrate and including first and second subpixel electrodes, respectively; Including, Each of the first and second subpixel electrodes includes at least one hypotenuse, A first uneven portion including a plurality of protrusions is formed on the hypotenuse of the first subpixel electrode. On the hypotenuse of the second subpixel electrode, a second uneven portion including a plurality of protrusions is formed. The width of the protrusion of the first uneven portion is greater than the width of the protrusion of the second uneven portion, and the height of the protrusion of the first uneven portion is lower than the height of the protrusion of the second uneven portion. Liquid crystal display. In claim 7, The liquid crystal display of claim 1, wherein the voltages of the first subpixel electrode and the second subpixel electrode are different from each other. In claim 8, The first subpixel electrode and the second subpixel electrode receive different data voltages obtained from one image information. In claim 9, A first thin film transistor connected to the first subpixel electrode, A second thin film transistor connected to the second subpixel electrode, A first signal line connected to the first thin film transistor, A second signal line connected to the second thin film transistor, and A third signal line connected to the first and second thin film transistors and intersecting the first and second signal lines Liquid crystal display further comprising. In claim 10, And the first and second thin film transistors are turned on according to the signals from the first and second signal lines, respectively, to transfer the signals from the third signal line. In claim 10, And the first and second thin film transistors are turned on in response to a signal from the third signal line, respectively, to transmit a signal from the first and second signal lines. In claim 8, The first subpixel electrode and the second subpixel electrode are capacitively coupled. In claim 13, A first thin film transistor connected to the first subpixel electrode, A first signal line connected to the first thin film transistor, and A second signal line connected to the first thin film transistor and intersecting the first signal line Liquid crystal display further comprising. In claim 7, And an inclination direction determination member formed on the pixel electrode. The method of claim 15, The pixel electrode includes a first peripheral side extending substantially in the longitudinal direction, And the inclination direction determining member includes a cutout portion having an oblique portion extending at an oblique angle with the first peripheral portion. In claim 7, The pixel electrode includes at least two parallelogram electrodes having different inclination directions. The method of claim 17, The first subpixel electrode includes one right inclined parallelogram electrode piece and one left inclined parallelogram electrode piece, The second subpixel electrode includes three right inclined parallelogram electrodes and three left inclined parallelogram electrodes. Liquid crystal display. The method of claim 18, The right inclination parallelogram electrode piece and the left inclination parallelogram electrode piece are up and down     Liquid crystal display arranged alternately with.

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