KR20070108719A - Plasma display panel - Google Patents

Abstract

A plasma display panel is provided to reduce a difference of luminance between a center portion and a boundary portion by making a line width of a barrier rib formed in the boundary portion larger than that of a barrier rib formed in the center portion. A first substrate(10) and a second substrate(20) are disposed opposite to each other, and barrier ribs are interposed between the substrates. Each substrate has a center portion formed around a center of an opposite plane and a boundary portion formed around the center portion. Each barrier rib has a first line width between pixels formed in the center portion and a second line width between pixels formed in the boundary portion, in which the first line width is different from the second line width.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

1 is a plan view of a plasma display panel according to an embodiment of the present invention.

FIG. 2 is a perspective view schematically illustrating an exploded view of the plasma display panel of FIG. 1.

3 is a cross-sectional view taken along line III-III of FIG. 2.

4 is a plan view of an arrangement of partition walls and discharge cells for part IV of FIG.

5 is a plan view of a first embodiment of an arrangement of partition walls and discharge cells for part V of FIG.

6 is a plan view of a second embodiment of an arrangement of partition walls and discharge cells for part V of FIG.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel. More particularly, the present invention relates to a plasma display panel that adjusts the line width of partition walls located between neighboring pixels to uniform luminance distribution in the center portion and the outer portion.

In general, a plasma display panel is a visible light of red (R), green (G) and blue (B) generated by exciting the phosphor using a vacuum ultra-violet (VUV) emitted from the plasma obtained through gas discharge It is a display device for implementing an image.

As an example, an AC plasma display panel forms address electrodes on a back substrate and covers the address electrodes with a dielectric layer. The partition walls are disposed between the address electrodes on the dielectric layer to form a stripe shape, and phosphor layers of red (R), green (G), and blue (B) layers are formed on the partition walls. On the front substrate facing the rear substrate, display electrodes composed of a pair of sustain electrodes and scan electrodes are formed along the direction crossing the address electrodes, and a dielectric layer and an MgO protective film cover the display electrodes. The discharge cell is formed at the point where the pair of address electrodes on the rear substrate and the pair of display electrodes on the front substrate cross each other. In the plasma display panel, millions of unit discharge cells are arranged in a matrix form.

The memory characteristic is used to drive the discharge cells of the plasma display panel. In more detail, in order to generate a discharge between the sustain electrode and the scan electrode constituting the pair of display electrodes, a potential difference of more than a specific voltage is required, and the voltage at this boundary is called a firing voltage (Vf). When the scan voltage and the address voltage are respectively applied to the scan electrode and the address electrode, the discharge is started to form a plasma in the discharge cell, and the electrons and ions of the plasma move toward the electrodes having opposite polarities.

On the other hand, a dielectric layer is applied to each electrode of the plasma display panel, so that most of the moved space charges are stacked on the dielectric layer having opposite polarity, so that the net space potential between the scan electrode and the address electrode is originally applied to the address. It becomes lower than voltage Va, discharge becomes weak, and address discharge disappears. At this time, a relatively small amount of electrons are accumulated in the sustain electrode, and a relatively large amount of ions are accumulated in the scan electrode. The charges accumulated on the sustain electrode and the dielectric layer covering the scan electrode are wall charged (Qw). The space voltage formed between the sustain electrode and the scan electrode by these wall charges is referred to as wall voltage (Vw).

Subsequently, when the discharge sustain voltage Vs is applied to the sustain electrode and the scan electrode, the sum of the magnitudes of the discharge sustain voltage Vs and the wall voltage Vw (Vs + Vw) is the discharge start voltage Vf. If higher, sustain discharge occurs in the discharge cell. The vacuum ultraviolet (VUV) generated at this time excites the phosphor and emits visible light through the transparent front substrate.

However, when there is no address discharge between the scan electrode and the address electrode (that is, when no address voltage Va is applied), wall charges do not accumulate between the sustain electrode and the scan electrode, and consequently, the sustain electrode and the scan electrode. There is no wall voltage in between. At this time, only the discharge sustain voltage Vs applied to the sustain electrode and the scan electrode is formed in the discharge cell. Since the discharge sustain voltage is lower than the discharge start voltage Vf, the gas space between the sustain electrode and the scan electrode cannot be discharged.

The plasma display panel discharges gas remaining in the space between the substrates together with impurities through an exhaust port and an exhaust pipe provided at one corner of the rear substrate sealed to the front substrate during the manufacturing process, and discharges the gas into the space. It is formed by recharging the gas.

In addition, since the sustain electrode and the scan electrode apply discharge sustain voltages on both the left and right sides of the substrates, and the address electrodes apply the address voltages on the top, bottom, and both sides of the facing substrate, the voltage gradually increases from the outer edge of the substrate toward the center. A descent occurs.

As described above, due to causes such as poor exhaust at the central part and impurities remaining in the central part, and voltage drop at the central part and thereby poor discharge at the central part, the plasma display panel is more centered at the outer part of the planar state. It has a low luminance distribution at.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display panel which adjusts the line widths of partition walls located between neighboring pixels to make the luminance distribution uniform in the center and outer portions.

According to an embodiment of the present invention, a plasma display panel includes a first substrate and a second substrate that are oppositely sealed to each other by disposing partitions that partition pixels, and the two substrates are planar surfaces of portions facing each other. A central portion formed in a predetermined range at a center, and an outer portion formed at an outer portion of the central portion, wherein the partition wall includes a first line width between the pixels formed in the central portion and the pixel formed at the outer portion It is possible to form the second line width between the different sizes. The second line width may be larger than the first line width.

The second line width may be larger than the first line width.

The two substrates may be formed of a quadrangle having both short sides and both long sides, and the outer portion may include a first outer portion and a second outer portion formed at both short sides at the central portion, and the first outer portion and the The center portion between the second outer portion may include a third outer portion and a fourth outer portion respectively formed on both long sides.

The barrier rib may be formed at the first outer portion and the second outer portion to have a second line width having the same size along the first direction from one long side to another long side.

The barrier rib may have a first line width that divides the pixels in the center portion and a third line width that divides the plurality of discharge cells in each pixel.

The barrier rib may have a second line width dividing the pixels at the first outer portion and the second outer portion to be larger than a fourth line width dividing the plurality of discharge cells from each pixel.

The third line width and the fourth line width may have the same size.

The barrier rib may be formed in the third outer portion and the fourth outer portion with a second line width having the same size along the first direction from the one long side to the other long side.

The barrier rib may have a first line width that divides the pixels in the center portion and a third line width that divides the plurality of discharge cells in each pixel.

The partition wall may have a second line width dividing the pixels at the third and fourth outer portions to be larger than a fourth line width dividing the plurality of discharge cells from each pixel.

The third line width and the fourth line width may have the same size.

The barrier rib may be formed at the third outer portion and the fourth outer portion to have a second line width having the same size along the first direction from the one long side to the other long side.

The barrier rib may have a first line width that divides the pixels in the center portion and a third line width that divides the plurality of discharge cells in each pixel.

The partition wall may have a second line width that divides the pixels at the third and fourth outer portions to have the same size as a fourth line width that divides the plurality of discharge cells in the pixels.

The third line width may have a smaller size than the fourth line width.

The central portion may be formed at 25% of the substrate plane area at the planar center of the substrate.

The second line width may be 3-10% wider than the first line width.

The partition wall may include first partition members that extend in the first direction and are spaced apart from each other in a second direction crossing the first direction.

The partition wall may include second partition wall members extending in the second direction between the first partition members and spaced apart from each other in the first direction.

The second line width may be a line width of the first partition member.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like elements throughout the specification.

1 is a plan view of a plasma display panel according to an embodiment of the present invention.

Referring to this drawing, the plasma display panel is called a first substrate (hereinafter referred to as a "back substrate") 10 and a second substrate (hereinafter referred to as a "front substrate") which are disposed to face each other at predetermined intervals. 20).

FIG. 2 is an exploded schematic perspective view of the plasma display panel of FIG. 1, and FIG. 3 is a cross-sectional view taken along line III-III of FIG.

Referring to these figures, the plasma display panel includes a partition wall 16 between both substrates 10 and 20. The partition wall 16 is formed at a predetermined height between the rear substrate 10 and the front substrate 20 to partition the plurality of discharge cells 17. The discharge cells 17 are filled with a discharge gas (for example, a mixed gas including neon (Ne), xenon (Xe), etc.) so as to generate a vacuum ultraviolet ray by gas discharge, and absorbs the vacuum ultraviolet ray A phosphor layer 19 for emitting visible light is provided.

The plasma display panel includes an address electrode 11 and a first electrode (hereinafter referred to as a “holding electrode”) corresponding to each discharge cell 17 between the rear substrate 10 and the front substrate 20 in order to realize an image by gas discharge. 31 and a second electrode 32 (hereinafter referred to as "scan electrode").

As an example, the address electrode 11 is formed along the first direction (y-axis direction in the drawing) on the inner surface of the back substrate 10 to form discharge cells 17 adjacent to the y-axis direction. Corresponds continuously. In addition, the plurality of address electrodes 11 are arranged side by side to correspond to the discharge cells 17 adjacent to each other in a second direction crossing the y-axis direction (the x-axis direction of the drawing).

The address electrodes 11 are covered with a dielectric layer 13 covering the inner surface of the back substrate 10 as described above. The dielectric layer 13 prevents positive ions or electrons from directly colliding with the address electrode 11 during discharge, thereby preventing damage to the address electrode 11, and also forms and accumulates wall charges. Since the address electrode 11 is disposed on the rear substrate 10 and does not block visible light emitted from the front, the address electrode 11 may be formed of an opaque electrode, that is, a metal electrode having excellent conductivity.

The partition 16 is actually provided on the dielectric layer 13 to partition the discharge cells 17. The partition wall 16 includes first partition wall members 16a extending in the y-axis direction and second partition wall members 16b extending in the x-axis direction between the first partition wall members 16a. Thus, the discharge cells 17 are formed in a matrix structure.

In addition, the partition wall may be formed of first partition wall members extending in the y-axis direction to form discharge cells in a stripe structure (not shown). That is, the discharge cells form a structure that is open along the y-axis direction.

In the first embodiment, the partition wall 16 forming the discharge cells 17 in a matrix structure is illustrated. When the second partition wall members 16b are removed in this state, the partition walls 16 are striped by the first partition wall members 16a. A discharge cell of the structure is formed. Therefore, a separate illustration of the discharge cells of the stripe structure is omitted here.

The phosphor layer 19 formed in each of the discharge cells 17 is coated with a phosphor face on the side of the partition wall 16 and the surface of the dielectric layer 13 positioned between the partition walls 16 and dried and exposed. And developing and firing.

The phosphor layer 19 is formed of phosphors of the same color in the discharge cells 17 formed along the y-axis direction. In addition, the phosphor layer 19 is repeatedly formed by red, green, and blue phosphors in the discharge cells 17 repeatedly disposed along the x-axis direction.

The phosphor layer 19 formed in the discharge cell 17 collides with vacuum ultraviolet rays generated during gas discharge to generate visible light. At this time, as the coating area of the phosphor layer 19 increases, the number of collisions with the vacuum ultraviolet rays increases, so that the amount of visible light generated in the phosphor layer 19 increases, and the luminous efficiency is improved.

On the other hand, the sustain electrode 31 and the scanning electrode 32 are provided on the inner surface of the front substrate 20, the surface discharge structure corresponding to each discharge cell 17 to cause gas discharge in the discharge cells 17 To form. The sustain electrode 31 and the scan electrode 32 extend in the x-axis direction crossing the address electrode 11.

For example, each of the sustain electrode 31 and the scan electrode 32 is a transparent electrode 31a, 32a for generating a discharge and a bus electrode 31b for applying a voltage signal to the transparent electrodes 31a, 32a, respectively. 32b). The transparent electrodes 31 a and 32 a are portions which cause surface discharge in the discharge cell 17 and are formed of a transparent material (for example, indium tin oxide (ITO)) to secure the aperture ratio of the discharge cell 17. The bus electrodes 31b and 32b are formed of a metal material having excellent conductivity to compensate for the high electrical resistance of the transparent electrodes 31a and 32a.

The transparent electrodes 31a and 32a form surface discharge structures with each of the widths W31 and W32 from the outer edge of the discharge cell 17 along the y-axis direction, and form a center portion of each discharge cell 17. To form a discharge gap (G). The bus electrodes 31b and 32b are disposed on the transparent electrodes 31a and 32a, respectively, and extend in the x-axis direction at the outside of the discharge cell 17. Therefore, when the voltage signal is applied to the bus electrodes 31b and 32b, the voltage signal is applied to each of the transparent electrodes 31a and 32a connected to the bus electrodes 31b and 32b.

The sustain electrode 31 and the scan electrode 32 are covered with the dielectric layer 21 while crossing the address electrodes 11 to correspond to the discharge cells 17. The dielectric layer 21 forms and accumulates wall charges during discharge while protecting the sustain electrode 31 and the scan electrode 32 from gas discharge.

The dielectric layer 21 is covered with a protective film 23. For example, the protective film 23 is formed of transparent MgO to protect the dielectric layer 21, thereby increasing the secondary electron emission coefficient during discharge.

During the plasma display panel driving, a reset discharge is generated by a reset pulse applied to the scan electrode 31 in the reset period, and the scan pulse and the address electrode applied to the scan electrode 32 in the addressing period following the reset period. The address discharge is caused by the address pulse applied to 11), and then the sustain discharge is generated by the sustain pulse applied to the sustain electrode 31 and the scan electrode 32 in the sustain period.

The sustain electrode 31 and the scan electrode 32 serve as electrodes for applying sustain pulses required for sustain discharge, and the scan electrodes 32 serve as electrodes for applying reset pulses and scan pulses. The electrode 11 serves as an electrode for applying an address pulse. The sustain electrode 31, the scan electrode 32, and the address electrode 11 may have different roles depending on the voltage waveforms applied to the respective electrodes, and the present invention is not necessarily limited to these roles.

The plasma display panel selects the discharge cells 17 to be turned on by the address discharge due to the interaction between the address electrode 11 and the scan electrode 32, and the interaction between the sustain electrode 31 and the scan electrode 32. The selected discharge cells 17 are driven by the sustain discharge, thereby realizing an image.

Referring back to FIG. 1, the back substrate 10 and the front substrate 20 are arranged in a displaced structure such that the back substrate 10 and the front substrate 20 overlap with each other and have a single portion to form a plasma display panel. The frit line FL applied to the overlapping boundary seals the back substrate 10 and the front substrate 20 with each other.

The plasma display panel as described above includes a display area DA including a plurality of discharge cells 17 for implementing an image, and a non-display area disposed along the circumference of the display area DA to not implement an image ( ND) (see FIG. 1).

In the plasma display panel, the non-display area ND may mean all areas except the display area DA, but the buffer area BA is provided around both ends of the y-axis direction of the display area DA. It may also include.

For example, both substrates 10 and 20 forming the display area DA may be defined by being divided into various parts as shown in FIG. 1, and the center part 50 and the outer part 60 are largely defined. Can be defined by partitioning.

The central portion 50 is partitioned into a predetermined range at the center of the plane (xy plane) of both substrates 10 and 20 facing each other. The outer portion 60 is formed at the outer portion of the central portion 50 and is divided into an area except the central portion 50 in the display area DA.

As described above, the present embodiment divides the display area DA into two parts of the center part 50 and the outer part 60 for convenience of description. However, in order to improve the uniformity of the luminance distribution more precisely, The description can be divided into parts.

That is, in FIG. 1, the display area DA is divided into sixteen parts, but hereinafter, the display area DA is divided into two parts, a central part 50 corresponding to 4/16 and an outer part 60 corresponding to 12/16. Will be explained. That is, the center part 50 may occupy about 25% of the area of the display area DA. The area of the central portion 50 is set in an appropriate range depending on the length of the sustain electrode 31, the scan electrode 32, and the address electrode 11 according to the sizes of the substrates 10 and 20 and the distribution of residual impurities. do.

The sustain electrode 31, the scan electrode 32, and the address electrode 11 are supplied with a voltage at the outer portion 60, and the applied voltage is caused to drop to the central portion 50 along the electrodes. In addition, impurities that are not discharged during exhaust may remain in the central portion 50 more than the outer portion 60.

In the display area DA, the central portion 50 has a substantially lower luminance than the outer portion 60 due to such a voltage drop and poor exhaust, and the outer portion 60 has a central portion 50. It has a higher luminance than that.

As a method for making the luminance of the central portion 50 and the luminance of the outer portion 60 more uniform, there may be a method of increasing the luminance of the central portion 50 or lowering the luminance of the outer portion 60.

To this end, the first line width W1 of the partition wall 16 between the pixels P50 formed in the central part 50 and the second line of the partition wall 16 between the pixels P60 formed in the outer part 60. The line width W2 can be formed in another size (see Fig. 4).

One of the pixels P50 of the central portion 50 or the pixels P60 of the outer portion 60 is a minimum unit for implementing an image, for example, red (R), green (G), and blue. It is formed of three discharge cells 17 having (B).

In the present embodiment, the partition wall 16 forming the second line width W2 of the partition wall 16 provided in the outer portion 60 is larger than the first line width W1 of the partition wall 16 provided in the central portion 50. ) Is illustrated.

For example, the second line width W2 is formed to be 3-10% wider than the first line width W1. As an example, when the first line width W1 is 190-194 μm, the second line width W2 is 200 μm.

By adjusting the relative sizes of the first line width W1 dividing the pixels P50 in the central portion 50 and the second line width W2 dividing the pixels P60 in the outer portion 60, the display area ( The area of the phosphor layer 19 formed in the discharge cells 17 of the central portion 50 and the phosphor layer 19 formed in the discharge cells 17 of the outer portion 60 within the same area of the DA). The size of the area is different.

As the second line width W2 of the partition wall 16 partitioning the pixels P60 in the outer portion 60 increases, the discharge cells 17 and the same are formed in the same area of the display area DA. The area of the phosphor layer 19 becomes small.

That is, when the second line width W2 of the outer partition 60 partition wall 16 is larger than the first line width W1 of the central partition 50 partition wall 16, when the same area is referenced, the center portion 50 ), The area of the discharge cell 17 and the phosphor layer 19 becomes larger than the area of the discharge cell 17 and the phosphor layer 19 in the outer portion 60.

As such, due to the increase in the area of the phosphor layer 19 relative to the central portion 50, the pixels P50 of the central portion 50 substantially compensate for the luminance lowered by the voltage drop or the impurities contained in the discharge gas.

Meanwhile, both substrates 10 and 20 each have a quadrangle having left and right short sides 10a and 20a and upper and lower long sides 10b and 20b, respectively (see FIG. 1). Therefore, the central portion 50 is formed in a rectangle in the center of the display area DA, and the outer portion 60 has a shape in which the central portion 50 of the square is removed from the square.

In addition, the outer portion 60 is the first outer portion 61 and the second outer portion 62, and the first outer portion 61 formed on the outer both short sides (10a, 20a) of the central portion 50, respectively And a third outer portion 63 and a fourth outer portion 64 which are formed at both outer sides 10b and 20b of the central portion 50 between the second outer portion 62 and the second outer portion 62.

4 is a plan view of an arrangement of partition walls and discharge cells for part IV of FIG.

Referring to this figure, the arrangement of the partition wall 16 and the discharge cells 17 is a structure that is applied between the first outer portion 61 and the central portion 50 of the outer portion 60 and the second outer portion ( 62) and the central portion 50 is applied to the structure.

Since the two structures are identical to each other, it will be described here as a structure applied between the first outer portion 61 and the central portion 50 for convenience.

The partition wall 16 of the central portion 50 is formed with a first line width W1, and the partition wall 16 of the first outer portion 61 is formed with a second line width W2 larger than the first line width W1. .

The second line width W2 of the partition 16 formed in the first outer portion 61 is the line width of the first partition member 16a extending in the y-axis direction. The first partition wall member 16a is formed in the same size, that is, the second line width W2 along the y-axis direction.

The second line width may also be applied to the second partition member 16b, but a description thereof will be omitted (not shown).

Meanwhile, in the central portion 50, the partition wall 16 is formed to have a first line width W1 that partitions the pixels P50, and a plurality of discharge cells between the pixels P50 of the central portion 50. It is formed with the 3rd line width W3 which divides 17). In addition, the first line width W1 and the third line width W3 are formed in the same size.

In addition, the partition 16 in the first outer portion 61 is formed with a second line width W2 that partitions the pixels P60, and between the pixels P60 of the first outer portion 61. The fourth line width W4 may be formed to partition the plurality of discharge cells 17. In addition, the second line width W2 is larger than the fourth line width W4.

Due to the difference in size between the first line width W1 and the second line width W2, the phosphor layer at the central portion 50 is larger than the area of the phosphor layer 19 at the first outer portion 61 based on the same area. The area of 19 becomes larger. Therefore, despite the voltage drop or the impurities contained in the discharge gas, the pixel P50 of the central portion 50 is compensated for luminance to give the same luminance as the pixel P60 of the first outer portion 61.

In addition, the third line width W3 and the fourth line width W4 are formed in the same size. In this case, the area occupied by the unit pixel P60 and the second line width W2 in the outer portion 60 is larger than the area occupied by the unit pixel P50 and the first first line width W1 in the central portion 50. It becomes big.

In contrast, if the area occupied by the unit pixel and the first line width in the center portion and the area occupied by the unit pixel and the second line width in the outer portion are equal, the fourth line width becomes smaller than the third line width (not shown).

5 is a plan view of a first embodiment of an arrangement of partition walls and discharge cells for part V of FIG.

Referring to this figure, the arrangement of the partition wall 16 and the discharge cells 17 is a structure that is applied between the third outer portion 63 and the center portion 50 of the outer portion 60 and the fourth outer portion ( 64) and the center portion 50 is a structure applied.

Since the two structures are the same, it will be described as a structure applied between the third outer portion 63 and the central portion 50 for convenience.

As described with reference to FIG. 4, the partition wall 16 of the central portion 50 has a first line width W1, and the partition wall 16 of the third outer portion 63 has a second larger than the first line width W1. It is formed with the line width W2.

The second line width W2 of the partition wall 16 formed in the third outer portion 63 is the line width of the first partition member 116a extending in the y-axis direction. The first partition wall member 116a has a first line width W1 of the central portion 50 along the y-axis direction, and is connected to the first line width W1 and formed to be larger than the first line width W1. The second line width W2 of the portion 63 is formed. That is, the first partition member 116a is formed to have a narrow first line width W1 at the central portion 50 and a wide second line width W2 at the outer portion 60.

As described above, the partition wall 16 in the central portion 50 is formed with a first line width W1 that partitions the pixels P50, and a plurality of discharges are formed between the pixels P50 of the central portion 50. It is formed with a third line width W3 which partitions the cells 17. 4, the first line width W1 and the third line width W3 have the same size.

In addition, in the third outer portion 63, the partition wall 16 is formed to have a second line width W2 dividing the pixels P60, and between the pixels P60 of the third outer portion 63. The fourth line width W14 may be formed to partition the plurality of discharge cells 17. In addition, the second line width W2 is formed larger than the fourth line width W14, and the third line width W3 and the fourth line width W14 are formed to have the same size.

Due to the difference in magnitude between the first line width W1 and the second line width W2 and the same size of the third line width W3 and the fourth line width W14, the third outer portion 63 is based on the same area. ), The area of the phosphor layer 19 in the central portion 50 is relatively larger than that of the phosphor layer 19. Therefore, despite the voltage drop or the impurities contained in the discharge gas, the pixel P50 of the central portion 50 is relatively compensated for and has the same luminance as the pixel P60 of the third outer portion 63.

6 is a plan view of a second embodiment of an arrangement of partition walls and discharge cells for part V of FIG.

The arrangement structure of the partition walls and the discharge cells as in the second embodiment is similar to that in FIG. 5 showing the first embodiment, and thus, the structure will be described in comparison with the first embodiment.

The second line width W2 of the first embodiment is formed to be larger than the fourth line width W14, whereas the second line width W2 of the second embodiment is of the same size as the fourth line width W24.

As the second line width W2 and the fourth line width W24 have the same size, the discharge cells 117 have different sizes in the pixel P60 of the third outer portion 63 of the first embodiment. Although formed including the discharge cells 117, the discharge cells 217 are formed to have the same size in the pixel P60 of the third outer portion 63 of the second embodiment.

Accordingly, in the first embodiment, the discharge cells 117 of the third outer portion 63 emit different amounts of visible light, and each of the discharge cells 217 of the pixels P60 of the third outer portion 63 is discharged. ) Will emit the same amount of visible light.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the scope of the invention.

As described above, according to the plasma display panel according to the present invention, since the line width of the partition wall partitioning the pixels is formed larger at the outer portion thereof than at the center portion of the substrate, the phosphor layer formed in the discharge cell based on the same area. It is effective to form a coating area of the wider at the center than at the outer portion. Therefore, the area of the phosphor layer where the vacuum ultraviolet ray collides in the discharge cell is made larger in the center than in the outer part, thereby increasing the amount of visible light generated in the center part, thereby reducing the luminance difference generated between the center part and the outer part, There is an effect of improving the uniformity of the luminance in the area of.

Claims (20)

A first substrate and a second substrate which are disposed to face each other so as to be offset from each other by interposing a partition wall partitioning pixels; Both substrates, A central portion formed in a predetermined range at the center of the plane of the portions facing each other, Including an outer portion formed on the outer edge of the central portion, The partition wall, And a first line width between the pixels formed in the center portion and a second line width between the pixels formed in the outer portion with different sizes. According to claim 1, And the second line width is greater than the first line width. The method of claim 2, The both substrates, Consists of a rectangle with both short sides and both long sides, The outer portion, A first outer portion and a second outer portion formed at both short sides at the central portion, and And a third outer portion and a fourth outer portion respectively formed at both long sides at the center portion between the first outer portion and the second outer portion. The method of claim 3, wherein The partition wall, In the first outer portion and the second outer portion, And a second line width of the same size in the first direction from the one long side to the other long side. The method of claim 4, wherein The partition wall, A first line width dividing the pixels at the central portion; And a third line width dividing a plurality of discharge cells in each pixel, the same size. The method of claim 5, The partition wall, A second line width dividing the pixels at the first outer portion and the second outer portion; And a size larger than a fourth line width divided into a plurality of discharge cells in each pixel. The method of claim 6, And the third line width and the fourth line width have the same size. The method of claim 3, wherein The partition wall, In the third outer portion and the fourth outer portion, And a second line width of the same size in the first direction from the one long side to the other long side. The method of claim 8, The partition wall, A first line width dividing the pixels at the central portion; And a third line width dividing a plurality of discharge cells in each pixel, the same size. The method of claim 9, The partition wall, A second line width dividing the pixels at the third and fourth outer portions; And forming a size larger than a fourth line width divided into a plurality of discharge cells in each pixel. The method of claim 10, And the third line width and the fourth line width have the same size. The method of claim 3, wherein The partition wall, In the third outer portion and the fourth outer portion, And a second line width of the same size in the first direction from the one long side to the other long side. The method of claim 12, The partition wall, A first line width dividing the pixels at the central portion; And a third line width dividing a plurality of discharge cells in each pixel, the same size. The method of claim 13, The partition wall, A second line width dividing the pixels at the third and fourth outer portions; And a plasma display panel having a size equal to a fourth line width divided into a plurality of discharge cells in each pixel. The method of claim 14, And the third line width is smaller than the fourth line width. The method of claim 2, And the center portion is formed at 25% of the substrate plane area from the planar center of the substrate. The method of claim 2, And the second line width is 3-10% wider than the first line width. The method of claim 2, The partition wall, And first partition members extending in the first direction and spaced apart from each other in a second direction crossing the first direction. The method of claim 18, The partition wall, And second barrier rib members extending in the second direction between the first barrier members and spaced apart from each other in the first direction. The method of claim 19, And the second line width is a line width of the first partition member.

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