KR20070097199A - Apparatus for driving plasma display panel and method thereof - Google Patents

Abstract

An apparatus and a method for driving a display panel are provided to reduce EMI(Electro Magnetic Interference) due to abrupt address voltage variation by setting a time difference in a start timing of data pulses on a first scan pulse in respective address blocks. A display panel includes discharge cells on cross sections, which scan and address electrodes(Y1-Yn,BA(1)-BA(K)) are formed to cross with each other. Plural subfields for time grayness display are existed based on grayness weighted values by every frames. Each of subfields includes reset, address, and sustain discharge periods(PR,PA,PS). During the address period, a scan pulse having a second level(Vscl) is sequentially applied while biasing the scan electrodes to a first level(Vsch) and a data pulse synchronized with the scan pulse is supplied to the address electrodes corresponding to selected discharge cells, such that address discharge is generated. The display panel is divided into plural blocks, which includes at least one or more the address electrodes. The data pulse corresponding to first scan pulse has a time difference for every blocks.

Description

Apparatus for driving plasma display panel and method

1 is an internal perspective view showing the structure of a three-electrode surface discharge plasma display panel.

FIG. 2 is a diagram schematically illustrating a division of the plasma display panel of FIG. 1 into a plurality of address blocks for a method of driving the plasma display panel according to the present invention.

FIG. 3 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for driving the plasma display panel of FIG. 1.

4 is a timing diagram illustrating a method of driving a plasma display panel in which a unit frame is configured by driving a plurality of subfields.

FIG. 5 is a timing diagram illustrating an embodiment of a driving signal output from each driving unit of FIG. 3 in the method of driving a plasma display panel according to an exemplary embodiment of the present invention.

<Explanation of symbols for main parts of the drawings>

22: logic controller, 23: address driver,

24: X driver, 25: Y driver.

The present invention relates to a driving apparatus for a display panel and a driving method thereof, and more particularly, scan pulses are sequentially applied to scan electrode lines, and data pulses are applied to address electrode lines corresponding to discharge cells to be displayed. The present invention relates to a driving device for a display panel and a driving method thereof for driving the selected discharge cells to be selected by the generated address discharge.

As flat panel display devices, plasma display panels (PDPs), which are easy to manufacture large panels, have attracted attention. A plasma display panel is a display device that displays an image by using a discharge phenomenon. In general, a plasma display panel can be classified into a direct current type and an alternating current type according to the type of driving voltage. Due to the disadvantages, the development of the AC plasma display panel has been made a lot.

An AC plasma display panel includes a three-electrode AC surface discharge type plasma display panel having three electrodes and driven by an AC voltage. A typical three-electrode surface discharge type plasma display panel is composed of a multi-layered plate, which is spatially advantageous because it can provide a thinner, lighter, and wider screen than a conventional cathode ray tube (CRT).

As an example of a conventional plasma display panel, a three-electrode surface discharge plasma display panel, a driving device, and a driving method thereof are disclosed in US Patent No. 6,744,218 (name: Method of driving a plasma display panel in which). the width of display sustain pulse varies). Matters related to the plasma display panel, the driving apparatus, and the driving method disclosed in the above-mentioned US patent are included in the present specification, and a detailed description thereof will be omitted.

The plasma display panel includes a plurality of display cells formed in an area where the sustain electrode and the address electrode cross each other, and one display cell includes three discharge cells (red, green, and blue). The gray level of the image is expressed by adjusting the discharge state.

In order to express the gray scale of the plasma display panel, one frame applied to the plasma display panel may be configured with eight subfields having different emission counts to express 256 gray scales. That is, in the case where the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. There is a reset period, an address period, and a sustain discharge period in each of the sub-fields to drive the plasma display panel.

In the reset cycle, all discharge cells are initialized. In the next address period, a scan pulse is sequentially applied to each scan electrode, and a data pulse synchronized with the scan pulse is applied to an address electrode corresponding to a discharge cell to be displayed among the discharge cells, thereby displaying a discharge. Select the cell. In the subsequent sustain discharge cycle, sustain pulses are applied to the sustain electrode and the scan electrode so that the sustain discharge can occur only in the discharge cells to be displayed, thereby expressing an image.

After all the scan electrodes are biased to a constant level of voltage before the scan pulse is applied in the address period, the scan pulses are sequentially applied to each scan electrode. When address discharge occurs in all discharge cells defined by the first scan line, data pulses are simultaneously applied to all address electrodes in synchronization with the first scan pulse.

At this time, since a pulse voltage is applied to all address electrodes at the same time, a sudden current change occurs at all address electrodes, thereby causing a large EMI (Electro-Magnetic Interference). This is the same even when the entire screen is turned on.

SUMMARY OF THE INVENTION An object of the present invention is to divide a panel into a plurality of address blocks and to time the start timing of the data pulses with respect to the first scan pulse for each address block, thereby reducing EMI due to sudden address voltage changes. A driving device of a display panel and a driving method thereof are provided.

According to the present invention, for a display panel in which discharge cells are formed in an area where a scan electrode and an address electrode intersect, a plurality of sub-fields according to gray weights exist for time division gray scale display for each frame as a display period. The sub-field includes a reset period, an address period, and a sustain discharge period, and in the address period, a scan pulse of a second level is sequentially applied while the scan electrodes are biased to the first level, and the selected A data pulse synchronized with the scan pulse is applied to the address electrodes corresponding to the discharge cell, so that an address discharge occurs, and the display panel is divided into a plurality of blocks formed of at least one set of the address electrodes, and the first scan The data pulses corresponding to the pulse A driving method of a display panel having a time difference for each block is provided.

Preferably, the address period includes a biasing initialization period before the first scan pulse is applied after the scan electrodes are biased to the first level.

Preferably, data pulses applied for each block for the first scan pulse are started in the biasing initialization period.

The blocks of the address electrodes are divided in order from one side of the display panel to the other side,

It is preferable that data pulses applied to each block with respect to the first scan pulse are sequentially applied from one side to the other side of the display panel.

Preferably, the time difference between the data pulses applied for each block with respect to the first scan pulse is constant.

Discharge cells are formed in the region where the display panel intersects the X electrode, the Y electrode and the address electrode, and the Y electrode becomes the scan electrode.

According to another aspect of the present invention, for a display panel in which discharge cells are formed in an area where a scan electrode and an address electrode intersect, a plurality of sub-fields according to gray weights exist for time division gray scale display for each frame as a display period, Each of the sub-fields includes a reset period, an address period, and a sustain discharge period, wherein a second level scan pulse is sequentially applied to the address period while the scan electrodes are biased to the first level. And a data pulse synchronized with the scan pulse is applied to the address electrodes corresponding to the selected discharge cell to generate an address discharge, and the display panel is divided into a plurality of blocks including at least one set of the address electrodes. The day corresponding to the first said scan pulse The gate pulses provide a driving device of the display panel in which the blocks differ in time.

Discharge cells are formed in an area where the display panel intersects the X electrode, the Y electrode and the address electrode, and the Y electrode becomes a scan electrode.

A logic controller for generating a drive control signal including an X drive control signal, a Y drive control signal, and an A drive control signal according to an image signal to be displayed, and an X that processes the X drive control signal and applies it to the X electrodes It is preferable to include a driving unit, a Y driving unit for processing the Y driving control signal and applying it to the Y electrodes, and an address driving unit for processing and applying the A driving control signal to the address electrodes.

According to the present invention, by dividing the panel into a plurality of address blocks and time difference in the start timing of the data pulse with respect to the first scan pulse for each address block, it is possible to reduce EMI due to a sudden change in the address voltage. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an internal perspective view showing the structure of a three-electrode surface discharge plasma display panel. FIG. 2 is a diagram schematically illustrating a division of the plasma display panel of FIG. 1 into a plurality of address blocks for a method of driving the plasma display panel according to the present invention.

Referring to the drawings, between the front and rear glass substrates 10 and 13 of the surface discharge plasma display panel 1, the address electrode lines A _{R1 to} A _Bm , the dielectric layers 11 and 15, and the Y electrode line (Y ₁ to Y _n ), X electrode lines (X ₁ to X _n ), fluorescent layer 16, partition wall 17, and magnesium monoxide (MgO) layer 12 as a protective layer are provided.

The address electrode lines A _{R1 to} A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is applied to the entire surface in front of the address electrode lines A _{R1 to} A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _{R1 to} A _Bm . The partition walls 17 function to partition the discharge area of each discharge cell 14 and to prevent optical cross talk between the discharge cells 14. The fluorescent layer 16 is formed on the inner surface of the space formed between the lower dielectric layer 15 and the partition walls 17 formed on the rear glass substrate 13.

The X electrode lines X ₁ to X _n and the Y electrode lines Y ₁ to Y _n have a constant pattern on the rear side of the front glass substrate 10 to be orthogonal to the address electrode lines A _{R1 to} A _Bm . Is formed. Each intersection sets a corresponding discharge cell 14. Each X electrode line (X _{1 to} X _n ) and each Y electrode line (Y _{1 to} Y _n ) are combined with a transparent electrode line made of a transparent conductive material such as indium tin oxide (ITO) and a metal electrode line for increasing conductivity. Is formed. Here, the X electrode lines X ₁ to X _n become sustain electrodes in the respective discharge cells 14, and the Y electrode lines Y ₁ to Y _n correspond to scan electrodes in the respective discharge cells 14. And become an address electrode in the discharge cell 14 of each of the address electrode lines A _{R1 to} A _Bm .

In this case, scan electrodes are sequentially applied to select discharge cells to be displayed on the Y electrode lines. In this embodiment, a three-electrode surface discharge plasma display panel is shown. However, the present invention is not limited thereto, and the present invention may be variously applied, such as a ring discharge display panel in which an electrode surrounds a discharge space in a partition wall, or a two-electrode display panel having a scan electrode and an address electrode.

As shown in FIG. 2, the plasma display panel 1 to which the driving method and the driving apparatus according to the present invention are applied includes a plurality of blocks BA (1) to BA (k) formed of a set of at least one address electrode. Are divided into The blocks BA (1) to BA (k) may be sequentially divided from one end of the panel, that is, the left end of the drawing, to the other end of the panel, that is, the right end of the drawing.

FIG. 3 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for driving the plasma display panel of FIG. 1.

Referring to the drawing, the driving device 20 of the plasma display panel 1 includes an image processor 21, a logic controller 22, an address driver 23, an X driver 24, and a Y driver 25. do. The image processor 21 converts an external analog image signal into a digital signal to generate internal image signals. The internal video signal may be 8 bits of red (R), green (G), and blue (B) image data, a clock signal, a vertical and horizontal synchronization signal, and the like. The logic controller 22 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 21.

In this case, the driving unit such as the address driver 23, the X driver 24, and the Y driver 25 receives input from the driving control signals S _A , S _Y , and S _X , and generates respective driving signals. The applied driving signal to each of the electrode lines.

That is, the address driver 23 applies the display data signal corresponding to the address signal S _A input from the logic controller 22 to the address electrode lines. The X driver 24 processes the X driving control signal S _X input from the logic controller 22 and applies the X driving control signal S _X to the X electrode lines. The Y driver 25 processes the Y drive control signal S _Y input from the logic controller 22 and applies it to the Y electrode lines.

The driving apparatus of the plasma display panel according to the present embodiment is to drive the display panel by the driving method shown in FIG. 5.

4 is a timing diagram illustrating a method of driving a plasma display panel in which a unit frame is configured by driving a plurality of subfields.

Referring to the drawing, the unit frame FR is divided into eight subfields SF1 to SF8 to realize time division gray scale display. Each subfield SF1 to SF8 is divided into reset periods R1 to R8, address periods A1 to A8, and sustain discharge periods S1 to S8.

The luminance of the plasma display panel is proportional to the length of the sustain discharge periods S1 to S8 occupied in the unit frame. The length of the sustain discharge cycles S1 to S8 occupied in the unit frame is 255T (T is the unit time). At this time, a time corresponding to 2 ⁿ is set in the sustain discharge period Sn of the nth subfield SFn. Accordingly, if the subfield to be displayed among the eight subfields is appropriately selected, 256 gray levels may be displayed including all zero (zero) grays not displayed in any of the subfields.

FIG. 5 is a timing diagram illustrating an embodiment of a driving signal output from each driving unit of FIG. 3 in the method of driving a plasma display panel according to an exemplary embodiment of the present invention.

Referring to the drawings, a unit frame for driving the plasma display panel (1 of FIG. 3) is divided into a plurality of subfields, and each subfield SF includes a reset period PR, an address period PA, and a sustain period. Divided into period (PS).

First, in the reset period PR, a reset pulse consisting of a rising pulse and a falling pulse is applied to the Y electrodes Y ₁ , ..., Y _n , and in the X electrodes X ₁ , ..., X _n . When the falling pulse is applied, the second voltage (bias voltage) is applied to reset discharge. All discharge cells are initialized by reset discharge. The rising pulse rises from the sustain discharge voltage (Vs) by the rising voltage (V _set ) and finally reaches the rising maximum voltage (V _set + Vs), and the falling pulse falls from the sustain discharge voltage (Vs) and finally falls The voltage V _nf is reached.

In the address period PA, scanning pulses are sequentially applied to the Y electrodes Y ₁ ,..., And Y _n , and A electrodes A ₁ ,..., A _m are displayed in accordance with the scanning pulses. The data signal is applied to perform address discharge. The discharge cells to be subjected to the sustain discharge occurring in the sustain period PS by the address discharge are selected. The scan pulse has a scan high voltage (Vsch) and sequentially has a scan low voltage (Vscl) whose voltage is lower than the scan high voltage (Vsch), and the display data signal is adapted to the scan low voltage (Vscl) of the scan pulse. It has a positive address voltage Va.

In the address period PA, scan pulses of scan low voltage Vscl are sequentially performed while scan electrodes, that is, Y electrodes Y ₁ ,..., Y _n are biased with scan high voltage Vsch. Is applied. In addition, a data pulse synchronized with the scan pulse is applied to the address electrodes corresponding to the selected discharge cell, that is, the A electrodes A ₁ ,..., A _m , so that address discharge may occur.

In the address period PA, the biasing initialization period Tsb before the first scan pulse is applied after the Y electrodes Y ₁ , ..., Y _n are biased to the scan high voltage Vsch. Included.

The PDP is at least one or more electrodes divided into a plurality of blocks A (BA (1) ~ BA ( k)) of a set consisting of _{(A 1, ..., A m} ), which corresponds to the first scan pulse The data pulses are time difference block by block. Data pulses applied block by block for the first scan pulse start in the biasing initialization period Tsb. In this case, the time difference between the data pulses applied for each block with respect to the first scan pulse may be the same.

In addition, A electrodes _{(A 1, ..., A m} ) in the case of the blocks are divided in order from one side to the other of the display panel, one side of the first data pulse applied to each block with respect to the second scan pulse to the display panel It is preferably applied sequentially from the other side to.

In the case where address discharge occurs in all discharge cells defined by the first scan line, data pulses are simultaneously applied to all A electrodes A ₁ ,..., A _m in synchronization with the first scan pulse. Accordingly, since at the same time to all of the A electrodes (A _1, ..., A _m) is a pulse voltage, and a rapid change in current occurs in all the A electrodes (A _1, ..., A _m), thereby Large EMI can occur. This is also the case when address discharge occurs in all discharge cells on the panel in the subfield.

However, in the present invention, since data pulses corresponding to the first scan pulse are applied so that there is a time difference for each block, the voltage change is distributed within the biasing initialization period Tsb. Therefore, the voltage change is distributed as much as the number of blocks to which the data pulses are divided and applied, thereby reducing the occurrence of EMI.

In the sustain period PS, a sustain pulse is alternately applied to the X electrodes X ₁ ,..., X _n and the Y electrodes Y ₁ ,..., Y _n to perform a sustain discharge. Luminance is expressed according to the gray scale weight allocated to each subfield by the sustain discharge. The sustain pulse has an alternating discharge voltage Vs and a ground voltage Vg.

On the other hand, it is possible that the driving signal different from that shown in FIG. 5 is output from each driving unit of FIG. 3, and is not limited to that shown in FIG. 5.

According to an apparatus for driving a display panel and a method of driving the same according to the present invention, the panel is divided into a plurality of address blocks, and a sudden address is provided by giving a time difference to the start timing of the data pulse with respect to the first scan pulse for each address block. EMI can be reduced due to voltage changes.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, this is merely exemplary, and those skilled in the art may realize various modifications and other equivalent embodiments therefrom. I can understand. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (13)

For a display panel in which discharge cells are formed in an area where a scan electrode and an address electrode intersect, a plurality of sub-fields according to gray scale weights exist for time division gray scale display for each frame as a display period, and each sub-field is A reset period, an address period, and a sustain discharge period, In the address period, scan pulses having a second level are sequentially applied while the scan electrodes are biased to the first level, and data pulses synchronized with the scan pulses are applied to the address electrodes corresponding to the selected discharge cells. Applied to address discharge, And the display panel is divided into a plurality of blocks formed of at least one set of the address electrodes, and the data pulses corresponding to the first scan pulse have a time difference for each block. The method of claim 1, And the address period includes a biasing initialization period before the first scan pulse is applied after the scan electrodes are biased to the first level. The method of claim 2, And a data pulse applied to each block with respect to the first scan pulse is started in the biasing initialization period. The method of claim 3, The blocks of the address electrodes are divided in order from one side of the display panel to the other side, And a data pulse applied to each of the blocks with respect to the first scan pulse sequentially applied from one side to the other side of the display panel. The method of claim 3, And a time difference of the data pulses applied for each block with respect to the first scan pulse. The method of claim 1, Discharge cells are formed in an area where the display panel crosses an X electrode, a Y electrode and an address electrode, and the Y electrode is a scan electrode. For the display panel in which discharge cells are formed in the region where the scan electrode and the address electrode intersect, a plurality of sub-fields according to the gray scale weight exist for time division gray scale display for each frame as the display period, and each of the sub- Field includes a reset period, an address period, and a sustain discharge period, In the address period, a scan pulse of a second level is sequentially applied while the scan electrodes are biased to the first level, and a data pulse synchronized with the scan pulse to the address electrodes corresponding to the selected discharge cell. Is applied to cause an address discharge, And the display panel is divided into a plurality of blocks consisting of at least one set of the address electrodes, and wherein the data pulses corresponding to the first scan pulse have a time difference for each block. The method of claim 7, wherein And the address period includes a biasing initialization period before the first scan pulse is applied after the scan electrodes are biased to the first level. The method of claim 8, And driving the data pulses applied for each block with respect to the first scan pulse in the biasing initialization period. The method of claim 9, The blocks of the address electrodes are divided in order from one side of the display panel to the other side, And a data pulse applied to each block with respect to the first scan pulse sequentially applied from one side to the other side of the display panel. The method of claim 9, And a time difference of data pulses applied to each block with respect to the first scan pulse. The method of claim 7, wherein And a discharge cell formed at an area where the display panel crosses an X electrode, a Y electrode and an address electrode, and the Y electrode is a scan electrode. The method of claim 12, A logic controller for generating a drive control signal including an X drive control signal, a Y drive control signal, and an A drive control signal according to an image signal to be displayed, and an X that processes the X drive control signal and applies it to the X electrodes And a driving unit for processing the Y driving control signal and applying the same to the Y electrodes, and an address driving unit for processing the A driving control signal and applying the processing to the address electrodes.

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