KR20070087729A - Plasma display apparatus and driving method thereof - Google Patents

Abstract

A plasma display apparatus and a driving method thereof are provided to prevent degradation of image quality by adjusting a scan bias voltage supplied to a scan electrode during an address period based on the temperature of a plasma display panel. A plasma display apparatus includes a plasma display panel, and scan and sustain drivers. The plasma display panel includes plural scan and sustain electrodes(Y,Z), and plural address electrodes arranged to cross with the scan and sustain electrodes. The scan driver adjusts a scan bias voltage(Scan) supplied to the scan electrodes during an address period(AP) according to the temperature of the plasma display panel. The sustain driver grounds a voltage supplied to the sustain electrodes during a set-down period(SD) of a reset period.

Description

Plasma Display Apparatus and Driving Method Thereof

1 is a diagram showing the structure of a typical plasma display panel.

2 is a diagram illustrating a method of implementing image gradation of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

4 is a view for explaining the application time and noise of a pulse applied to an address period in the conventional method of driving a plasma display panel.

5 is a diagram for explaining the structure of a plasma display device of the present invention;

6 is a view showing a driving waveform according to an embodiment of the method of driving a plasma display panel of the present invention.

7A to 7C illustrate an example in which data pulses are applied to the address electrodes X1 to Xn at different times from the time when the scan pulse is applied to the driving waveforms according to the method of driving the plasma display panel of the present invention.

FIG. 8 is a view for explaining an example of the magnitude difference between the magnitude of the scan pulse voltage and the fall ramp voltage during the setdown period during the reset period; FIG.

9 is a view for explaining an example of the magnitude of the scan bias voltage adjusted according to the temperature of the plasma display panel.

10 is a diagram for explaining an example of a magnitude tolerance range of a scan pulse voltage.

<Explanation of symbols for main parts of the drawings>

500: plasma display panel 501: data driver

502: scan driver 503: sustain driver

The present invention relates to a plasma display panel, and more particularly, to a plasma display device and a plasma display for improving a scan bias voltage applied to a scan electrode in an address period AP in consideration of a temperature of the plasma display panel. It relates to a driving method of the panel.

In general, a plasma display panel is a partition wall formed between a front panel and a rear panel to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 illustrates a structure of a general plasma display panel.

As shown in FIG. 1, a plasma display panel includes a front panel in which a plurality of sustain electrode pairs formed by pairing a scan electrode 102 and a sustain electrode 103 are arranged on a front glass 101 that is a display surface on which an image is displayed. The rear panel 110 on which the plurality of address electrodes 113 are arranged so as to intersect the plurality of sustain electrode pairs on the back glass 111 forming the back surface 100 and the rear surface is coupled in parallel with a predetermined distance therebetween. .

The front panel 100 is made of a scan electrode 102 and a sustain electrode 103, that is, a transparent electrode (a) formed of a transparent ITO material and a metal material to mutually discharge and maintain light emission of the cells in one discharge cell. The scan electrode 102 and the sustain electrode 103 provided as the bus electrode b are included in pairs. The scan electrode 102 and the sustain electrode 103 are covered by one or more upper dielectric layers 104 that limit the discharge current and insulate the electrode pairs, and to facilitate the discharge conditions on the upper dielectric layer 104 top surface. A protective layer 105 on which magnesium oxide (MgO) is deposited is formed.

The rear panel 110 is arranged such that a plurality of discharge spaces, that is, barrier ribs 112 of a stripe type (or well type) for forming discharge cells are maintained in parallel. In addition, a plurality of address electrodes 113 which perform address discharge to generate vacuum ultraviolet rays are arranged in parallel with the partition wall 112. On the upper side of the rear panel 110, R, G, and B phosphors 114 which emit visible light for image display during address discharge are coated. A lower dielectric layer 115 is formed between the address electrode 113 and the phosphor 114 to protect the address electrode 113.

A method of implementing image gradation in the plasma display panel having such a structure is shown in FIG. 2.

2 is a diagram illustrating a method of implementing image grayscale of a conventional plasma display panel.

As shown in FIG. 2, in the conventional method of expressing a gray level of a plasma display panel, a frame is divided into several subfields having different number of emission times, and each subfield is a reset period (RPD) for initializing all cells again. ) Is divided into an address period APD for selecting a cell to be discharged and a sustain period SPD for implementing gradation according to the number of discharges. For example, when displaying an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. 2, and eight subfields. Each of the SFs SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

The reset period and the address period of each subfield are the same for each subfield. The address discharge for selecting the cell to be discharged is caused by the voltage difference between the address electrode and the transparent electrode which is the scan electrode. The sustain period is increased at a rate of 2 ⁿ ( ^where n = 0, 1, 2, 3, 4, 5, 6, 7) in each subfield. In this way, since the sustain period is different in each subfield, the gray scale of the image is expressed by adjusting the sustain period of each subfield, that is, the number of sustain discharges.

A driving method of a conventional plasma display panel according to the general image gray scale representation method is as shown in FIG. 3.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

As shown in Fig. 3, the plasma display panel erases the reset period for initializing all the cells, the address period for selecting the cells to be discharged, the sustain period for maintaining the discharge of the selected cells, and the wall charges in the discharged cells. It is divided into an erase period for driving.

In the reset period, the rising ramp waveform Ramp-up is applied to all the scan electrodes at the same time in the setup period. This rising ramp waveform causes weak dark discharge within the full discharge cells. By this setup discharge, positive wall charges are accumulated on the address electrode and the sustain electrode, and negative wall charges are accumulated on the scan electrode.

In the set-down period of the reset period, after the rising ramp waveform is applied to the scan electrode, the falling ramp waveform (Ramp-) begins to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and falls to a specific voltage below the ground (GND) voltage. At the same time, a sustain bias voltage is applied to the sustain electrode to cause an erase discharge in the cells. At this time, the voltage difference between the specific voltage below the ground voltage and the sustain bias voltage becomes large, thereby excessively erasing wall charges formed in the scan electrode. do. As a result, the weak wall charges are delayed until a wall voltage is formed to the extent that discharge can occur.

In the address period, the negative scan pulses are sequentially applied to the scan electrodes, and the positive data pulses are applied to the address electrodes in synchronization with the scan pulses. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the reset period are added, address discharge is generated in the discharge cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when the sustain voltage Vs is applied. The positive electrode voltage Vz is applied to the sustain electrode so that the voltage difference with the scan electrode is reduced during the set down period and the address period so that erroneous discharge with the scan electrode does not occur.

In the sustain period, a sustain pulse Su is applied to the scan electrode and the sustain electrodes alternately. In the cell selected by the address discharge, as the wall voltage and the sustain pulse in the cell are added, a sustain discharge, that is, a display discharge, occurs between the scan electrode and the sustain electrode every time the sustain pulse is applied.

In the plasma display panel driven by the driving waveform, the application time of the scan pulse applied to the scan electrodes and the data pulses applied to the address electrodes X1 to Xn in the address period is the same. When the scan pulse and the data pulse are applied in the conventional address period and the noise generated during the application are as follows.

4 is a view for explaining the application time and noise of a pulse applied to an address period in the conventional plasma display panel driving method.

As shown in FIG. 4, in the conventional method of driving a plasma display panel, all data pulses applied to the address electrodes X1 to Xn in the address period are simultaneously applied to a scan pulse applied to the scan electrode. As described above, when the data pulse and the scan pulse are applied to the address electrodes X1 to Xn and the scan electrode, noise is generated on the waveform applied to the scan electrode and the waveform applied to the sustain electrode. This noise is caused by coupling through the capacitance of the panel. When the data pulse is rapidly rising, rising noise is generated on the waveform applied to the scan electrode and the sustain electrode, and the data pulse is suddenly raised. At the time of falling, falling noise is generated in the waveform applied to the scan electrode and the sustain electrode.

On the other hand, when the plasma display panel driven by the driving waveform looks more closely at the scan bias voltage applied to the scan electrode during the address period, In the conventional driving waveform, the scan bias voltage applied to the scan electrode during the address period AP is constant for the address discharge until the negative (-) scan pulse and the positive data pulse applied to the address electrode are synchronized. Keep the voltage at-). That is, the conventional scan bias voltage is kept constant regardless of the temperature of the panel.

On the other hand, as the temperature of the plasma display panel changes, the discharge start voltage Vth during driving changes. This is mainly caused by the recombination rate between the wall charges and the space charges in the discharge cell according to the temperature of the plasma display panel.

      For example, in a plasma display panel operated with a driving waveform according to such a driving method, when the temperature around the panel rises, for example, when the temperature is higher than room temperature, an excessive amount of wall charge is generated in the discharge cell. The recombination rate of the space charge and the wall charge in the interior becomes low. That is, the absolute amount of wall charges participating in the discharge increases.

In general, the address discharge at room temperature is generated in the discharge cell by adding the scan pulse voltage and the data pulse voltage to the wall voltage generated in the reset period RP. When the panel temperature is a high temperature, cross-talk occurs due to excessive wall charges, and thus self-discharge occurs without the aforementioned data pulse.

As the temperature of the plasma display panel changes, the above-described scan bias voltage is kept constant regardless of the temperature even though the discharge start voltage at the time of driving changes, thereby failing to satisfy the discharge voltage condition for smooth discharge. As a result, when the temperature of the panel changes, there is a problem in that discharging does not occur correctly according to the data signal and miss discharge and false discharge occur. In addition, as described above, noise generated in a waveform applied to the scan electrode and the sustain electrode by a data pulse applied to the address electrode at the same time as the scan pulse applied to the scan electrode, causes the address discharge occurring in the address period to become unstable, thereby causing plasma display. There is a problem of reducing the driving efficiency of the panel. As a result, the image quality of the plasma display panel is deteriorated.

In order to solve this problem, the present invention is to make the application time of the data pulse applied to the address electrode in the address period different from the application time of the scan pulse applied to the scan electrode, wherein the waveform applied before the reset period The noise is reduced, the noise is reduced, and the discharge delay time is improved by grounding the voltage applied to the sustain electrode during the set-down period of the reset period. Another object of the present invention is to provide a plasma display device and a method of driving the plasma display panel, by controlling a scan bias voltage applied to the scan electrode during the address period AP according to the temperature of the plasma display panel.

The plasma display device of the present invention for achieving the above object is applied to the plasma display panel and the scan electrode including a plurality of scan electrodes and sustain electrodes and a plurality of address electrodes formed to intersect the plurality of scan electrodes and sustain electrodes for an address period. And a scan driver for adjusting the scan bias voltage according to the temperature of the plasma display panel and a sustain driver for grounding the sustain electrode during the set down period of the reset period.

The scan driver applies a negative waveform to the scan electrode before the reset period, and the sustain driver applies a positive waveform to the sustain electrode while the negative waveform is being applied.

The negative waveform is a falling ramp waveform, and the positive waveform is a square wave.

In addition, during the address period, the application time of the scan pulse applied to the scan electrode away from the scan bias voltage and the application time of the data pulse applied to the address electrode are different from each other.

The scan driver may increase the scan bias voltage applied to the scan electrode as the temperature of the plasma display panel increases.

In addition, the scan bias voltage applied to the scan electrode is characterized in that the ground (Ground) or less.

Further, the voltage of the scan pulse falling from the scan bias voltage is smaller than the lower limit voltage of the falling ramp applied in the reset period before the address period AP.

The difference between the voltage of the scan pulse and the lower limit voltage of the falling ramp is 10 [V] or more and 20 [V] or less.

The voltage of the scan pulse falling from the scan bias voltage is 180 [V] or more and 220 [V] or less.

Hereinafter, embodiments of a plasma display device and a driving method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a view for explaining the structure of the plasma display device of the present invention.

As shown in FIG. 5, the plasma display apparatus of the present invention includes scan electrodes Y ₁ to Ym and a sustain electrode Z, and a plurality of address electrodes X ₁ crossing the scan electrode and the sustain electrode Z. At least one subfield including X to Xn, wherein a driving pulse is applied to the address electrodes X ₁ to Xn, the scan electrodes Y ₁ to Ym, and the sustain electrode Z in the reset period, the address period, and the sustain period. A plasma display panel 500 representing an image made of a frame by a combination of the above, a data driver 501 for supplying data to the address electrodes X ₁ to Xn formed in the plasma display panel 500, and a scan A scan driver 502 for driving the electrodes Y ₁ to Ym and a sustain driver 503 for driving the sustain electrodes Z which are common electrodes are included.

Here, the aforementioned plasma display panel 500 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and a plurality of electrodes, for example, scan electrodes (Y ₁ to Ym) and The sustain electrodes Z are formed in pairs, and the address electrodes X ₁ to Xn are formed to intersect the scan electrodes Y ₁ to Ym and the sustain electrode Z.

The data driver 501 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield is supplied by the subfield mapping circuit. The data supplied under the control of the data driver 501 is supplied to the address electrodes X ₁ to Xn.

The scan driver 502 scans reset pulses including a reset pulse, for example, a rising ramp waveform Ramp-up and a falling ramp waveform Ramp-down, during a reset period under the control of the scan driver 502. ₁ to Ym). In addition, the scan driver 502 adjusts the scan bias voltage on the scan electrode according to the temperature of the plasma display panel during the address period, and maintains the scan bias voltage as negative. In addition, the scan pulse Sp of the scan voltage is sequentially supplied to the scan electrodes Y ₁ to Ym, and the sustain pulse SUS is supplied to the scan electrodes Y ₁ to Ym during the sustain period.

The sustain driver 503 is grounded during the period in which the ramp ramp down of the reset period occurs, and supplies the positive bias voltage Vz to the sustain electrodes Z for one or more of the address periods. It alternately operates with the scan driver 502 during the period to supply the sustain pulse SUS to the sustain electrodes Z.

These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

The function of the plasma display device of the present invention having such a structure will become more apparent in the following description of the driving method.

Looking at the various embodiments of the driving method performed by the plasma display device of the present invention having such a structure as follows.

6 is a view showing a driving waveform according to an embodiment of the method of driving a plasma display panel of the present invention.

First, referring to FIG. 6, in the driving waveform according to the driving method of the plasma display panel of the present invention, an application time point of data pulses applied to all the address electrodes X1 to Xn in an address period of one subfield is applied to the scan electrode. It is different from the time of application of the scan pulse, and further includes a pre-reset period for accumulating wall charge in the discharge cell between the sustain period and the reset period, The voltage applied to the sustain electrode during the setdown period of the reset period is grounded.

Here, the above-described pre-reset period is included in detail between the sustain period and the reset period, and the voltage applied to the sustain electrode during the set-down period of the reset period is described in detail first. In addition, the difference between the application point of the data pulse applied to the address electrode and the application point of the scan pulse applied to the scan electrode in the address period is described in more detail after the description of the pre-reset period.

Here, the above-described pre-reset period includes a plurality of subfields in which a driving waveform according to the method of driving the plasma display panel of the present invention is applied with a predetermined voltage to the address electrode, the scan electrode, and the sustain electrode in the reset period, the address period, and the sustain period. Considering that the image is represented by the combination, it is preferable that the above-mentioned pre-reset period is included in all subfields of the plurality of subfields. Alternatively, the above-described pre-reset period may be included only in any subfield among the plurality of subfields.

In this pre-reset period, positive charges are accumulated on the scan electrodes in the discharge cells, and negative charges are accumulated on the sustain electrodes. Here, as described above, in order to accumulate positive charges on the scan electrodes in the discharge cells and to accumulate negative charges on the sustain electrodes in the preset reset period, a negative voltage is applied to the scan electrodes, and a positive voltage is applied to the sustain electrodes. It is desirable to allow this to be applied. In view of the ramp waveform, the voltage applied to each of these electrodes is applied to the falling ramp waveform of the negative voltage of which the voltage gradually falls to the scan electrode, and the square waveform of the positive voltage of which the voltage rises is applied to the sustain electrode. More preferred.

As described above, by applying a negative voltage to the scan electrode and a positive voltage to the sustain electrode in the pre-reset period, the amount of space charge in the discharge cell is reduced. The explanation is as follows.

As described above, when a negative voltage is applied to the scan electrode Y and a positive voltage is applied to the sustain electrode Z in the pre-reset period, space charges that do not participate in the discharge in the discharge cell are scanned. ) Or the attracted space charge acts as wall charge on the scan electrode Y or the sustain electrode Z described above. Accordingly, the absolute amount of space charge decreases and the amount of wall charge located on a predetermined electrode in the discharge cell increases.

Meanwhile, as described above, the negative voltage applied to the scan electrode Y in the pre-reset period is preferably a ramp ramp waveform in consideration of ease of control. In addition, it is preferable that the positive voltage applied to the sustain electrode Z is a positive voltage which keeps a predetermined voltage value constant. Here, the slope of the falling of the negative voltage of the falling lamp applied to the above-described scan electrode Y is adjustable. For example, when it is desired to attract space charges faster and stronger, the slope may be made more urgent, that is, the rise time may be shortened. The waveforms of the negative voltage applied to the scan electrode Y and the positive voltage applied to the sustain electrode Z in this pre-reset period are not limited thereto but can be changed. That is, as described above, various changes can be made, such as applying a negative voltage at which the voltage is kept constant to the scan electrode Y, applying a rising ramp to the sustain electrode Z, and the like.

In this manner, a pre-reset period for accumulating wall charges between the sustain period and the reset period is provided, and in this pre-reset period, a negative voltage is applied to the scan electrode Y, and a positive voltage is applied to the sustain electrode Z. Is applied to accumulate the positive wall charges on the scan electrode (Y) in the discharge cell and the negative wall charges on the sustain electrode (Z), thereby increasing the voltage of the rising ramp of the reset pulse in the setup period of the subsequent reset period. The size can be reduced. The reason is that the rising ramp plays a role of accumulating wall charges in the discharge cells in the setup period of the above-described reset period, and a predetermined amount of wall charges have already been accumulated in the pre-reset period before the rising ramp is applied. This is because even if the size of the rising ramp is small, a sufficient amount of wall charges required for setup in the discharge cell can be accumulated. As the size of the rising ramp decreases, the contrast characteristic is improved. As described above, the present invention may reduce the rising ramp waveform in the reset period.

On the other hand, as described above, when the voltage applied to the sustain electrode during the ramp ramp down (Ramp-down) in the set-down period of the reset period is described as follows.

In the set-down period of the reset period, after the rising ramp waveform is applied to the scan electrode, the rising ramp waveform starts to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and then falls to a specific voltage below the ground (GND) voltage. At the same time, the voltage applied to the sustain electrode is grounded, and since the ramp waveform gradually falls to a specific voltage below the ground voltage, the charges inside the discharge cell stably accumulate on the scan electrode, causing a slight erase discharge in the cells. As a result, the wall charges excessively formed on the scan electrodes are sufficiently erased. The dark discharge in this set-down period causes the wall charges to be uniformly retained in the cells so that the address discharge can stably occur during the address period. Since the address discharge is stabilized, when the pulse is applied, the discharge occurs without delay and the discharge delay time is improved. That is, since the wall charges are easily formed in the discharge cell to make the discharge start voltage, the discharge delay is improved because the wall charges do not have to wait until the discharge start voltage. Therefore, since the address discharge is discharged without a delay time, the delay time for the discharge in the address period is reduced, so that the address period is shortened and the driving time is made faster. As a result, high-speed driving of the plasma display panel is possible.

On the other hand, as described above, when the application time of the scan pulse applied to the scan electrode and the data pulse applied to the address electrode in the address period is described as follows.

In the address period, the method of applying the scan pulse applied to the scan electrode and the application pulse of the data pulse applied to the address electrodes X1 to Xn may be variously modified. Among these methods, the address electrodes X1 to Xn) There is a method of applying a data pulse at a time different from the application time of the scan pulse. Looking at this method is the same as Figure 7a to 7c.

7A to 7C are diagrams illustrating an example of applying a data pulse to the address electrodes X1 to Xn at a different time from the time when the scan pulse is applied to each of the driving waveforms according to the driving method of the plasma display panel according to the present invention. .

First, referring to FIGS. 7A to 7C, a method of differently applying the scan pulse and the data pulse in the driving waveform of the present invention may be performed at the time of applying the data pulse applied to the address electrodes X1 to Xn in the address period of one subfield. Is different from the application point of the scan pulse applied to the scan electrode (Y). For example, as shown in FIG. 7A, the driving waveform according to the driving method of the present invention is based on the arrangement order of the address electrodes X1 to Xn when it is assumed that the time of application of the scan pulse applied to the scan electrode Y is ts. The data pulse is applied to the electrode X1 at a time point 2Δt before the time point at which the scan pulse is applied to the scan electrode Y, that is, the time point ts-2Δt. Further, a data pulse is applied to the address electrode X2 at a time point Δt ahead of the time point at which the scan pulse is applied to the scan electrode Y, that is, the time points ts-Δt. In this way, a data pulse is applied at the time ts + Δt to the X (n-1) electrode and a data pulse is applied at the time ts + 2Δt to the Xn electrode. That is, as shown in FIG. 7A, the data pulses applied to the address electrodes X1 to Xn are applied before or after the time point at which the scan pulses applied to the scan electrodes Y are applied. Unlike in FIG. 7A, an application time point of the data pulses applied to the address electrodes X1 to Xn is set differently from an application time point of the scan pulse applied to the scan electrode Y, and is applied to at least one address electrode X1 to Xn. An application time point of the applied data pulse may be set to be later than an application time point of the scan pulse, which is illustrated in FIG. 7B.

Referring to FIG. 7B, unlike in FIG. 7A, the driving waveform of the present invention is different from the application point of the data pulse applied to the address electrodes X1 to Xn and the application time of the scan pulse applied to the scan electrode Y. The application time of the pulse is later than the application time of the aforementioned scan pulse. In FIG. 7B, the application time point of all data pulses is set later than the application time point of the scan pulse, but only one application time point may be set later than the application time point of the scan pulse, which is later than the application time point of the scan pulse. The number of data pulses applied is changeable. For example, as shown in FIG. 7B, the driving waveform according to the driving method is applied to the address electrodes X1 in accordance with the arrangement order of the address electrodes X1 to Xn, assuming that the time point of applying the scan pulse applied to the scan electrode Y is ts. The data pulse is applied at a time point Δt later than the time point at which the scan pulse is applied to the scan electrode Y, that is, the time point ts + Δt. In addition, a data pulse is applied to the address electrode X2 at a time point 2Δt later than the time point at which the scan pulse is applied to the scan electrode Y, that is, a time point ts + 2Δt. In this way, a data pulse is applied to the X3 electrode at the time point ts + 3Δt and a data pulse is applied to the Xn electrode at the time point ts + (n-1) Δt. That is, as shown in FIG. 7B, the data pulses applied to the address electrodes X1 to Xn are applied after the time point at which the scan pulses applied to the scan electrodes Y are applied. Unlike FIG. 7B, an application time point of the data pulses applied to the address electrodes X1 to Xn is set differently from an application time point of the scan pulses applied to the scan electrode Y, and an application time point of the data pulses is applied. It may also be set to be ahead of the, look at such a driving waveform as shown in Figure 7c.

Referring to FIG. 7C, unlike in FIG. 7A or 7B, the driving waveform of the present invention is different from the application point of the scan pulse applied to the scan electrode Y when the data pulse applied to the address electrodes X1 to Xn is applied. Also, the application point of all data pulses is earlier than the application point of the aforementioned scan pulse. In FIG. 7C, the application point of all data pulses is set to be earlier than the application point of the scan pulse. However, only one application point of the data pulse may be set to be earlier than the application point of the scan pulse described above. The number of data pulses applied earlier is changeable. For example, as shown in FIG. 7C, when the driving waveform according to the driving method of the present invention is assumed to be the time of applying the scan pulse applied to the scan electrode Y, the address corresponds to the arrangement order of the address electrodes X1 to Xn. The data pulse is applied to the electrode X1 at a time point Δt before the time point at which the scan pulse is applied to the scan electrode Y, that is, the time point ts-Δt. In addition, a data pulse is applied to the address electrode X2 at a time point 2Δt before the time point at which the scan pulse is applied to the scan electrode Y, that is, the time point ts-2Δt. In this way, a data pulse is applied to the X3 electrode at the time point ts-3Δt and a data pulse is applied to the Xn electrode at the time point ts- (n-1) Δt. That is, as shown in FIG. 7D, the data pulses applied to the address electrodes X1 to Xn are applied before the time point at which the scan pulses applied to the scan electrodes Y are applied.

7A to 7C, a time difference between a time point at which a scan pulse applied to the scan electrode Y is applied and a time point at which a data pulse applied to the address electrodes X1 to Xn is applied or is applied to the address electrodes X1 to Xn at this time. The difference in application time point between the data pulses is explained by the concept of? T. Here, referring to Δt described above, for example, the application time of the scan pulse applied to the scan electrode Y is ts, and the time difference between the application time ts between the application pulse ts and the closest data pulse is Δt The difference between the time of application of the scan pulse ts and the next adjacent data pulse is referred to as Δt twice, that is, 2Δt. This Δt remains constant. That is, the data pulses applied to the address electrodes X1 to Xn while the application time of the scan pulses applied to the scan electrodes Y and the application pulses of the data pulses applied to the address electrodes X1 to Xn are different from each other. The difference between the points of application is equal to each other. Here, the difference between the application time points between the data pulses applied to the respective address electrodes X1 to Xn in one subfield is equal to each other while the data pulses closest to the application time of the scan pulse and the application time of the scan pulse are the same. The difference between the points of application may be the same or different.

In addition, the time difference between the application time between the data pulses may be different while the application time of the scan pulse and the application time of the data pulses are different. That is, the application time point between the data pulses applied to the address electrodes X1 to Xn while the application time point of the data pulses applied to the address electrodes X1 to Xn are different from the application time point of the scan pulses applied to the scan electrodes Y. Set each differently. That is, between the time of applying the scan pulse applied to the scan electrode Y and the time of applying the data pulse applied to the address electrodes X1 to Xn, the data pulses applied to the respective address electrodes X1 to Xn are different. It is also possible to set different differences between application points.

As such, when the application time of the scan pulse applied to the scan electrode Y and the application time of the data pulse applied to the address electrodes X1 to Xn are different in the address period, the data pulse applied to the address electrodes X1 to Xn is different. At each time of application, the coupling through the panel's capacitance is reduced to reduce the noise of the waveform applied to the scan electrode and the sustain electrode. The reason why the noise is reduced is to reduce the coupling through the capacitance of the panel at each time point, thereby reducing the rising noise generated in the waveform applied to the scan electrode and the sustain electrode at the time when the data pulse is rapidly rising. This is because the falling noise generated in the waveforms applied to the scan electrode and the sustain electrode is reduced when the data pulse suddenly falls. This stabilizes the address discharge occurring in the address period and suppresses the deterioration of the driving stability of the plasma display panel.

As a result, when the address discharge of the plasma display panel is stabilized and a pulse is applied, the discharge occurs without delay, and thus the discharge delay time is improved. Therefore, since the address discharge is discharged without a delay time, the delay time for the discharge in the address period is reduced, the address period is shortened, and the driving time of the subfield is shortened. As a result, high-speed driving of the plasma display panel is possible.

In addition, in the address period, the scan bias voltage Vyb applied to the scan electrode Y is applied below the ground voltage. That is, the voltage applied to the scan electrode during the address period AP is the negative scan bias voltage Vyb.

In addition, as the temperature of the panel changes, the scan bias voltage applied to the scan electrode is adjusted, and the above-described scan bias voltage is adjusted below the ground voltage. As described above, since the above-described scan bias voltage is adjusted according to the temperature of the panel, even if the discharge start voltage at the time of panel driving is changed according to the temperature, the scan bias voltage is appropriately adjusted to reduce the erroneous discharge caused by the temperature change of the panel. .

In addition, the magnitude of the scan pulse voltage during the address period AP indicates the negative (-) lower limit scan voltage based on the ground voltage, and scans during the set down period SD of the reset period before the address period AP. The magnitude of the falling ramp lower limit voltage applied to the electrode represents the falling ramp lower limit voltage applied to the scan electrode during the setdown period SD during the reset period based on the ground voltage. The magnitude of the voltage difference between the magnitude of the scan pulse voltage and the magnitude of the falling ramp lower limit voltage described above will be described with reference to FIG. 8.

 FIG. 8 is a view for explaining an example of the difference between the magnitude of the scan pulse voltage and the magnitude of the falling ramp voltage during the setdown period SD of the reset period.

Referring to FIG. 8, the magnitude of the scan pulse voltage applied to the scan electrode during the address period AP is the magnitude of the falling ramp lower limit voltage applied to the scan electrode during the setdown period SD of the reset period before the address period AP. Must be greater than As such, it is to improve the contrast characteristic that the magnitude of the aforementioned scan pulse voltage must be greater than the magnitude of the falling ramp lower limit voltage.

In addition, the magnitude of the above-described scan pulse voltage and the magnitude of the above-mentioned falling ramp lower limit voltage should preferably maintain the magnitude of the voltage difference of 10 [V] or more and 20 [V] or less.

The reason is that when the magnitude of the above-described scan pulse voltage and the magnitude of the above-mentioned falling ramp lower limit voltage are equal to the voltage difference of 10 [V] or less, the scan electrodes Y and the address electrodes (in the discharge cells of the full screen) Since dark discharge is not smoothly generated between X), unnecessary wall charges are not erased for the address discharge, and excessive wall charges remain, causing false discharge in the address period. In addition, when the magnitude of the aforementioned scan pulse voltage and the magnitude of the falling ramp lower limit voltage are equal to or greater than 20 [V], the scan electrodes Y and the address electrodes X in the full discharge cells. Strong discharge is generated in between, so that the wall charges necessary for the address discharge are erased, so that a small amount of the wall charges is left, and miss discharge occurs in the address period.

For this reason, it is most preferable that the voltage difference between the magnitude of the above-described scan pulse voltage and the magnitude of the above-described falling ramp lower limit voltage is maintained between 10 [V] and 20 [V].

As described above, the reason for controlling the magnitude of the scan bias voltage according to the temperature in one embodiment of the method of driving the plasma display panel is to prevent mis-discharge. Here, the magnitude of the scan bias voltage represents up to the negative polarity (-) scan bias voltage based on the ground voltage. This will be described with reference to FIG. 9 as follows.

9 is a view for explaining an example of the magnitude of the scan bias voltage adjusted according to the temperature of the plasma display panel.

9, the magnitude of the scan bias voltage applied to the scan electrode Y during the address period AP is adjusted according to the temperature of the plasma display panel.

Preferably, when the temperature of the plasma display panel is higher than room temperature, the scan bias voltage applied to the scan electrode during the address period AP is smaller than room temperature, and when the temperature of the plasma display panel is lower than room temperature, the address is lower. The magnitude of the scan bias voltage applied to the scan electrode Y during the period AP is greater than room temperature.

For example, as illustrated in FIG. 9, the scan bias voltage applied to the scan electrode Y at a room temperature of (b) is h2. In addition, the magnitude of the scan bias voltage applied to the scan electrode Y at a high temperature above the room temperature of the plasma display panel is h1 such as (a) smaller than h2 of the above-mentioned (b). Further, the magnitude of the scan bias voltage applied at a low temperature at which the temperature of the plasma display panel is lower than the above-mentioned room temperature is h3 as in (c), which is larger than h1 of (a) or h2 of (b).

It is preferable that the magnitude of the scan bias voltage decreases as the temperature of the plasma display panel increases, and increases as the temperature of the plasma display panel decreases.

As described above, in one embodiment of the method of driving the plasma display panel of the present invention, the size of the scan bias voltage is decreased as the plasma display panel increases in temperature, and the reason why the plasma display panel increases as the temperature decreases is in plasma display. This is because the recombination rate between the wall charges and the space charges changes in the discharge cell according to the temperature of the panel.

For example, in a plasma display panel, when the temperature around the panel rises, for example, when the temperature is higher than room temperature, the recombination ratio of the space charge and the wall charge in the discharge cell becomes low, so that the amount of wall charge in the discharge cell is excessive. There is a lot to do. That is, the absolute amount of wall charges participating in the discharge increases, so that discharge occurs even if the magnitude of the scan bias voltage is small. If the magnitude of the scan bias voltage is not reduced, erroneous discharge due to excessive wall voltage occurs. On the contrary, when the temperature around the panel decreases, for example, at a low temperature lower than room temperature, the recombination ratio of the space charge and the wall charge in the discharge cell becomes high, so that the amount of wall charge in the discharge cell is reduced. That is, the absolute amount of wall charges participating in the discharge is reduced, so that the scan bias voltage is increased in size to discharge the battery. If the scan bias voltage is not increased, the miss discharge occurs due to the weak wall voltage.

The magnitude of the scan bias voltage is adjusted to prevent mis-discharge and miss discharge according to the temperature of the panel. Here, when the magnitude of the scan bias voltage described above is adjusted, the scan bias voltage is negative from the negative scan bias voltage Vyb. The voltage lowered to the lower limit scan voltage is called a scan pulse voltage, and the magnitude of the scan pulse voltage represents the negative polarity lower limit scan voltage based on the ground voltage. This will be described below with reference to FIG. 10.

10 is a diagram for explaining an example of the magnitude tolerance range of the scan pulse voltage.

Referring to FIG. 10, the magnitude of the scan pulse voltage applied to the scan electrode during the address period AP is maintained at a constant voltage regardless of the panel temperature.

Here, unlike the scan bias voltage applied during the above-described address period according to the temperature of the panel, the magnitude of the scan pulse voltage is maintained at a constant voltage. This is because the scan pulse voltage applied to the scan electrode and the address electrode ( This is to generate stable counter discharge with the data voltage applied to the device. Moreover, it is for extending the lifetime of a plasma display panel.

As a specific example of the size tolerance range of the scan pulse voltage, when the scan pulse voltage magnitude is less than 180 [V], it is less than the counter discharge start voltage required for the address discharge. Therefore, the scan pulse voltage is low, so that the discharge does not occur despite the opposite discharge to the above-described data voltage. As a result, a miss discharge in which discharge does not occur occurs and the plasma display image quality deteriorates. On the other hand, when the magnitude of the scan pulse voltage described above is 220 [V] or more, a voltage higher than the counter discharge start voltage required for the address discharge is supplied. When such a high voltage is supplied, strong discharge occurs in the discharge cell, resulting in stable discharge. Nevertheless, if the above-described strong discharge occurs during the counter discharge, many damages to the phosphors formed in the discharge cells are caused. These phosphors have a longer life with less damage. In other words, when the lifetime of the phosphor is extended, the lifetime of the plasma display panel is also increased.

In this way, despite the high voltage supplied and stable address discharge, the size of the scan pulse voltage is controlled to 220 [V] or less in order to lengthen the lifetime of the plasma display panel by minimizing phosphor damage.

As described above, the magnitude of the scan pulse voltage is maintained at 180 [V] or more and 220 [V] or less, resulting in stable address discharge and long lifetime of the plasma display panel.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described in detail above, the present invention adjusts the application time of the data pulse applied to the address electrode in the address period to reduce the noise of the waveform applied to the scan electrode and the sustain electrode, and also decreases in the set-down period of the reset period. When the ramp waveform (Ramp-down), the voltage applied to the sustain electrode is grounded to improve the discharge delay time The driving of the panel is stabilized to suppress the deterioration of the driving stability, and the size of the scan bias voltage applied to the scan electrode in the address period AP is adjusted according to the temperature of the plasma display panel, thereby preventing mis-discharge due to temperature. It is effective in preventing deterioration of image quality.

Claims (9)

A plasma display panel including a plurality of scan electrodes and sustain electrodes and a plurality of address electrodes formed to intersect the plurality of scan electrodes and sustain electrodes; A scan driver configured to adjust a scan bias voltage applied to the scan electrode during an address period according to a temperature of the plasma display panel; And A sustain driver for grounding a voltage applied to the sustain electrode during the setdown period of a reset period; Plasma display device comprising a. The method of claim 1, The scan driver applies a negative waveform to the scan electrode before a reset period, And the sustain driver is configured to apply a positive waveform to the sustain electrode while the negative waveform is being applied.  The method of claim 2, And wherein the negative waveform is a falling ramp waveform and the positive waveform is a square wave. The method of claim 1, During the address period, And a time point at which a scan pulse applied to the scan electrode away from the scan bias voltage is applied to a time point at which the data pulse applied to the address electrode is applied. The method of claim 1, The scan driver And a scan bias voltage applied to the scan electrode increases as the temperature of the plasma display panel increases. The method of claim 1, And a scan bias voltage applied to the scan electrode is equal to or less than ground. The method of claim 1, And the voltage of the scan pulse falling from the scan bias voltage is lower than the lower limit voltage of the falling ramp applied in the reset period before the address period AP. The method of claim 7, wherein The difference between the voltage of the scan pulse and the lower limit voltage of the falling lamp is 10 [V] or more and 20 [V] or less. The method of claim 1, And a scan pulse voltage falling from the scan bias voltage is 180 [V] or more and 220 [V] or less.

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