KR20070082145A - Driving apparatus for liquid crystal display and liquid crystal display including the same - Google Patents

Abstract

A driving apparatus for an LCD device and an LCD device including the same are provided to prevent a display error due to off of a power switch by applying a high gate voltage when the power switch is turned off. A driving apparatus for an LCD(Liquid Crystal Display) device includes gate and data drivers, and a DC/DC converter(700). The gate and data drivers generate gate and data signals, and apply the generated gate and data signals to gate and data lines, respectively. The DC/DC converter includes first and second charge pumps which generate gate-on and gate-off voltages, respectively. The second charge pump includes first to fifth diodes(d1~d5) and first to fifth capacitors(C1~C5). The second capacitor is connected between a contact point(N2) of the second and third diodes, and one end(N4) of the fourth diode.

Description

A driving device of a liquid crystal display and a liquid crystal display including the same {DRIVING APPARATUS FOR LIQUID CRYSTAL DISPLAY AND LIQUID CRYSTAL DISPLAY INCLUDING THE SAME}

With reference to the accompanying drawings will be described in detail the embodiments of the present invention to make the present invention clear.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 3 is a simplified view of the liquid crystal display shown in FIG. 1 in terms of an equivalent circuit.

FIG. 4 illustrates a discharge path when the power switch is cut off in the equivalent circuit shown in FIG. 3.

FIG. 5 is an example of a circuit for generating a gate-off voltage among the charge pumps of the DC / DC converter shown in FIG. 1.

6 is a graph illustrating the difference between two gate-off voltages.

FIG. 7 is a simulation circuit diagram for describing an operation when the power switch is cut off in the circuit shown in FIG. 5.

8 is a view showing a charge pump of a DC / DC converter according to the prior art.

9 is a view comparing the difference between the pixel voltage and the gate voltage according to the embodiment of the present invention and the prior art.

<Description of Drawing>

3: liquid crystal layer 100: lower display panel

191: pixel electrode 200: upper display panel

230: color filter 270: common electrode

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

700: DC / DC converter 710: charge pump

800: gray voltage generator

R, G, B: Input image data DE: Data enable signal

MCLK: Main Clock Hsync: Horizontal Sync Signal

Vsync: Vertical Sync Signal CONT1: Gate Control Signal

CONT2: data control signal DAT: digital video signal

Clc: Liquid Crystal Capacitor Cst: Keeping Capacitor

Q: switching device

The present invention relates to a driving device of a liquid crystal display and a liquid crystal display including the same.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

Such a liquid crystal display includes a display panel including a pixel including a switching element, a display signal line, a gate driver to turn on / off a switching element of a pixel by sending a gate signal to a gate line among the display signal lines, and to generate a plurality of gray voltages. A gray voltage generator, a data driver which selects a voltage corresponding to the image data among the gray voltages as a data voltage and applies a data voltage to the data lines of the display signal lines, and a signal controller to control the gray voltages.

At this time, in the liquid crystal display, when the power switch is turned off, the electric charges charged in the liquid crystal capacitor and the storage capacitor in the pixel are discharged. The discharging phenomenon takes place for a while and the image is temporarily blurred.

Accordingly, an object of the present invention is to provide a driving device for a liquid crystal display and a liquid crystal display including the same, which can solve the problems of the related art.

According to an exemplary embodiment of the present invention, a driving device of a liquid crystal display device including a gate line and a data line connected to a plurality of pixels is configured to generate a gate signal and apply the gate signal to the gate line. And a DC / DC converter including a driver, a data driver generating a data voltage and applying the data line to the data line, and first and second charge pumps respectively generating a gate on voltage and a gate off voltage. The pump includes first to fifth diodes and first to fifth capacitors, wherein the second capacitor is connected between the contact between the second diode and the third diode and one end of the fourth diode.

In this case, the second pump circuit includes an output terminal for outputting the gate-off voltage, wherein first to third nodes are located between the first diode and the fourth diode, and between the second node and the output terminal. The fifth diode and the fifth capacitor may be connected in parallel.

In addition, one end of the fourth diode may be connected to the third node and the other end of the fourth node, and the second node and the fourth node may be physically disconnected.

Meanwhile, the first capacitor is connected between the first node and the switching voltage, the third capacitor is connected between the third node and the switching voltage, and the fourth capacitor is connected with the fourth node. It may be connected between ground voltages.

In addition, a discharge circuit may be disposed between the output terminal and the ground voltage.

The data driver may include a path through which the voltage charged in the pixel is discharged when the power switch of the liquid crystal display is cut off.

The liquid crystal display according to the exemplary embodiment of the present invention may include a plurality of pixels, a gate line and a data line connected to the pixels, a gate driver to generate a gate signal and apply the gate signal, and a data voltage. And a DC / DC converter including a data driver applied to the data line, and first and second charge pumps respectively generating gate on voltages and gate off voltages, wherein the second charge pumps include first to fifth voltages. And a diode and first to fifth capacitors, wherein the second capacitor may be connected between the contact between the second diode and the third diode and one end of the fourth diode.

In this case, the second pump circuit includes an output terminal for outputting the gate-off voltage, wherein first to third nodes are located between the first diode and the fourth diode, and between the second node and the output terminal. The fifth diode and the fifth capacitor may be connected in parallel.

In addition, one end of the fourth diode may be connected to the third node and the other end of the fourth node, and the second node and the fourth node may be physically disconnected.

Meanwhile, the first capacitor is connected between the first node and the switching voltage, the third capacitor is connected between the third node and the switching voltage, and the fourth capacitor is connected to the fourth node and the ground. It may be connected between voltages.

In addition, a discharge circuit may be disposed between the output terminal and the ground voltage.

The data driver may include a path through which the voltage charged in the pixel is discharged when the power switch of the liquid crystal display is cut off.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention may include a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a gate driver 400 connected thereto. A DC / DC converter 700 connected to 400, a gray voltage generator 800 connected to the data driver 500, and a signal controller 600 for controlling them.

The liquid crystal panel assembly 300 may include a plurality of signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels PX connected to the plurality of signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. Include. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a plurality of data lines for transmitting a data signal ( D ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel PX, for example, the pixel PX connected to the i-th (i = 1, 2,, n) gate line G _i and the j-th (j = 1, 2,, m) data line Dj. ) Includes a switching element Q connected to the signal line G _i D _j , a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. FIG. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

Referring back to FIG. 1, the gray voltage generator 800 generates two sets of gray voltage sets (or reference gray voltage sets) related to the transmittance of the pixel PX. One of the two sets has a positive value for the common voltage Vcom and the other set has a negative value.

The gate driver 400 includes a plurality of stages connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300, respectively, to control the gate on voltage Von and the gate off voltage Voff. The combined gate signal is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 and selects a gray voltage from the gray voltage generator 800 and uses the data line D ₁ as a data signal. -D _m ). However, when the gray voltage generator 800 provides only a predetermined number of reference gray voltages instead of providing all of the voltages for all grays, the data driver 500 divides the reference gray voltages to divide the gray voltages for all grays. Generate and select the data signal from it.

The DC / DC converter 700 generates gate voltages Von and Voff and provides them to the gate driver 400.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 600, and 800 may be integrated in the liquid crystal panel assembly 300 together with the signal lines G ₁ -G _n , D ₁ -D _m and the thin film transistor switching element Q. It may be. In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 properly processes the input image signals R, G, and B according to operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate. After generating the signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to).

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 is a load for applying a data signal to the horizontal synchronization start signal STH and the data lines D ₁ -D _m indicating the start of image data transmission for the pixels PX in one row [bundling]. The signal LOAD, the data clock signal HCLK, and the switching control signal VSW are included. The data control signal CONT2 is also an inverted signal that inverts the voltage polarity of the data signal relative to the common voltage Vcom (hereinafter referred to as " polarity of the data signal " by reducing the " voltage polarity of the data signal for the common voltage &quot;) RVS) may be further included.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for the pixels PX in one row (bundling), and each digital image signal DAT. By converting the digital image signal DAT into an analog data signal by selecting a gray scale voltage corresponding to), it is applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n . Turn on the switching element (Q) connected to. Then, the data signal applied to the data lines D ₁ -D _m is applied to the pixel PX through the switching element Q turned on.

The difference between the voltage of the data signal applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented by a change in transmittance of light by a polarizer attached to the display panel assembly 300.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby all the gate lines G ₁ -G _n. ), The gate-on voltage Von is sequentially applied to the data signal to all the pixels PX, thereby displaying an image of one frame.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data signal applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). In this case, the polarity of the data signal flowing through one data line is changed (eg, row inversion and point inversion) or the polarity of the data signal applied to one pixel row is different depending on the characteristics of the inversion signal RVS within one frame. (E.g. column inversion, point inversion).

Next, a driving device of the display device according to an exemplary embodiment of the present invention will be described in more detail with reference to FIGS. 3 to 9.

FIG. 3 is a simplified view of the liquid crystal display shown in FIG. 1 in terms of an equivalent circuit, and FIG. 4 illustrates a discharge path when a power switch is shut off in the equivalent circuit shown in FIG. FIG. 5 is a circuit diagram for generating a gate-off voltage among the charge pumps of the DC / DC converter shown in FIG. 1, FIG. 6 is a graph showing a difference between two gate-off voltages, and FIG. 7 is a power supply in the circuit shown in FIG. 5. This is a simulation circuit diagram for explaining the operation when the switch is cut off. 8 is a view showing a charge pump of a DC / DC converter according to the prior art, and FIG. 9 is a view comparing the difference between the pixel voltage and the gate voltage according to the embodiment of the present invention and the prior art.

3 schematically shows an equivalent circuit of the liquid crystal display shown in FIG. 1.

That is, the input terminal of the switching element Q is connected to the data line DL having the internal resistance Rd, and the data line DL is connected to the ground voltage in the data driver 500. The control terminal of the switching element Q is connected to the gate line GL having the internal resistance Rg, and the gate line GL is connected to the DC / DC converter 700 via the gate driver 400. .

The DC / DC converter 700 includes a charge pump (CP) 710 for generating a gate on voltage Von and a gate off voltage Voff, and a resistor connected in parallel between the charge pump 710 and the ground voltage. (Ro) and capacitor (Co).

In addition, the output terminal of the switching element Q is connected to the pixel capacitor Cp, which can be represented by the equivalent capacitance of the liquid crystal capacitor Clc and the storage capacitor Cst.

In this case, when the gate-on voltage Von is applied to the gate voltages Von and Voff based on one gate line GL, the gate-on voltage Voff is only 1H. do. Therefore, the voltage across the gate line GL will be described below as a gate-off voltage Voff.

When the power switch of the liquid crystal display is cut off, as shown in FIG. 4, the pixel voltage charged in the pixel capacitor Cp is discharged along the path a, and the gate-off voltage Voff applied to the gate line GL is discharged. ) Is discharged to ground voltage 0V along path (b).

In this case, the discharge time is determined by a time constant that is determined by the product of the resistance Ro and the capacitor Co. However, since the discharge time is determined by the leakage current in the state in which the switching element Q is turned off, the discharge time takes a long time, which causes a screen defect, that is, a discharge defect due to the residual voltage. The present invention for solving the defect will be described in more detail.

As described above, the charge pump 710 generates the gate-on voltage Von and the gate-off voltage Voff, and FIG. 5 illustrates a part of generating the gate-off voltage Voff.

The charge pump 710 of the DC / DC converter 700 according to an embodiment of the present invention includes a plurality of diodes d1-d5 and a capacitor C1-C5.

Diodes d4, d3, d2, and d1 are sequentially connected between the contact N4 and the ground voltage.

Capacitors C1 and C3 are connected between two contacts N1 and N3 and switching voltage SW, respectively, capacitor C2 is connected between contacts N2 and N4, and capacitor C4 is a contact. It is connected between N4 and ground voltage.

In addition, the capacitor C5 and the diode d5 are connected in parallel between the contact N2 and the contact N5.

At this time, the switching voltage SW is 0V and 7.5V, and as shown in FIG. 6, the gate-off voltage Voff1 is -12V and the gate-off voltage Voff2 is -6V.

7 is a spice simulation circuit diagram for analyzing the voltage VN2 of the contact point N2 directly affecting the gate voltage Vgt of the switching element Q. In FIG.

That is, in the charge pump 710 illustrated in FIG. 5, the output terminal OUT of the gate-off voltage Voff is connected to the gate line GL, and the voltage of the contact N5 is a diode at the voltage of the contact N2. Since the voltage is added by the threshold voltage of (d5), the gate voltage Vgt can also be known by simulating the voltage of the contact point VN2.

Therefore, from this point of view, an equivalent circuit for simulation can be configured as shown in FIG. 7, and the operation of the simulation circuit will be described with reference to FIG.

Here, the capacitor C is shown only to be involved in the operation after the power switch is turned off among the capacitors C1-C4, that is, connected between the two contacts (N2, N4). In addition, the two voltage sources V1 and V2 make voltages of the contacts N2 and N4 and are AC voltage sources.

First, before turning off the power switch of the liquid crystal display device, the voltage of the contact point N2 is -6V as described above, and the voltage of the contact point N4 is -12V. To this end, the values of the two power supply voltages V1 and V2 may be appropriately determined. For example, the power supply voltage V1 may be set to −12 V, and the power supply voltage V2 may be set to −7.4 V in consideration of 0.7 V, which is a threshold voltage of the diode.

In this case, the two diodes d3 and d4 are connected in the opposite direction and thus are turned off, and the voltage VN2 of the contact point is equal to the threshold voltage of the diode d5 while passing through the diode d5, for example, the threshold voltage is 0.7. In the case of V, approximately -5.3V is stably supplied.

On the other hand, when the power switch of the liquid crystal display is turned off at time t1, the two power supply voltages V1 and V2 are changed to 0 V, which is the ground voltage.

Accordingly, the voltage of the contact point N4 is changed to 0V, and the contact point N2 is connected to the ground voltage via two diodes d1 and d2 as shown in FIG. 5.

At this time, since the voltage across the capacitor C2 is 6V and does not change instantaneously, when the voltage of the contact N4 changes from -12V to 0V, the voltage of the contact N2 also changes from -6V to 6V (path c). . At this time, a voltage added with 0.7 V through the diode d5 is applied to the gate voltage Vgt, and the pixel voltage Vp starts discharging (path d).

Meanwhile, the two diodes d1 and d2 connected between the contact N2 and the ground voltage are connected in the forward direction, and the voltage of the contact N2 gradually decreases as the voltage is discharged along the path e. At this time, since there are two diodes between the contact point N2 and the ground voltage, the voltage decreases to 1.4V. The voltage obtained by adding the threshold voltage of the diode d5 to the gate voltage Vgt is again applied.

8 illustrates a charge pump 710 of the liquid crystal display according to the related art.

Compared to the charge pump 710 according to the present invention shown in FIG. 5, the resistor R1 shown in part A 'of FIG. 8 is short-circuited as shown in part A of FIG. The resistor R2 shown in the portion B 'is open as shown by the portion B in FIG. In addition, the part shown by the part C 'of FIG. 8, ie, one end of the capacitor C2 is connected to the ground voltage, while one end of the capacitor C2 is connected to the contact in FIG.

9 illustrates a gate voltage Vgt1 generated by the charge pump 710 of the liquid crystal display according to the present invention when the power switch is turned off, and a gate voltage Vgt2 generated by the charge pump 710 of the liquid crystal display according to the related art. ), Respectively.

As described above, the charge pump of the liquid crystal display according to the present invention and the charge pump of the liquid crystal display according to the prior art are only three differences. However, as shown in FIG. 9, it is confirmed that the time for discharging the pixel voltage Vp can be reduced by the time Tf, which is actually improved by 60% or more.

That is, the gate voltage Vgt1 is higher than the gate voltage Vgt2, thereby making the path easier to discharge, while a very high gate voltage Vgt1 is applied at the time t1 at which the power switch is turned off, thereby further reducing the discharge time. Able to know.

As such, the discharge time of the pixel voltage Vp may be greatly reduced while minimizing the change of the circuit. Therefore, it is possible to prevent a screen defect that may occur when the power switch of the liquid crystal display is turned off.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (12)

A driving device of a liquid crystal display device including a gate line and a data line connected to a plurality of pixels. A gate driver configured to generate a gate signal and apply the gate signal to the gate line; A data driver for generating a data voltage and applying the data voltage to the data line; DC / DC converter including first and second charge pumps to generate gate on voltage and gate off voltage, respectively Including, The second charge pump includes first to fifth diodes and first to fifth capacitors, The second capacitor is connected between the contact between the second diode and the third diode and one end of the fourth diode. Driving device for liquid crystal display device. In claim 1, The second pump circuit includes an output terminal for outputting the gate off voltage, First to third nodes are located between the first diode and the fourth diode, respectively. The fifth diode and the fifth capacitor are connected in parallel between the second node and the output terminal. Driving device for liquid crystal display device. In claim 2, One end of the fourth diode is connected to the third node, and the other end is connected to the fourth node, The second node and the fourth node is physically disconnected Driving device for liquid crystal display device. In claim 3, The first capacitor is connected between the first node and a switching voltage, The third capacitor is connected between the third node and the switching voltage, The fourth capacitor is connected between the fourth node and the ground voltage Driving device for liquid crystal display device. In claim 4, And a discharge circuit disposed between the output terminal and the ground voltage. In claim 5, And the data driver has a path through which the voltage charged in the pixel is discharged when the power switch of the liquid crystal display is cut off. A plurality of pixels, A gate line and a data line connected to the pixel; A gate driver configured to generate a gate signal and apply the gate signal to the gate line; A data driver for generating a data voltage and applying the data voltage to the data line; DC / DC converter including first and second charge pumps to generate gate on voltage and gate off voltage, respectively Including, The second charge pump includes first to fifth diodes and first to fifth capacitors, The second capacitor is connected between the contact between the second diode and the third diode and one end of the fourth diode. Liquid crystal display. In claim 7, The second pump circuit includes an output terminal for outputting the gate off voltage, First to third nodes are located between the first diode and the fourth diode, respectively. The fifth diode and the fifth capacitor are connected in parallel between the second node and the output terminal. Liquid crystal display. In claim 8, One end of the fourth diode is connected to the third node, and the other end is connected to the fourth node, The second node and the fourth node is physically disconnected Liquid crystal display. In claim 9, The first capacitor is connected between the first node and a switching voltage, The third capacitor is connected between the third node and the switching voltage, The fourth capacitor is connected between the fourth node and the ground voltage Liquid crystal display. In claim 10, And a discharge circuit disposed between the output terminal and the ground voltage. In claim 11, And the data driver has a path through which the voltage charged in the pixel is discharged when the power switch of the liquid crystal display is cut off.

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