KR20070081580A - Thin film transistor panel and method for manufacturing the same and liquid crystal display - Google Patents

Abstract

A thin film transistor substrate, a manufacturing method thereof, and an LCD(Liquid Crystal Display) are provided to reduce a defect caused by bubbles, by trapping bubbles of a liquid crystal layer in a recess portion on a storage line. A plurality of data lines(130) intersect a plurality of gate lines. A plurality of thin film transistors are provided at a plurality of pixel areas defined by the gate lines and the data lines, and are connected with the two lines. A plurality of storage lines(140) are provided on the same surface as the gate lines. A pixel electrode(150) is provided in the pixel area, and is connected with the thin film transistor. A passivation layer(131) includes a recess portion(145) on the storage line. The recess portion has the same shape as the storage line. The recess portion includes at least one recess groove.

Description

Thin film transistor substrate, method for manufacturing same, and liquid crystal display device {THIN FILM TRANSISTOR PANEL AND METHOD FOR MANUFACTURING THE SAME AND LIQUID CRYSTAL DISPLAY}

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along lines A-A and B-B. FIG.

3 is a plan view of a liquid crystal display according to a modification of the exemplary embodiment.

4 to 7 are plan and cross-sectional views sequentially showing a process of manufacturing a thin film transistor substrate according to an embodiment of the present invention.

8 is a diagram for explaining formation of a protective film having a five-fold portion.

<Explanation of symbols for main parts of the drawings>

110: gate line 120: thin film transistor

130: data line 140: storage wiring

145: recess 150: pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate, a method for manufacturing the same, and a liquid crystal display device, and more particularly, to a thin film transistor substrate, a method for manufacturing the same, and a liquid crystal, in which an area capable of trapping bubbles generated due to lack of liquid crystal when a liquid crystal is dripped It relates to a display device.

In general, a liquid crystal display (LCD) includes a thin film transistor substrate including a pixel electrode, a storage capacitor, and a thin film transistor (TFT) for switching each pixel, and a common electrode substrate including a common electrode, etc. And liquid crystal sealed between the two substrates.

In particular, the liquid crystal display of the above structure displays an image by applying a voltage between two substrates to drive the liquid crystal and controlling the transmittance of light. That is, the representation of the image changes as the liquid crystal drive between the two substrates. Therefore, the liquid crystal must be uniformly injected between the two substrates to be sealed. To this end, an appropriate amount of liquid crystal is injected through the liquid crystal dropping process onto the thin film transistor substrate, the common electrode substrate is pressed, and the two substrates are sealed, so that the liquid crystal dropped on the thin film transistor substrate is widely spread, and the liquid crystal is evenly distributed between the two substrates. do.

However, in this case, when the amount of liquid crystal is not accurate and the amount of liquid crystal is large, a defect such as gravity occurs. In addition, when the amount of liquid crystal is insufficient, there is a problem that bubble voids are generated between two substrates.

Accordingly, the present invention has been made to solve the above problems, and the thin film transistor substrate can reduce the bubble defect due to lack of liquid crystal neutralization by forming a recess to collect bubbles by reducing the thickness of the protective layer on the storage line. And a manufacturing method thereof and a liquid crystal display device.

A plurality of gate lines according to the present invention, a plurality of data lines crossing the gate lines, a plurality of thin film transistors provided in the plurality of pixel regions defined by the gate lines and the data lines and connected to the two lines; And a plurality of storage wirings disposed on the same surface as the gate line, a pixel electrode provided in the pixel region and connected to the thin film transistor, and a protective film having a recessed portion on the storage wiring.

Here, the recess is preferably provided in the same shape as the storage wiring. In addition, the concave portion preferably includes at least one concave groove. It is effective that the recess is provided in the pixel area.

When the width of the storage wiring is set to 1, the width of the recess is 0.1 to 1.2, and when the thickness of the protective film is 1, the depth of the recess is preferably 0.1 to 0.8.

It is preferable that the said recessed part is manufactured using the slit mask in which the slit pattern was provided in the area | region corresponding to the said recessed part.

In addition, forming a gate electrode, a gate line and a storage wiring on the light-transmissive substrate according to the present invention, by applying a gate insulating film, an active layer and a conductive film on the entire structure including the gate electrode and then patterning the source electrode, Forming a drain electrode and a data line, applying a protective film on the entire structure including the data line, patterning the contact hole to expose a portion of the drain electrode, and a portion of an upper region of the storage wiring. It provides a method of manufacturing a thin film transistor substrate comprising the step of forming a recessed portion, and forming a pixel electrode on the protective film.

The passivation layer may be formed by exposure and development using a slit mask including a light transmitting portion corresponding to the contact hole region, a slit portion corresponding to the concave portion, and a light shielding portion corresponding to a region excluding the light transmitting portion and the slit portion. It is preferable to pattern.

Further, a plurality of thin film lines provided in a plurality of gate lines according to the present invention, a plurality of data lines crossing the gate lines, and a plurality of pixel regions defined by the gate lines and the data lines and connected to the two lines. A lower substrate including a transistor, a plurality of storage wirings provided on the same plane as the gate line, a pixel electrode provided in the pixel region and connected to the thin film transistor, and a protective film having a recessed portion on the storage wiring; A liquid crystal display device includes an upper substrate including a common electrode facing the lower substrate and opposing the pixel electrode, and a liquid crystal layer formed between the lower substrate and the upper substrate.

Here, the recess is preferably provided in the same shape as the storage wiring. Preferably, the recess includes at least one recess. The recess is effectively provided in the pixel region.

Of course, the recess is preferably manufactured using a slit mask provided with a slit pattern in the region corresponding to the recess. In addition, the liquid crystal layer is effectively formed by dropping the liquid crystal on any one of the two substrates and then pressure-sealing the two substrates.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you.

In the drawings, the thickness of layers, films, panels, regions, etc., may be exaggerated for clarity, and like reference numerals designate like elements. In addition, when a part such as a layer, a film, an area, or a plate is expressed as being on or above another part, not only when each part is directly above or directly above the other part but also another part between each part and another part This includes cases.

1 is a plan view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along line A-A and line B-B.

1 and 2, the liquid crystal display according to the present exemplary embodiment includes a thin film transistor substrate 1000 as a lower substrate, a common electrode substrate 2000 as an upper substrate disposed opposite thereto, and a gap between the two substrates. And a liquid crystal layer (not shown) formed and oriented in a desired direction with respect to both substrates.

The thin film transistor substrate 1000 crosses the gate lines 110 and the plurality of gate lines 110 which transmit a gate signal on the translucent insulating substrate 100 and extend in the horizontal direction and have a predetermined distance in the vertical direction. A plurality of data lines 130 formed, a pixel electrode 150 formed in the pixel region defined by the gate line 110 and the data line 130, and connected to the pixel electrode and connected to the gate line 110 and the data line. And a plurality of thin film transistors 120 formed in a matrix form at the intersections of the 130 and the storage lines 140 provided on the same plane as the gate lines 110 and overlapping a part of the pixel electrode 150. . A predetermined recess 145 is formed on the storage line 140 to trap bubbles.

The thin film transistor 120 allows the pixel signal supplied to the data line 130 to be charged in the pixel electrode 150 in response to the signal supplied to the gate line 110. Accordingly, the thin film transistor 120 includes a gate electrode 121 connected to the gate line 110, a source electrode 125 connected to the data line 130, and a drain electrode 126 connected to the pixel electrode 150. ), A gate insulating layer 122 and an active layer 123 sequentially formed between the gate electrode 121, the source electrode 125, and the drain electrode 126, and an ohmic contact layer formed on at least a portion of the active layer 123 ( 124). In this case, the ohmic contact layer 124 may be formed on the active layer 123 except for the channel part.

In addition, an insulating protective film 131 is formed on the thin film transistor 120. The protective film 131 may be formed of an inorganic material such as silicon nitride or silicon oxide, or may be formed of a low dielectric constant organic film. Of course, it may be formed of a double layer of an inorganic insulating film and an organic film.

In the present embodiment, it is preferable to reduce the thickness of the passivation layer 131 on the storage wiring 140 to provide a predetermined recess 145 to trap bubbles generated after the subsequent liquid crystal dropping process. For example, if the area of the storage wiring 140 in one pixel is 60 μm * 190 μm and the protective film 131 is recessed about 2.5 μm, the two substrates have a volume of 28500 μm ³ in which bubbles can be trapped in one pixel. Bubbles in the liquid crystal layer provided therebetween can be sufficiently trapped. That is, when the liquid crystal is dropped onto one of the two substrates and then the two substrates are press-bonded, small bubbles of void type are generated, and these bubbles slowly move in the pixel and are trapped in the recess 145. . As such, the small bubbles of the void type are trapped in the recess 145 so that they are not visually recognized from the outside. This can increase the drop margin.

When the width of the storage wiring 140 is 1, the width of the recess 145 is preferably 0.1 to 1.2, more preferably 0.7 to 1. That is, in order to increase the space of the recess 145 and to increase the aperture ratio, it is more effective to manufacture the width similar to the width of the storage wiring 140. When the thickness of the passivation layer 131 deposited on the pixel region is 1, the depth of the recess 145, that is, the depth where the passivation layer 131 is recessed, is preferably 0.1 to 0.8.

In the present exemplary embodiment, the concave portion 145 is described as having the same linear shape as the storage wiring 140, but the concave portion 145 is not limited thereto, and a plurality of concave grooves are formed on the upper side of the storage wiring 140. It may be provided in the form. At this time, the planar shape of the groove can be a variety of shapes, such as polygon, circle, oval according to the pattern design. Such a plurality of concave groove shapes may be connected to each other. The recess 145 may be formed only in the pixel area.

In this way, the storage wiring 140 is provided under the recess 145 formed by recessing the passivation layer 131. In this case, the storage line 140 includes an electrode unit 141 provided in the pixel area and a connection unit 142 connecting them. Of course, the present invention is not limited thereto and may be provided in the form of one line connecting a plurality of pixel lines. The concave portion 145 may be provided only on the electrode portion 141 or the connection portion 142, or may be provided in an upper region of both the electrode portion 141 and the connection portion 142.

In the pixel area on the passivation layer 131 having the concave portion 145 on the storage line 140, the pixel electrode 150 overlapping the storage line 140 and a portion thereof is provided. At this time, since a portion of the passivation layer 131 on the storage wiring 140 is recessed, the gap between the storage wiring 140 and the pixel electrode 150 is reduced, so that the capacitance between the two (capacitance of the storage capacitor) is reduced. Can be increased. The pixel electrode 150 is formed using indium tin oxide (ITO) or indium zinc oxide (IZO) made of a transparent conductive material.

Meanwhile, the common electrode substrate 2000 includes a black matrix 210 for each unit pixel and a black matrix for preventing optical interference between light leakage and adjacent pixel regions on a lower surface of the insulating substrate 200 made of a transparent insulating material such as glass. Red, green, and blue color filters 220 are formed, and an overcoat layer 230 made of an organic material is formed on the color filters 220. The common electrode 240 made of a transparent conductive material such as ITO or IZO is formed on the overcoat layer 230.

A spacer (not shown) is provided between the thin film transistor substrate 1000 and the common electrode substrate 2000 to maintain a cell gap. In this case, the spacer may be fabricated on the common electrode substrate 2000 or the thin film transistor substrate 1000. In the present exemplary embodiment, the liquid crystal layer between the thin film transistor substrate 1000 and the common electrode substrate 2000 is formed through a liquid crystal dropping process, and the alignment of the liquid crystal is provided on the opposite surface of the thin film transistor substrate 1000 and the common electrode substrate 2000. For this purpose, an alignment layer is provided to align the liquid crystal molecules of the liquid crystal layer. At this time, the alignment of the liquid crystal molecules of the liquid crystal layer is preferably a vertical alignment mode to be perpendicular to each substrate, but may not be a vertical alignment. Then, a sealing member for sealing the two substrates to prevent the outflow of the liquid crystal is provided in the edge region of the two substrates.

The liquid crystal display according to the present exemplary embodiment is not limited to the above description, and various modifications are possible in the structure of the entire element including the pixel electrode, the common electrode, and the pattern of the pixel region. Hereinafter, a liquid crystal display according to a modification of the present embodiment will be described with reference to the accompanying drawings.

3 is a plan view of a liquid crystal display according to a modification of the exemplary embodiment.

Referring to FIG. 3, the liquid crystal display of the present modification may include a plurality of cutouts 151 and / or protrusions 241 to improve the viewing angle. That is, in this modified example, a plurality of cutouts 151 are formed in the pixel electrodes 150a and 150b, and a plurality of protrusions are provided in the common electrode 240 to divide one pixel area into a plurality of domains, thereby improving the viewing angle. You can also In addition, the side visibility may be improved by dividing the unit pixels into a plurality of sub-pixels to improve side tone aggregation or inversion. To this end, a first sub-pixel including the first pixel electrode 150a displaying high gray levels and a second sub-pixel including the second pixel electrode 150b displaying low gray levels are provided.

A separate thin film transistor 120 is connected to each of the first and second sub pixels. That is, a first thin film transistor is connected to the first pixel electrode 150a, and a second thin film transistor is connected to the second sub pixel 150b to apply signals having different voltages to the first and second sub pixels. To this end, in the present modified example, a unit pixel is driven by using two gate lines 110a and 110b and one data line 130, and first and second thin film transistors are respectively formed on the two gate lines 110a and 110b. The first and second thin film transistors are connected to one data line 130. However, the present invention is not limited thereto, and the unit pixel is driven by using one gate line and two data lines, and the first and second thin film transistors are connected to one gate line, and the first and second thin film transistors are respectively. It can also be connected to another data line.

The storage wiring 140 overlapping the first and second pixel electrodes 150a and 150b and a portion thereof is provided. The storage line 140 crosses the center of the pixel area. As in the above-described embodiment, a recess 145 is formed on the storage line 140 by recessing a portion of the passivation layer 131. As a result, bubbles generated by liquid crystal dropping may be trapped inside the recess 145.

Hereinafter, a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention may include a recess in which a portion of the passivation layer on the upper portion of the storage wiring is recessed to trap bubbles generated during liquid crystal dropping. The following description will focus on the manufacturing method of one pixel.

4 to 7 are plan and cross-sectional views sequentially illustrating a process of manufacturing a thin film transistor substrate according to an embodiment of the present invention.

Referring to FIG. 4, after forming a first conductive film on the transparent insulating substrate 100, the gate lines 110 and the gate electrodes 121 are formed through an etching process using a first photoresist mask pattern (not shown). ) And the storage wiring 140.

In the present embodiment, it is preferable to use a glass substrate as the transparent insulating substrate 100. Of course, the present invention is not limited thereto, and plastic or acrylic may be used. The first conductive film is formed on the transparent insulating substrate 100 by a deposition method using a CVD method, a PVD method, a sputtering method, or the like. It is preferable to use at least one of Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), and Cr / Al (Nd) as the first conductive film. Of course, the present invention is not limited thereto, and as described above, the first conductive layer may be formed of at least one metal of Al, Nd, Ag, Cr, Ti, Ta, and Mo, or an alloy containing them, but may be formed as a single layer or a multilayer. Can be. Subsequently, after the photosensitive film is coated on the first conductive film, a photolithography process using the first mask is performed to form a first photoresist mask pattern. An etching process using the first photoresist mask pattern as an etching mask is performed to extend the gate line 110, the gate electrode 121 connected thereto, and the gate line 110 in the same direction as illustrated in FIG. 4. It is preferable to form the storage wiring 140. At this time, the gate line 110 is preferably manufactured in a straight shape extending in the horizontal direction. Thereafter, a predetermined strip process is performed to remove the first photoresist mask pattern.

Referring to FIG. 5, the gate insulating layer 122, the active layer 123, the ohmic contact layer 124, and the second conductive layer are sequentially formed on the entire structure shown in FIG. 4, and then a second photoresist mask pattern (not shown) is formed. Etching to form a channel region of the thin film transistor including the active layer 123 and the ohmic contact layer 124, and the source and drain electrodes 125 and 126 and the data line 130 are formed. .

The gate insulating film 122 is formed on the entire substrate through a deposition method using a PECVD method, a sputtering method, or the like. In this case, it is preferable to use an inorganic insulating material including silicon oxide or silicon nitride as the gate insulating film 122. The active layer 123, the ohmic contact layer 124, and the second conductive layer are sequentially formed on the gate insulating layer 122 by the above-described deposition method.

An amorphous silicon layer is used as the active layer 123, and an amorphous silicon layer doped with a high concentration of silicide or N-type impurities is preferably used as the ohmic contact layer 124. The second conductive film is preferably made of a metal including Mo, Al, Cr, Ti, and alloys thereof, but preferably made of a metal single layer or multiple layers. Of course, the present invention is not limited thereto, and the same material as the gate electrode 121 may be used.

Thereafter, a photosensitive film is coated on the second conductive film, and then a lithography process using a mask is performed to form a second photosensitive film mask pattern recessed on the channel region. It is preferable to pattern the second photoresist mask pattern using a slit mask in which slits are formed in a region corresponding to the channel region.

The first etching using the second photoresist mask pattern as an etching mask is performed to remove the second conductive layer, the ohmic contact layer 124, and the active layer 123. The recessed area is opened by dividing the height of the second photoresist mask pattern. Subsequently, a second etching process using the second photoresist mask pattern having the open channel region as an etch mask is performed to remove the second conductive layer and the ohmic contact layer 124 on the channel region, thereby removing the source and drain electrodes of the thin film transistor 120. (125, 126) and data line 130 are fabricated.

Referring to FIG. 6, the protective film 131 is coated on the entire structure as shown in FIG. 5, and the contact film 131 is formed by removing the protective film 131 through an exposure and development process using a mask. A recess 145 is formed by removing a portion of an upper region of the storage line 140.

8 is a diagram for explaining formation of a protective film having a five-fold portion.

As shown in FIG. 8A, a protective film 131 is coated on the entire structure in which the storage wiring 140 and the thin film transistor 120 are provided. As the protective film, an organic material film or an inorganic material film may be used. In this embodiment, it is preferable to use the photosensitive organic material film as the protective film 131. Of course, the passivation layer 131 may be made of a material having excellent light transmittance, and may be made of the same material as the gate insulating layer 122. The protective film 131 may be formed in a plurality of layers.

As shown in (b) of FIG. 8, the light transmitting portion 320 corresponding to the contact hole 127 region, the slit portion 330 corresponding to the upper region of the storage wiring 140, the light transmitting portion 320 and Exposure is performed using the mask 300 including the light blocking portion 310 provided in an area excluding the slit portion 330. In this case, the amount of light exposed to the lower region may be adjusted according to the slit portion 330 to expose the contact hole 127 exposing the drain electrode 126 under the passivation layer 131 and the upper region of the storage wiring 140. A portion of the recessed portion 145 can be manufactured at the same time. That is, when the exposure is performed using the mask 300, 90% or more of light is transmitted through the light transmitting part 320, and the entire protective film 131 provided under the light transmitting part 320 is exposed to expose the chemical property thereof. Can change. In addition, only 30 to 70% of light passes through the slit portion 330, so that the passivation layer 131 under the slit portion 330 is exposed only to a predetermined depth, so that only a predetermined distance from the surface of the passivation layer 131 is exposed. do. That is, the protective film 131 under the slit portion 330 is exposed only to a depth of about 0.3 to 0.7 from the surface in the thickness direction of the protective film 131, the chemical properties thereof are changed, and the remaining areas are not exposed. Chemical properties do not change. Here, the transflective part may be used instead of the slit part 330 of the mask 300.

As shown in FIG. 8C, the mask 300 including the slit portion 330 is removed, and then a development process is performed to remove the protective film 131 whose chemical property is changed through exposure, thereby removing the drain electrode ( The contact hole 127 that opens a portion of the 126 and a portion of the upper layer of the storage line 140 may simultaneously form the recessed recess 145.

Referring to FIG. 7, indium tin oxide (ITO) or indium zinc oxide (IZO) is included on the passivation layer 131 including the contact hole 127 and the recess 145. A third conductive film of the transparent conductive film is formed and then patterned to form the pixel electrode 150.

After the photosensitive film is coated on the third conductive film, a photolithography process using a mask is performed to form a photosensitive film mask pattern. The pixel electrode 150 connected to the drain electrode 126 through the contact hole 127 is formed through an etching process using the photoresist mask pattern as an etching mask. In this case, the pixel electrode 150 is provided along a step in a portion of the inner side of the recess 145.

 Through this, the lower substrate, that is, the thin film transistor substrate 100 is manufactured. The thin film transistor substrate 100 of the above-described embodiment is formed by a four mask process, but is not limited thereto. The thin film transistor substrate 100 may also be formed through four or more mask processes or four or less mask processes.

Meanwhile, the common electrode substrate 2000 is coated with an opaque material on the transparent insulating substrate 200 and then patterned to form the gate line 110, the thin film transistor 120, the data line 130, and the storage wiring 140. ) To form a black matrix 210 that shields the area. Thereafter, an organic layer having a predetermined color characteristic is coated and patterned to form a color filter 220 in the pixel region. In this case, it is preferable that color filters 220 of R, G, and B colors are continuously formed for each unit pixel. Next, the overcoat layer 230 and the transparent common electrode 240 are sequentially formed on the color filter 220 to be manufactured. In addition, it is preferable to form a spacer (not shown) for maintaining a cell gap in a part of the common electrode substrate 2000.

A liquid crystal is dropped on one of the thin film transistor substrate 1000 and the common electrode substrate 2000 manufactured as described above, and a sealing member (not shown) including a sealant is applied to the edge of the other substrate. Thereafter, the two substrates are aligned and then bonded together to fabricate a basic panel of the liquid crystal display. In the present exemplary embodiment, a liquid crystal is dropped on the thin film transistor substrate 1000, and a sealing member for sealing the two substrates is applied to the edge of the common electrode substrate 2000. Then, the pixel electrode 150 of the lower thin film transistor substrate 1000 and the color filter 220 of the upper common electrode substrate 2000 correspond to each other precisely and overlapped, and then pressurize the high temperature to seal the two substrates. The dropped liquid crystal is spread widely between the two substrates. In this case, the dropping amount of the liquid crystal is preferably added dropwise by calculating the cell gap of the two substrates. As the dropped liquid crystals spread wide and overlap with the liquid crystal spreading in an adjacent region, fine bubbles may be formed. In addition, when the amount of liquid crystal drops is small, such bubbles may be generated more frequently. However, in the present embodiment, such bubbles slowly move and collect into the recess 145 provided on the storage line 140, and the bubbles thus collected are trapped in the recess 145. As a result, the bubble is not visually recognized in the region displaying the image, and the bubble defect can be solved.

The liquid crystal display according to the exemplary embodiment of the present invention preferably includes a liquid crystal having a negative type dielectric constant anisotropy between the upper and lower substrates to vertically align it. The liquid crystal display described above may arrange elements such as a polarizer, a backlight, and a compensation plate, which are not shown on both sides of the basic panel.

As described above, the present invention can form a concave portion capable of trapping bubbles in the liquid crystal layer on the upper side of the storage wiring so that bubbles in the liquid crystal layer are not visually recognized, thereby reducing bubble defects.

In addition, by using the slit mask to pattern the protective layer of the upper layer of the storage wiring to form a recessed recessed protective film can be solved the problem of bubble defects without increasing the process cost, such as adding a separate mask.

Although the invention has been described with reference to the accompanying drawings and the preferred embodiments described above, the invention is not limited thereto, but is defined by the claims that follow. Accordingly, one of ordinary skill in the art may variously modify and modify the present invention without departing from the spirit of the following claims.

Claims (14)

A plurality of gate lines; A plurality of data lines intersecting the gate lines; A plurality of thin film transistors provided in the plurality of pixel areas defined by the gate line and the data line and connected to the two lines; A plurality of storage lines provided on the same plane as the gate line; A pixel electrode provided in the pixel region and connected to the thin film transistor; A thin film transistor substrate comprising a passivation layer having a recess on the storage wiring. The method according to claim 1, The concave portion is a thin film transistor substrate provided in the same shape as the storage wiring. The method according to claim 1, The concave portion includes at least one concave groove. The method according to claim 1, The concave portion is a thin film transistor substrate provided in the pixel region. The method according to claim 1, The width of the recess is 0.1 to 1.2 when the width of the storage wiring is 1, and the depth of the recess is 0.1 to 0.8 when the thickness of the protective film is 1. The method according to claim 1, The recess is formed by using a slit mask provided with a slit pattern in a region corresponding to the recess. Forming a gate electrode, a gate line and a storage wiring on the light transmissive substrate; Forming a source electrode, a drain electrode, and a data line by applying a gate insulating film, an active layer, and a conductive film on the entire structure including the gate electrode; Applying a protective layer on the entire structure including the data line and patterning the protective layer to form a contact hole exposing a portion of the drain electrode and a recess in which a portion of the upper region of the storage line is recessed; Forming a pixel electrode on the passivation layer. The method according to claim 7, Patterning the protective film through exposure and development using a slit mask comprising a light transmitting portion corresponding to the contact hole region, a slit portion corresponding to the concave portion, and a light shielding portion corresponding to a region excluding the light transmitting portion and the slit portion. The manufacturing method of a thin film transistor substrate. A plurality of gate lines, a plurality of data lines crossing the gate lines, a plurality of thin film transistors provided in the plurality of pixel regions defined by the gate lines and the data lines and connected to the two lines, and the gate lines A lower substrate including a plurality of storage wirings disposed on the same surface as the semiconductor substrate, a pixel electrode provided in the pixel region and connected to the thin film transistor, and a protective layer on the storage wiring; An upper substrate facing the lower substrate and including a common electrode facing the pixel electrode; And And a liquid crystal layer formed between the lower substrate and the upper substrate. The method according to claim 9, The recess is formed in the same shape as the storage wiring. The method according to claim 9, The recess includes at least one recess. The method according to claim 9, The recess is a liquid crystal display device provided in the pixel area. The method according to claim 9, The recess is formed by using a slit mask provided with a slit pattern in a region corresponding to the recess. The method according to claim 9, The liquid crystal layer is formed by dropping a liquid crystal onto any one of two substrates and then pressing and sealing the two substrates.

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