KR20070070412A - High voltage transistor and method for manufacturing the same - Google Patents

Abstract

A high voltage transistor and its manufacturing method are provided to prevent a leakage current path from being generated between a field stop area and a drift area by forming a device isolation layer between the drift area and the field stop layer of each devices in a field region. A high voltage transistor comprises the followings: a field oxide layer(115) formed on a substrate(110) to isolate adjacent devices; a gate electrode(118) formed on the substrate between the field oxide layers; a source/drain(120a,120b) region formed in the substrate exposed toward both sides of the gate electrode; a drift region(112) formed in the substrate to surround the source/drain region; a FSA(field stop area) formed in the field region of lower part of the field oxide layer; a device isolation layer(114) is formed between the drift region and the FSA in the field region.

Description

HIGH VOLTAGE TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

1 is a cross-sectional view illustrating the structure of a general high voltage transistor.

2 is a cross-sectional view illustrating the structure of a high voltage transistor according to an embodiment of the present invention;

3A to 3D are cross-sectional views illustrating a method of manufacturing the high voltage transistor shown in FIG. 2.

<Explanation of symbols for the main parts of the drawings>

10, 110: substrate

11, 111: p-well

12, 112 drift region

13, 115: field oxide film

14, 116: gate oxide film

15, 117: polysilicon film

16, 118: gate electrode

17, 119: spacer

18a, 18b, 120a, 120b: source and drain regions

19, 121: body area

20a, 20b, 122a, 122b: contact

FSA: Field Stop Area

114: device isolation film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor technology, in particular a high voltage transistor constituting a peripheral circuit of a flash memory device or an EEPROM (Electrically Erasable and Programmable Read Only Memory) device that operates at a high voltage. transitor) and a method for producing the same.

When a semiconductor integrated circuit directly controls an external system that uses a high voltage, a high voltage control element is required to directly apply a high voltage of the external system to the integrated circuit. Also, a circuit for which a high breakdown voltage is required may be used for a high voltage. Special elements are required. For example, since a cell of an EEPROM device uses Fowler-Nordheim (FN) tunneling during operation, a high voltage of about 18 to 20 V is required during a program operation or an erase operation. For devices requiring high voltage in operation, it is essential to use high voltage transistors in peripheral circuits.

1 is a cross-sectional view illustrating the structure of a high voltage transistor according to the prior art.

As shown in FIG. 1, in the high voltage transistor according to the related art, an n-drift region 12 is formed in the p-well 11 so as to obtain a high breakdown voltage, and the source and drain regions 12 are formed therein. 19a and 19b) are formed respectively. In addition, a field stop area (FSA) is formed in the field area for separation from adjacent elements. At this time, the leakage current path A between the n-drift region 12 and the field stop region FSA due to the lack of a space margin A between the n-drift region 12 and the field stop region FSA. Is formed.

In FIG. 1, '10' is a substrate, '13' is a LOCAL (LOCal Oxidation of Silicon) field oxide film, '14' is a gate oxide film, '15' is a polysilicon film, '16' is a gate electrode, '17' is a spacer, '19' is a body region, and '20a and 20b' are contacts.

Accordingly, the present invention has been made to solve the above problems of the prior art, it is possible to prevent the leakage current path is formed between the drift region and the field stop region due to lack of space margin between the drift region and the field stop region. It is an object of the present invention to provide a high voltage transistor and a method of manufacturing the same.

According to an aspect of the present invention, a field oxide film formed on a substrate to separate neighboring elements, a gate electrode formed on the substrate between the field oxide film, and both sides of the gate electrode are provided. Source and drain regions formed in the substrate exposed to the substrate, drift regions formed in the substrate to surround the source and drain regions, field stop regions formed in the field regions below the field oxide film, and the fields in the field regions. Provided is a high voltage transistor including an isolation layer formed between a stop region and the drift region.

The device isolation layer is formed in a trench structure.

The device isolation layer is formed of an insulating film.

The device isolation layer has a size of about 0.3 μm to about 1 μm.

According to another aspect of the present invention, there is provided a method of forming a drift region in a predetermined region in a substrate defined by a field region and an active region, and etching the field region to form a first trench. Forming a second trench in each corner portion of the bottom portion of the first trench, filling the second trench to form an isolation layer, and filling the first trench to form a field oxide film. And forming a gate electrode on the substrate between the drift regions, and forming a source and a drain region in the drift region.

The device isolation layer is formed by an oxidation process.

The device isolation film is formed of an HLD film.

The field oxide film is formed by an oxidation process.

And forming a field stop region between the device isolation layers below the field oxide layer after forming the field oxide layer.

Forming a field stop region between the device isolation layers before forming the field oxide layer.

The device isolation layer is formed to about 0.3 ~ 1㎛.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. In addition, parts denoted by the same reference numerals throughout the specification represent the same elements performing the same function.

Example

2 is a cross-sectional view illustrating the structure of a high voltage transistor according to an embodiment of the present invention.

Referring to FIG. 2, a high voltage transistor according to an embodiment of the present invention may provide a trench between a field stop area (FSA) and an n-drift area 112 formed in a field area for separation from adjacent devices. A device isolation film 114 having a structure). The device isolation layer 114 blocks a path of the leakage current in the field region.

At this time, the size L3 of the isolation layer 114 has a size L1 of a field region between adjacent n-drift regions 112 and a size L2 of a field stop region FSA of 1 µm. When formed to have a range of 0.30 ~ 1㎛. For example, when the size L2 of the field stop region FSA is fixed at 1 μm, when the device isolation layer 114 is formed at 0.30 μm, the size L1 of the field region may be reduced from 3 μm to 2 μm. .

Hereinafter, a method of manufacturing a high voltage transistor according to an exemplary embodiment of the present invention shown in FIG. 2 will be described in detail with reference to the process cross-sectional views shown in FIGS. 3A to 3D.

First, as shown in FIG. 3A, a high voltage p-well 111 is formed in the p-substrate 110.

Next, the n-drift region 112 is formed in a predetermined region in the p-well 111. In this case, the region where the n-drift region 112 is formed becomes a region where source and drain regions are formed through a subsequent process.

Subsequently, as shown in FIG. 3B, a region in which the field oxide film is to be formed is separated from the neighboring device by a photo process and an etching process to selectively etch a predetermined depth. As a result, a trench 113 (hereinafter referred to as a first trench) is formed. Accordingly, first trench 113 is formed in p-well 111 between neighboring n-drift regions 112. Here, the neighboring n-drift region 112 refers to a drift region of a neighboring transistor, not a drift region formed in the same transistor.

Subsequently, as shown in FIG. 3C, the bottom corner portion of the first trench 113 is subjected to a photo process and an etching process to form a mini trench (not shown) (hereinafter referred to as a second trench). . In this case, the second trench is formed between the region where the field stop region FSA is to be formed and the n-drift region 112. For example, when the spacing (size of the field region) between neighboring n-drift regions 112 is 3 µm, and the field stop region FSA positioned below the field oxide film is 1 µm, the width of the second trench is 0.30 to It is preferable to form so that it may have a 1 micrometer range.

Subsequently, the device isolation layer 114 is formed by using an oxidation process or a high temperature low pressure dielectric (HLD) film to fill the inside of the second trench. In addition, the device isolation layer 114 may be formed of an insulating material capable of blocking the path of the leakage current.

Subsequently, as shown in FIG. 3D, the field oxide film 115 (oxidation process), the field stop region FSA, the gate electrode 118, the spacer 119, the source and drain regions 120a, 120b), the body region 121 and the contacts 112a and 112b are formed to complete the manufacturing process of the high voltage transistor.

The field stop region FSA may be formed before or after the field oxide film 115 is formed.

Although the technical spirit of the present invention has been described in detail in the preferred embodiments, it should be noted that the above-described embodiments are for the purpose of description and not of limitation. In addition, it will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, according to the present invention, an element isolation film is formed between the drift region and the field stop region of each element in the field region for separating neighboring elements, thereby preventing the leakage current path from the drift region to the field stop region. have.

Claims (11)

A field oxide film formed on the substrate for separating between neighboring devices; A gate electrode formed on the substrate between the field oxide films; Source and drain regions formed in the substrate exposed to both sides of the gate electrode; A drift region formed in the substrate to surround the source and drain regions; A field stop region formed in the field region below the field oxide film; And An isolation layer formed between the field stop region and the drift region in the field region High voltage transistor comprising a. The method of claim 1, The device isolation layer is a high voltage transistor formed in a trench structure. The method according to claim 1 or 2, The device isolation layer is a high voltage transistor formed of an insulating film. The method of claim 3, wherein The device isolation layer has a size of about 0.3 ~ 1㎛ high voltage transistor. Forming a drift region in a predetermined region in the substrate defined by the field region and the active region; Etching the field region to form a first trench; Forming a second trench in each corner portion of the first trench bottom; Filling the second trench to form an isolation layer; Filling the first trenches to form a field oxide film; Forming a gate electrode on the substrate between the drift regions; And Forming a source and a drain region in the drift region Method of manufacturing a high voltage transistor comprising a. The method of claim 5, And the device isolation layer is formed by an oxidation process. The method according to claim 5 or 6, And the device isolation layer is formed of an HLD film. The method of claim 7, wherein And the field oxide film is formed by an oxidation process. The method of claim 8, And forming a field stop region between the device isolation layers below the field oxide layer after forming the field oxide layer. The method of claim 8, And forming a field stop region between the device isolation layers before forming the field oxide layer. The method of claim 8, The device isolation film is a method of manufacturing a high voltage transistor to form about 0.3 ~ 1㎛.

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