KR20070069408A - Option processing device and display device - Google Patents

Abstract

An option processing device and a display device are provided to effectively perform an option function by allowing a timing controller to perform the option function corresponding to option data. An option processing device includes a first unit(110) and a second unit(108). The first unit generates a data signal including an option signal. The second unit performs an option according to the option signal. The option signal includes flag information, which represents whether there is an option to be performed, and option data about an option function. When the flag information has a first level, the option is performed according to the option signal. When the flag information has a second level, the option signal is ignored.

Description

Option processing device and display device

1 is a view showing a conventional liquid crystal display device.

2 is a view showing a liquid crystal display device according to the present invention.

3 is a waveform diagram illustrating a control signal for controlling driving of the liquid crystal display of FIG. 2.

4 illustrates the timing controller of FIG. 2 in detail.

<Brief description of the main parts of the drawing>

102: liquid crystal panel 104: gate driver

106: data driver 108: timing controller

110: system 111: first control signal generator

113: second control signal generator 115: data alignment unit

117: option register

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to liquid crystal display devices, and more particularly, to an optional processing device and a display device that can reduce manufacturing costs.

As the information society develops, the demand for display devices is increasing in various forms. In response to this, various flat panel display devices such as LCD (Liquid Crystal Display Device), PDP (Plasma Display Panel) and ELD (Electro Luminescent Display) have been studied. It is used as a display device.

Among them, liquid crystal displays are the most widely used, replacing CRTs for mobile image display devices because of their excellent image quality, light weight, thinness, and low power consumption. In addition to the mobile use, such as a variety of TV monitors have been developed.

A liquid crystal display device displays an image using the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

The liquid crystal display device includes a liquid crystal panel in which a predetermined image is displayed and a driver for driving the liquid crystal panel.

1 is a view showing a conventional liquid crystal display device.

As shown in FIG. 1, a conventional liquid crystal display device includes a liquid crystal panel 2 for displaying a predetermined image, a gate driver 4 and a data driver 6 for driving the liquid crystal panel 2, and And a timing controller 8 for controlling the gate driver 4 and the data driver 6.

In the liquid crystal panel 2, a plurality of gate lines GL0 to GLn and data lines DL1 to DLm are arranged, and a thin film transistor TFT and a pixel electrode (not shown) are formed at an intersection thereof. The pixel electrode overlaps the plurality of gate lines GL0 to GLn with an insulating layer interposed therebetween to form a storage capacitor Cst.

The gate driver 4 sequentially supplies scan signals to the plurality of gate lines GL0 to GLn according to a gate control signal supplied from the timing controller 8.

The data driver 6 supplies a data voltage to the plurality of data lines DL1 to DLm according to a data control signal supplied from the timing controller 8.

The timing controller 8 generates the gate and data control signals using a vertical / horizontal synchronization signal (Vsync / Hsync), a data enable (DE) signal, and a predetermined clock signal supplied from a system (not shown).

The timing controller 8 performs an option function by an option control signal supplied from the system. An interior of the timing controller 8 includes an option terminal and an option processor for performing the option function.

For example, when the user changes the resolution mode from the outside, the system sends an optional control signal of a high signal to the timing controller 8 so that the timing controller 8 performs an option function of changing the resolution mode. Supply. The option control signal is supplied to a resolution mode change option terminal provided in the timing controller 8.

The option terminal provided in the timing controller 8 causes the timing controller 8 to perform the corresponding option function by an option control signal supplied from the system. Therefore, a plurality of option terminals are provided in the timing controller 8 depending on the type and function of the option.

The system supplies an option data signal to the timing controller 8 to perform an option function. A separate option line (not shown) is provided to supply the option data signal to the timing controller 8. Further, the option data signal supplied through the option line is supplied to the option terminal of the timing controller 8.

As a result, information on the option function supplied from the system is supplied to the option terminal provided inside the timing controller 8. The timing controller 8 performs the option by the option information supplied to the option terminal.

When there is a plurality of option information supplied from the system, the system includes a plurality of option lines to supply the plurality of option data signals corresponding to the plurality of option information to the timing controller 8.

The respective option information is supplied to a plurality of option terminals provided in the timing controller 8 so that the timing controller 8 performs the plurality of options. Thus, the timing controller 8 has a plurality of option terminals to perform a plurality of options.

In order to perform the option function corresponding to the option data, the timing controller 8 has a separate option line for supplying option data from the system to the timing controller 8, and inside the system and the timing controller 8. The included optional terminals shall be provided.

When the separate option line and the plurality of option terminals are provided, a manufacturing process and a manufacturing cost for manufacturing the option line and each option terminal are increased. Additional costs for devices such as the option line and resistance terminals connected to the plurality of option terminals are also increased. In addition, each time an option function is added to the timing controller 8, an option line associated with the option function, an option terminal, a resistance terminal associated with the option terminal, etc. are increased to reduce the effective area of the timing controller 8. do.

SUMMARY OF THE INVENTION An object of the present invention is to provide an option processing device and a display device in which manufacturing cost is reduced and the effective area is increased.

An option processing apparatus according to the present invention for achieving the above object includes a first means for generating a data signal comprising an option signal and a second means for performing an option according to the option signal.

According to an aspect of the present invention, a display device includes: first means for generating a data signal including an option signal, second means for performing an option according to the option signal and controlling the data signal; It includes a display panel for displaying.

Hereinafter, with reference to the accompanying drawings will be described an embodiment according to the present invention.

2 is a view showing a liquid crystal display device according to the present invention.

As shown in FIG. 2, the liquid crystal display according to the present invention includes a liquid crystal panel 102 in which a plurality of gate lines GL0 to GLn and data lines DL1 to DLm are arranged to display a predetermined image. A gate driver 104 for driving a plurality of gate lines GL0 to GLn, a data driver 106 for driving the plurality of data lines DL1 to DLm, the gate driver 104 and a data driver 106. And a system 110 for supplying a predetermined synchronization signal and data to the timing controller 108.

A plurality of gate lines GL0 to GLn and data lines DL1 to DLm defining a pixel region are arranged in the liquid crystal panel 102, and a thin film transistor TFT, which is a switching element, and a pixel electrode are connected to an intersection thereof. have. The pixel electrode overlaps the plurality of gate lines GL0 to GLn with a predetermined insulating layer interposed therebetween to form a storage capacitor Cst.

The thin film transistor TFT is connected to the plurality of gate lines GL0 to GLn and turned on by the gate high voltage VGH supplied to the gate lines GL0 to GLn. It is turned off by the gate low voltage VGL supplied to the gate lines GL0 to GLn.

When the thin film transistor TFT is turned on, a data voltage is supplied to the pixel electrode through the plurality of data lines DL1 to DLm. The data voltage supplied to the pixel electrode is charged in the storage capacitor Cst and maintained for one frame.

The gate driver 104 sequentially supplies a scan signal, that is, a gate high voltage VGH, to the plurality of gate lines GL0 to GLn by the gate control signal supplied from the timing controller 108.

The data driver 106 supplies a data voltage to the plurality of data lines DL1 to DLm by a data control signal supplied from the timing controller 108.

The timing controller 108 uses the vertical / horizontal synchronization signal (Vsync / Hsync), the data enable (DE) signal, and a predetermined clock signal supplied from the system 110 to control the gate control signal and the data control signal. Create The timing controller 108 also aligns and supplies the data signal supplied from the system 110 to the data driver 106.

The timing controller 108 performs an option function by using an option data signal among the data signals supplied from the system 110.

The system 110 supplies a vertical / horizontal synchronization signal (Vsync / Hsync), a data enable (DE) signal, a predetermined clock signal, and a data signal to the timing controller 108. The data signal includes an option data signal.

The liquid crystal display device having such a configuration is driven in units of frames.

3 is a waveform diagram illustrating a control signal for controlling driving of the liquid crystal display of FIG. 2.

As shown in FIGS. 2 and 3, the system 110 transmits a vertical sync signal Vsync, a horizontal sync signal Hsync, and a data enable signal DE to the timing controller 108 as mentioned above. And a predetermined clock signal or the like. In FIG. 3, the horizontal knitting signal Hsync is omitted.

The vertical synchronization signal Vsync indicates a start and end of a frame, that is, a signal indicating one frame. The high section of the vertical synchronization signal Vsync means a section in which a data signal of a frame unit supplied from the system 110 is displayed on the liquid crystal panel 102. In addition, a low section of the vertical synchronization signal Vsync means a section for preparing data corresponding to the next frame.

The data enable signal DE is a signal for controlling the display of a predetermined image on the liquid crystal panel 102. That is, the high section of the data enable signal DE refers to a section in which one line of data signal is displayed on the liquid crystal panel 102.

In addition, a low section of the data enable DE signal refers to a section in which a data signal for the next one line is prepared to be displayed on the liquid crystal panel 102. That is, data is not displayed on the liquid crystal panel 102 in a low section of the data enable DE signal.

As a result, the data enable signal DE is synchronized with the high section of the vertical synchronization signal Vsync to display a predetermined image on the liquid crystal panel 102.

Meanwhile, the low section of the vertical synchronization signal Vsync informs the boundary between the current frame and the next frame. In the low section of the vertical synchronization signal Vsync, the data enable signal DE does not generate a high section.

In this case, a section in which the high section of the first data enable DE of the next frame starts from a falling section falling from high of the last data enable DE of the current frame. The far end is called the blank section.

The blank period also means a boundary between the current frame and the next frame. That is, the blank period means a period in which a data signal corresponding to a current frame is displayed on the liquid crystal panel 102 and then a data signal corresponding to a next frame is prepared before the next frame starts.

The system 110 prepares to supply the data corresponding to the next frame to the timing controller 108 during the blank period. In other words, when an option occurs externally, the system 110 supplies option data corresponding to the option to the timing controller 108 during the blank period.

The timing controller 108 does not display the data signal supplied from the system 110 on the liquid crystal panel 102 during the blank period. Option data corresponding to an option is supplied to the timing controller 108. That is, the timing controller 108 does not display option data supplied during the blank period on the liquid crystal panel 102.

When no option occurs externally, the system 110 supplies flag data of a low signal to the timing controller 108 in synchronization with the start of the blank period. The timing controller 108 recognizes that the option does not occur through the flag data and thus does not perform the option function.

That is, the system 110 supplies flag data and option data indicating the presence or absence of an option to the timing controller 108 during the blank period. The timing controller 108 performs an optional function according to flag data supplied to a start point of the blank period.

When the flag data is a high signal, the timing controller 108 performs an option function corresponding to option data following the flag data.

When the flag data is a low signal, the timing controller 108 ignores option data that follows the flag data. When the flag data is a low signal, the option data may be a data signal indicating a black or white gray level or data corresponding to one of a plurality of options.

During the blank period, when the flag data is a high signal, the timing controller 108 performs an option function corresponding to option data.

Subsequently, when the first data enable DE signal of a next frame is a high period after the blank period passes, the timing controller 108 performs the gate lines GL0 to GLn and the data line DL1. DLm) so that a predetermined image is displayed on the liquid crystal panel 102.

The timing controller 108 ignores option data when the flag data is a low signal during the blank period.

Subsequently, when the first data enable (DE) signal of the next frame is high after the blank period passes, the timing controller 108 displays a predetermined image on the liquid crystal panel 102. The gate lines GL0 to GLn and the data lines DL1 to DLm are controlled.

4 is a view illustrating in detail the timing controller of FIG. 2.

As shown in FIGS. 2 and 4, the timing controller 108 includes first and second control signal generators 111 and 113, a data alignment unit 115, and an option register 117.

The first control signal generator 111 uses the vertical / horizontal synchronization signal (Vsync / Hsync), the data enable (DE) signal, and a predetermined clock signal supplied from the system 110 to perform the gate driver 104. Generates a gate control signal to control

The second control signal generator 111 uses the vertical / horizontal synchronization signal (Vsync / Hsync), the data enable (DE) signal, and a predetermined clock signal supplied from the system 110 to transmit the data driver 106. Generates a data control signal to control

The data alignment unit 115 arranges the data signals of the frame unit supplied from the system 110 in line units and supplies the data signals to the data driver 106.

The option register 117 recognizes flag data of a high signal supplied from the system 110 during a blank period, and recognizes flag data of the high signal supplied after the flag data. option data).

The option register 117 stores option data corresponding to a plurality of option functions to perform an option function corresponding to the option data supplied from the system 110.

For example, when the user changes the resolution mode, the system 110 displays flag data of a high signal and option data related to the resolution mode change during the blank period. The option register 117 is supplied.

The option register 117 recognizes that the option function is performed through flag data of the high signal and performs the option function corresponding to the option data. When the option register 117 changes the resolution mode, the first and second control signal generators 111 and 113 generate a gate control signal and a data control signal corresponding to the changed resolution mode.

As such, the timing controller 108 performs an option function by using flag data and option data supplied from the system 110 during the blank period.

As a result, the timing controller 108 performs an option function corresponding to the option data supplied to the blank section when an option occurs even though no option terminal is provided.

As mentioned above, when an option is generated, the liquid crystal display according to the present invention supplies option data corresponding to the option to a timing controller during a blank period and supplies the option data to the option data. Perform the corresponding optional function.

As a result, the liquid crystal display according to the present invention can reduce the manufacturing cost by not manufacturing an element such as an option terminal, and can increase the effective area of the timing controller because the option terminal is not provided in the timing controller.

As described above, when an option occurs, the liquid crystal display according to the present invention supplies option data to the timing controller during the blank period so that the timing controller corresponds to the option data. It is possible to perform an optional function to reduce the manufacturing cost and increase the effective area by not having a device such as a separate option terminal.

Claims (10)

First means for generating a data signal comprising an option signal; And And second means for performing an option in accordance with said option signal. The method of claim 1, And the option signal includes flag information indicating the presence or absence of an option and option data on an option function. The method of claim 2, And if the flag information has a first level, an option according to the option signal is performed. The method of claim 2, And the option signal is ignored if the flag information has a second level. The method of claim 1, And the option signal is set in a blank section between frames. First means for generating a data signal comprising an option signal; Second means for performing an option according to the option signal and controlling the data signal; And And a display panel for displaying the data signal. The method of claim 6, And the option signal includes flag information indicating the presence or absence of an option and option data on an option function. The method of claim 7, wherein And when the flag information has a first level, an option according to the option signal is performed. The method of claim 7, wherein And when the flag information has a second level, the option signal is ignored. The method of claim 6, And the option signal is set in a blank period between frames.

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