KR20070068760A - Method for managing semiconductor process - Google Patents
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
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- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/70533—Controlling abnormal operating mode, e.g. taking account of waiting time, decision to rework or rework flow
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70608—Monitoring the unpatterned workpiece, e.g. measuring thickness, reflectivity or effects of immersion liquid on resist
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
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- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70625—Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/7065—Defects, e.g. optical inspection of patterned layer for defects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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Abstract
Description
도 1은 종래 기술에 따른 반도체 공정의 관리 방법을 나타내는 흐름도.1 is a flowchart illustrating a method of managing a semiconductor process according to the prior art.
도 2는 본 발명의 실시예에 따른 반도체 공정의 관리 방법을 나타내는 흐름도.2 is a flowchart illustrating a method of managing a semiconductor process according to an embodiment of the present invention.
도 3은 본 발명의 실시예에 따른 반도체 공정의 관리 방법에 있어서 유효산화막 두께(Tox)와 현상후 임계치수(ADI CD)의 스큐차 비교를 나타내는 그래프.3 is a graph showing a skew difference comparison between an effective oxide thickness (Tox) and a post-development critical dimension (ADI CD) in a method of managing a semiconductor process according to an embodiment of the present invention.
본 발명은 반도체 제조 방법에 관한 것으로, 보다 상세하게는 반도체 공정의 관리 방법에 관한 것이다.The present invention relates to a semiconductor manufacturing method, and more particularly, to a method for managing a semiconductor process.
도 1은 종래의 반도체 공정의 관리 방법을 나타내는 흐름도이다.1 is a flowchart illustrating a method of managing a conventional semiconductor process.
도 1을 참조하면, 반도체 웨이퍼 상에 소정의 막질을 증착하는 과정, 가령 산화막(예; PETEOS)을 증착하는 과정(S10)을 거친후 증착된 유효산화막의 두께(Tox)를 계측한다(S20). 유효산화막 두께(Tox)에 대한 계측 결과 설정된 스펙 대비 이상 발생시 증착설비를 정지(S30)하여 필요한 조치를 취한 후 산화막 증착(S10) 과정을 재실시한다. 이와 다르게, 유효산화막 두께(Tox)에 대한 계측 결과 양호한 것으로 판정되면 웨이퍼 상에 감광막을 코팅하고 노광하고 현상하여 특정의 패턴을 형성시키는 포토 공정(S40)을 진행한다. Referring to FIG. 1, after a process of depositing a predetermined film quality on a semiconductor wafer, for example, depositing an oxide film (eg, PETEOS) (S10), the thickness of the effective oxide film deposited is measured (S20). . When the measurement result of the effective oxide film thickness (Tox), if abnormality occurs compared to the set specification, the deposition facility is stopped (S30), and necessary measures are taken, and the oxide film deposition (S10) process is performed again. Alternatively, if it is determined that the measurement result of the effective oxide film thickness Tox is satisfactory, the photo process S40 is performed to coat, expose, and develop a photosensitive film on the wafer to form a specific pattern.
포토 공정에 의해 웨이퍼에 특정의 패턴이 형성되면 오버레이 계측(S50)을 통해 패턴의 오정렬 여부를 검사한다. 오버레이 계측후 현상후 임계치수(ADI CD)를 계측한다(S60). 현상후 임계치수 계측 결과 양호로 판정되지 아니하고 불량으로 판정되면 포토 설비를 정지(S70)하여 필요한 조치를 취한다.When a specific pattern is formed on the wafer by the photo process, the misalignment of the pattern is inspected through the overlay measurement (S50). After the overlay measurement, the post-development critical dimension (ADI CD) is measured (S60). After the development, if the critical dimension measurement result is not determined to be good or is determined to be poor, the photo equipment is stopped (S70) and necessary measures are taken.
이상과 같이, 종래의 반도체 공정의 관리 방법은 증착막질의 두께와 임계치수에 대하여 각각 별개로 관리하는 이원화된 관리 방식이다. 그런데, 증착막 두께 변화에 의하여 포토 공정 진행후 임계치수에 이상이 발생하는 경우가 종종 있어왔다. 이는 바로 임계치수 품질 사고로 이어지게 된다. 따라서, 임계치수 계측시 앞단 공정인 증착 공정의 증착막 두께와 연동된 품질사고를 감지할 수 있는 개선된 반도체 공정의 관리 방법의 대두가 필요한 것이다.As described above, the conventional management method of the semiconductor process is a dual management method for separately managing the thickness and the critical dimension of the deposited film quality. However, there have been cases where abnormality occurs in the critical dimension after the progress of the photo process due to the deposition film thickness change. This leads to critical quality accidents. Therefore, there is a need for an improved method for managing a semiconductor process capable of detecting a quality incident linked to the thickness of a deposition film of a deposition process, which is an earlier step in measuring a critical dimension.
본 발명은 상술한 종래 기술에서의 요구 내지 필요에 부응하기 위한 것으로, 본 발명의 목적은 증착막 두께와 연동된 임계치수 이상 발생 사고를 미연에 감지하여 방지할 수 있는 반도체 공정의 관리 방법을 제공함에 있다.The present invention is to meet the needs and needs of the prior art described above, an object of the present invention is to provide a method for managing a semiconductor process that can detect and prevent the occurrence of a critical dimension abnormality associated with the thickness of the deposited film in advance. have.
상기 목적을 달성하기 위한 본 발명에 따른 반도체 공정의 관리 방법은 종래 이원화된 증착막질의 두께에 임계치수에 대한 관리를 병합하는 것을 특징으로 한다.The method of managing a semiconductor process according to the present invention for achieving the above object is characterized in that the management of the critical dimension to the thickness of the conventional binary deposition film quality.
상기 특징을 구현할 수 있는 본 발명의 실시예에 따른 반도체 공정의 관리 방법은, 웨이퍼에 소정의 막질을 형성하는 제1 공정과 상기 웨이퍼에 소정의 패턴을 형성하는 제2 공정을 관리하는 방법에 있어서, 상기 소정의 막질의 유효 두께와 상기 소정의 패턴의 임계치수의 스큐차를 비교하여 불량으로 판정된 경우 상기 제1 및 제2 공정들을 동시에 인터록시켜 상기 소정의 막질의 유효 두께와 연동된 상기 소정의 패턴의 임계치수의 불량을 억제하는 것을 특징으로 한다.In the method of managing a semiconductor process according to an embodiment of the present invention capable of implementing the above characteristics, a method of managing a first process of forming a predetermined film quality on a wafer and a second process of forming a predetermined pattern on the wafer are provided. And comparing the effective thickness of the predetermined film quality with a skew difference of the critical dimension of the predetermined pattern and interlocking the first and second processes at the same time when determining that the defect is defective, the predetermined thickness interlocked with the effective thickness of the predetermined film quality. The defect of the critical dimension of the pattern is suppressed.
본 실시예에 있어서, 상기 제1 공정은 상기 웨이퍼에 산화막을 증착하는 증착공정을 포함하고, 상기 제2 공정은 상기 산화막 상에 감광막의 코팅과 노광과 현상을 통해 상기 소정의 패턴을 형성하는 포토공정을 포함한다.In the present embodiment, the first process includes a deposition process for depositing an oxide film on the wafer, and the second process is a photo for forming the predetermined pattern by coating, exposing and developing a photosensitive film on the oxide film. Process.
상기 특징을 구현할 수 있는 본 발명의 변형 실시예에 따른 반도체 공정의 관리 방법은, 웨이퍼에 소정의 막질을 증착시키는 증착공정 단계와, 상기 소정의 막질의 유효 두께를 측정하는 계측 단계와, 상기 소정의 막질 상에 소정의 패턴을 형성하는 포토공정 단계와, 상기 소정의 패턴의 임계치수를 측정하는 계측 단계와, 상기 소정의 막질의 유효 두께와 상기 임계치수의 스큐차를 비교하는 단계와, 상기 증착공정 단계와 상기 포토공정 단계를 정지시키는 인터록 단계를 포함하는 것을 특징으로 한다.According to an aspect of the present invention, there is provided a method of managing a semiconductor process, comprising: a deposition step of depositing a predetermined film quality on a wafer; a measurement step of measuring an effective thickness of the predetermined film quality; A photo process step of forming a predetermined pattern on the film quality of the film, a measuring step of measuring a critical dimension of the predetermined pattern, comparing an effective thickness of the predetermined film quality and a skew difference of the critical dimension, and And an interlock step of stopping the deposition process step and the photoprocess step.
본 변형 실시예에 있어서, 상기 소정의 패턴의 오정렬 여부를 측정하는 오버레이 계측 단계를 더 포함한다.In this modified embodiment, the method further includes an overlay measurement step of measuring whether the predetermined pattern is misaligned.
본 변형 실시예에 있어서, 상기 증착공정 단계와 상기 포토공정 단계를 정지시키는 인터록 단계는 상기 증착공정에 사용되는 증착설비와 상기 포토공정에 사용 되는 포토설비를 동시에 정지시키는 단계를 포함한다.In this modified embodiment, the interlock step of stopping the deposition process step and the photoprocess step includes simultaneously stopping the deposition equipment used for the deposition process and the photo equipment used for the photoprocess.
본 발명에 의하면, 종래 이원화된 증착막질의 두께와 현상후 임계치수에 대한 관리를 병합함으로써 증착막질의 두께와 연동된 현상후 임계치수의 품질사고가 발생하면 증착설비와 포토설비에 대하여 두 가지 공정을 동시에 인터록을 발생하게 할 수 있다. According to the present invention, when the quality of the critical dimension after development is linked to the thickness of the deposited film quality by combining the control of the thickness of the conventional binary film thickness and the post-development, the two processes for the deposition equipment and the photo equipment are simultaneously performed. Interlock can be generated.
이하, 본 발명에 따른 반도체 공정의 관리 방법을 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, a method of managing a semiconductor process according to the present invention will be described in detail with reference to the accompanying drawings.
본 발명과 종래 기술과 비교한 이점은 첨부된 도면을 참조한 상세한 설명과 특허청구범위를 통하여 명백하게 될 것이다. 특히, 본 발명에 따른 반도체 소자의 제조 장치는 특허청구범위에서 잘 지적되고 명백하게 청구된다. 그러나, 본 발명에 따른 반도체 소자의 제조 장치는 첨부된 도면과 관련해서 다음의 상세한 설명을 참조함으로써 가장 잘 이해될 수 있다.Advantages over the present invention and prior art will become apparent through the description and claims with reference to the accompanying drawings. In particular, a device for manufacturing a semiconductor device according to the present invention is well pointed out and claimed in the claims. However, the apparatus for manufacturing a semiconductor device according to the present invention can be best understood by referring to the following detailed description with reference to the accompanying drawings.
(실시예)(Example)
도 2는 본 발명의 실시예에 따른 반도체 공정의 관리 방법을 나타내는 흐름도이고, 도 3은 본 발명의 실시예에 따른 반도체 공정의 관리 방법에 있어서 유효산화막 두께(Tox)와 현상후 임계치수(ADI CD)의 스큐차 비교를 나타내는 그래프이다. 본 발명의 실시예에 따른 반도체 공정의 관리 방법은 웨이퍼에 산화막을 형성하는 증착공정과 감광막으로써 패턴을 형성하는 포토공정의 예를 들어 설명하도록 한다. 2 is a flowchart illustrating a method of managing a semiconductor process according to an embodiment of the present invention, and FIG. 3 is an effective oxide film thickness Tox and a post-development critical dimension in a method of managing a semiconductor process according to an embodiment of the present invention. It is a graph which shows the skew difference comparison of CD). A method of managing a semiconductor process according to an embodiment of the present invention will be described by taking an example of a deposition process of forming an oxide film on a wafer and a photo process of forming a pattern using a photosensitive film.
도 2를 참조하면, 반도체 웨이퍼 상에 산화막(예; PETEOS)을 증착하는 과정(S100)을 거친후 증착된 유효산화막의 두께(Tox)를 계측한다(S200). 유효산화막 두께(Tox)에 대한 계측 결과 설정된 스펙 대비 이상 발생시 기존과 같이 증착설비를 정지하여 필요한 조치를 취한 후 산화막 증착공정(S100)을 재실시하는 경우 유효산화막의 두께(Tox)가 변화하여 후속하는 포토공정 진행후 현상후 임계치수(ADI CD)에 이상이 발생할 수 있다. 따라서, 기존과 달리 유효산화막의 두께를 계측(S200)한 후 포토공정(S300)을 바로 진행하다.Referring to FIG. 2, after a process of depositing an oxide film (eg, PETEOS) on a semiconductor wafer (S100), a thickness (Tox) of the deposited effective oxide film is measured (S200). As a result of measuring the effective oxide thickness (Tox), if an abnormality occurs compared to the set specification, the thickness of the effective oxide film (Tox) is changed when the oxide deposition process (S100) is repeated after taking necessary measures by stopping the deposition equipment as before. After developing the photo process, abnormality may occur in the post-development critical dimension (ADI CD). Accordingly, unlike the conventional method, the thickness of the effective oxide film is measured (S200), and the photo process (S300) is immediately performed.
포토공정(S300)으로써 웨이퍼 상에 감광막을 코팅하고 노광하고 현상하여 특정의 패턴을 형성한다. 포토공정(S300)에 의해 웨이퍼에 특정의 패턴이 형성되면 오버레이 계측(S400)을 통해 패턴의 오정렬 여부를 검사한다. 이후에, SEM 과 같은 설비를 이용하여 현상후 임계치수(ADI CD)를 계측한다(S500).In the photo process S300, a photosensitive film is coated on the wafer, exposed to light, and developed to form a specific pattern. When a specific pattern is formed on the wafer by the photo process S300, the pattern is inspected for misalignment through the overlay measurement S400. Thereafter, a post-development critical dimension (ADI CD) is measured using a facility such as SEM (S500).
도 3을 참조하면, 유효산화막 두께(Tox)와 현상후 임계치수(ADI CD)의 스큐(skew)차를 비교한다(S600). 유효산화막 두께(Tox)와 현상후 임계치수(ADI CD)의 스큐(skew)차를 비교하여 불량으로 판정되면 증착설비와 포토설비를 동시에 정지(S700)시켜 두개의 공정이 동시에 인터록이 되도록 한다.Referring to FIG. 3, a skew difference between the effective oxide thickness Tox and the post-development critical dimension ADI CD is compared (S600). When it is determined that the difference between the effective oxide thickness Tox and the skew difference between the post-development critical dimensions (ADI CD) is determined to be defective, the deposition apparatus and the photo apparatus are simultaneously stopped (S700) so that the two processes are interlocked at the same time.
이와 같이, 유효산화막 두께(Tox)와 현상후 임계치수(ADI CD)를 병합하여 스큐차를 비교하게 되면 유효산화막 두께(Tox)의 변화에 의해 포토공정 진행후 현상후 임계치수(ADI CD) 이상이 발생하여 임계치수 품질사고가 일어나는 일이 미연에 감지된다. 즉, 유효산화막 두께(Tox)와 연동된 임계치수 품질사고가 억제되는 것이다.As such, when comparing the skew difference by merging the effective oxide thickness (Tox) and the post-development critical dimension (ADI CD), the change in the effective oxide film thickness (Tox) is more than the post-development threshold (ADI CD) after the photo process. The occurrence of this critical quality incident is detected beforehand. That is, the critical dimension quality incident linked with the effective oxide film thickness Tox is suppressed.
이상의 상세한 설명은 본 발명을 예시하는 것이다. 또한 전술한 내용은 본 발명의 바람직한 실시 형태를 나타내고 설명하는 것에 불과하며, 본 발명은 다양한 다른 조합, 변경 및 환경에서 사용할 수 있다. 그리고, 본 명세서에 개시된 발명의 개념의 범위, 저술한 개시 내용과 균등한 범위 및/또는 당업계의 기술 또는 지식의 범위 내에서 변경 또는 수정이 가능하다. 전술한 실시예들은 본 발명을 실시하는데 있어 최선의 상태를 설명하기 위한 것이며, 본 발명과 같은 다른 발명을 이용하는데 당업계에 알려진 다른 상태로의 실시, 그리고 발명의 구체적인 적용 분야 및 용도에서 요구되는 다양한 변경도 가능하다. 따라서, 이상의 발명의 상세한 설명은 개시된 실시 상태로 본 발명을 제한하려는 의도가 아니다. 또한 첨부된 청구범위는 다른 실시 상태도 포함하는 것으로 해석되어야 한다.The foregoing detailed description illustrates the present invention. In addition, the foregoing description merely shows and describes preferred embodiments of the present invention, and the present invention can be used in various other combinations, modifications, and environments. And, it is possible to change or modify within the scope of the concept of the invention disclosed in this specification, the scope equivalent to the written description, and / or the skill or knowledge in the art. The above-described embodiments are for explaining the best state in carrying out the present invention, the use of other inventions such as the present invention in other state known in the art, and the specific fields of application and uses of the present invention. Various changes are also possible. Accordingly, the detailed description of the invention is not intended to limit the invention to the disclosed embodiments. Also, the appended claims should be construed to include other embodiments.
이상에서 상세히 설명한 바와 같이, 본 발명에 의하면, 종래 이원화된 증착막질의 두께와 현상후 임계치수에 대한 관리를 병합함으로써 증착막질의 두께와 연동된 현상후 임계치수의 품질사고가 발생하면 증착설비와 포토설비에 대하여 두 가지 공정을 동시에 인터록을 발생하게 할 수 있다. 이에 따라, 공정 품질사고를 미연에 감지하고 억제시켜 생산성과 수율을 향상시킬 수 있는 효과가 있다.As described above in detail, according to the present invention, if the quality of the critical dimension after development associated with the thickness of the deposited film quality by combining the control of the thickness and the post-development critical dimension of the conventional binary deposition film quality deposition equipment and photo equipment For both processes, the interlock can be generated at the same time. Accordingly, there is an effect that can improve the productivity and yield by detecting and suppressing the process quality accident in advance.
Claims (5)
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