KR20090044563A - Standard reticle and method for inspecting defect using the same - Google Patents

Standard reticle and method for inspecting defect using the same Download PDF

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Publication number
KR20090044563A
KR20090044563A KR1020070110703A KR20070110703A KR20090044563A KR 20090044563 A KR20090044563 A KR 20090044563A KR 1020070110703 A KR1020070110703 A KR 1020070110703A KR 20070110703 A KR20070110703 A KR 20070110703A KR 20090044563 A KR20090044563 A KR 20090044563A
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KR
South Korea
Prior art keywords
pattern
defect
defects
standard reticle
space
Prior art date
Application number
KR1020070110703A
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Korean (ko)
Inventor
선규태
Original Assignee
주식회사 하이닉스반도체
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Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020070110703A priority Critical patent/KR20090044563A/en
Publication of KR20090044563A publication Critical patent/KR20090044563A/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/44Testing or measuring features, e.g. grid patterns, focus monitors, sawtooth scales or notched scales
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/82Auxiliary processes, e.g. cleaning or inspecting
    • G03F1/84Inspecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

According to the present invention, after a mask process is performed on a thin film deposited wafer using a line & space pattern type standard reticle in which line patterns of various sizes are implemented, various line patterns and spaces are used. Defects can be detected by using a defect detection device, and various defects can be detected by inspection using a CD SEM (Critical Dimension Scanning Electron Microscope) device. Disclosed is a technique capable of determining whether a defect is caused by a defect or a pattern size.

Standard Reticle, Defects, Pattern Size, Process, Pattern Group

Description

Standard reticle and method for inspecting defect using the same}

The present invention relates to a standard reticle, and more particularly, to mask a thin film deposited wafer using a line pattern and a space type standard reticle in which line patterns of various sizes are implemented. Defects can be detected for various line patterns and spaces using a defect detection equipment, and various defects can be detected by inspection using a CD (Critical Dimension Scanning Electron Microscope) equipment. The present invention relates to a standard reticle capable of identifying whether the detected defects are defects by a process or a pattern size, and a defect detection method using the same.

Among the items monitored in the semiconductor device manufacturing process, items related to defects have an increasing importance as the degree of integration of semiconductor devices increases and a field size increases. Here, since defects are directly related to the yield of semiconductor devices, the importance of monitoring and managing defects is becoming more important.

The general defect monitoring method monitors defects by using a defect inspection system on various equipment and real wafers used in a semiconductor device manufacturing process.

The method of monitoring defects occurring in various equipments used in the semiconductor manufacturing process is to check the frequency of defects by using a bare wafer to monitor the equipment periodically or by a defect inspection system before each manufacturing process. . However, because these methods are only capable of quantitative analysis, it is difficult to establish the criteria for periodic maintenance and maintenance of the equipment and thus cannot perform optimized equipment management.

In addition, in the method for monitoring defects occurring during the process of manufacturing a predetermined semiconductor device on an actual wafer, a defect inspection system is monitored at each process step to verify a frequency of occurrence of defects in each process step. However, this method is capable of quantitative and qualitative analysis, but it is difficult to classify defects that directly affect the yield of semiconductor devices.

In addition, masking is performed using a reticle applied to each semiconductor device and defects are detected. Since the defects for different pattern sizes implemented using the same photoresist and the same exposure equipment may be different, Various experiments are carried out, such as the application of other photosensitizers to improve the defects in the pattern. However, this is a problem that does not grasp the defect according to the pattern size for the same photoresist and the same exposure equipment.

SUMMARY OF THE INVENTION An object of the present invention is to provide a standard reticle capable of determining whether detected defects are defects by a process or a pattern size, and a defect detection method using the same.

Standard reticle according to the present invention

A plurality of first pattern groups,

Each of the first pattern groups may include a plurality of second pattern groups each having patterns corresponding to a plurality of generations of semiconductor devices.

In addition, the second pattern group is disposed in the vertical direction,

Each of the first pattern group is configured the same,

Each of the first pattern groups may be implemented with a line pattern and a space.

The line pattern and the space are arranged in the left and right directions of each of the first pattern group,

The line pattern and space are implemented with the critical line pattern and space of each generation,

The line pattern and the space is characterized by having a ratio of 1: 1.

On the other hand, the defect detection method using a standard reticle according to the present invention

A photoresist layer on the wafer using a standard reticle including a plurality of first pattern groups, each of the first pattern groups including a plurality of second pattern groups each embodied in patterns corresponding to a plurality of generations of semiconductor devices. Applying and performing an exposure and development process;

Detecting defects using defect detection equipment and storing defect data; And

And analyzing the defect data to determine whether the defect is caused by a process or a pattern size.

The determining may include determining that the defect is caused by a process when a defect occurs in all of the second pattern groups, and determining that the defect is caused by a pattern size when a defect occurs in a specific second pattern group. do.

According to the present invention, after a mask process is performed on a thin film deposited wafer using a line & space pattern type standard reticle in which line patterns of various sizes are implemented, various line patterns and spaces are used. Defects can be detected using a defect detection device, and various defects can be detected by inspection using a CD SEM (Critical Dimension Scanning Electron Microscope) device. There is an effect of determining whether the defect is a defect or a pattern size.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the spirit of the present invention is thoroughly and completely disclosed, and the spirit of the present invention to those skilled in the art will be fully delivered. Also, like reference numerals denote like elements throughout the specification.

1 is a plan view showing a line pattern and a space type standard reticle 10 according to the present invention.

Referring to FIG. 1, the standard reticle 10 includes 16 first pattern groups 12, and the first pattern groups 12 all have the same configuration. Organize in groups

FIG. 2 is a plan view showing in detail each first pattern group 12 of the standard reticle 10 shown in FIG. 1.

Referring to FIG. 2, each first pattern group 12 divides the patterns corresponding to the second generation semiconductor devices into the second pattern group 20 and the third pattern group 30 in the vertical direction. Here, the second pattern group 20 corresponding to the first generation semiconductor device of each first pattern group 12 may be implemented with patterns having sizes of 44 nm, 49 nm, and 54 nm, and correspond to the second generation semiconductor device. For example, the third pattern group 30 is implemented with patterns having sizes of 52 nm, 57 nm, and 62 nm, but is not limited thereto.

3 is a plan view illustrating in detail the second pattern group 20 illustrated in FIG. 2.

Referring to FIG. 3, the second pattern group 20 is implemented in a layout of a critical line pattern 22 and a space 24 corresponding to the same semiconductor device generation in the left and right directions.

In the above-described embodiment, a case in which all patterns in the standard reticle 10 are implemented as line patterns and spaces is described as an example, but is not limited thereto. In addition, it is preferable that the line pattern and the space of all patterns have a ratio of 1: 1.

When the photosensitive film is coated on the wafer using the standard reticle 10 according to the present invention as described above, the exposure and development processes are performed, and the defect detection equipment detects the defect data, the defect data appear in groups. do.

Therefore, by analyzing the defects shown in each group, it is possible to distinguish whether the defects are due to process or pattern size. That is, if it is due to the process, the defect occurs in all groups, and if it is due to the pattern size, the defect occurs only in a specific group.

As a result, by using the line pattern and the space type standard reticle 10 according to the present invention, it is possible to grasp the appearance of defects according to the pattern size at a time, and the cause thereof.

As described above, the present invention performs a mask process on a thin film deposited wafer using a line pattern and a space type standard reticle in which line patterns of various sizes are implemented. Defects can be detected using a defect detection device for line patterns and spaces, and various defects can be detected by inspection using a CD SEM (Scanning Electron Microscope) device. Disclosed is a technique for identifying whether a defect is caused by a process or a defect due to a pattern size.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

1 is a plan view showing a line pattern and space type standard reticle according to the present invention.

FIG. 2 is a plan view showing in detail each first pattern group 12 of the standard reticle shown in FIG.

3 is a plan view illustrating in detail the second pattern group 20 illustrated in FIG. 2.

<Description of the symbols for the main parts of the drawings>

10: standard reticle

12: first pattern group

20, 30: second pattern group

22: line pattern

24: space

Claims (9)

A plurality of first pattern groups, Wherein each of the first pattern groups includes a plurality of second pattern groups each formed of patterns corresponding to a plurality of generations of semiconductor devices. The method of claim 1, Each of the second pattern group is disposed in the vertical direction, the standard reticle. The method of claim 1, The standard reticle is characterized in that each of the first pattern group is configured the same. The method of claim 1, And wherein each of the first pattern groups is implemented with a line pattern and a space. The method of claim 4, wherein The line pattern and the space is a standard reticle, characterized in that arranged in the left and right directions of each of the first pattern group. The method of claim 4, wherein The line pattern and the space is a standard reticle, characterized in that implemented by the critical line pattern and space of each generation. The method of claim 4, wherein And the line pattern and space have a ratio of 1: 1. Applying a photoresist film on top of the wafer using the standard reticle of claim 1, and performing an exposure and development process; Detecting defects using defect detection equipment and storing defect data; And And analyzing the defect data to determine whether the defect is caused by a process or a pattern size. The method of claim 8, The determining may include determining that the defect is caused by a process when a defect occurs in all of the second pattern groups, and determining that the defect is caused by a pattern size when a defect occurs in a specific second pattern group. Defect detection method using reticle.
KR1020070110703A 2007-10-31 2007-10-31 Standard reticle and method for inspecting defect using the same KR20090044563A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10541178B2 (en) 2017-01-05 2020-01-21 Samsung Electronics Co., Ltd. Method and device for evaluating quality of thin film layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10541178B2 (en) 2017-01-05 2020-01-21 Samsung Electronics Co., Ltd. Method and device for evaluating quality of thin film layer

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