KR20070052043A - Bga type semiconductor chip package having sectionally solder ball with in plastic core - Google Patents

Bga type semiconductor chip package having sectionally solder ball with in plastic core Download PDF

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Publication number
KR20070052043A
KR20070052043A KR1020050109595A KR20050109595A KR20070052043A KR 20070052043 A KR20070052043 A KR 20070052043A KR 1020050109595 A KR1020050109595 A KR 1020050109595A KR 20050109595 A KR20050109595 A KR 20050109595A KR 20070052043 A KR20070052043 A KR 20070052043A
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South Korea
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semiconductor chip
type semiconductor
chip package
bga type
plastic core
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KR1020050109595A
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Korean (ko)
Inventor
이정웅
김희석
김상준
신화수
이준영
김중현
김민정
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삼성전자주식회사
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Priority to KR1020050109595A priority Critical patent/KR20070052043A/en
Publication of KR20070052043A publication Critical patent/KR20070052043A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

본 발명은 플라스틱 코어 내장 솔더 볼을 부분적으로 갖는 BGA형 반도체 칩 패키지에 관한 것이다. 일반적인 솔더 볼이 기판 하면에 면 배열된 종래의 BGA형 반도체 칩 패키지는 배선 기판에 실장시 열팽창 계수의 차이로 인해 솔더 조인트의 신뢰성이 저하된다. 이와 같은 문제점을 해결하기 위하여, 본 발명은 응력이 집중되는 패키지 외곽 부분에 플라스틱 코어가 내장된 솔더 볼이 형성되고, 그 외의 영역에는 일반적인 솔더 볼이 형성된 BGA형 반도체 칩 패키지를 제공한다. 본 발명에 따르면, 응력 집중 부위에 내열성과 탄성을 갖는 플라스틱 코어가 형성되어, 응력을 흡수함으로써, 크랙이나 계면박리 등의 불량 발생이 방지되어 저비용으로 솔더 조인트의 신뢰성이 향상된 BGA형 반도체 칩 패키지의 구현이 가능하다.The present invention relates to a BGA type semiconductor chip package partially having a plastic core embedded solder ball. In the conventional BGA type semiconductor chip package in which a general solder ball is arranged on the bottom surface of a substrate, the reliability of the solder joint is degraded due to the difference in thermal expansion coefficient when it is mounted on the wiring substrate. In order to solve such a problem, the present invention provides a BGA type semiconductor chip package in which a solder ball in which a plastic core is embedded is formed in an outer portion of a package where stress is concentrated, and in which other solder balls are formed. According to the present invention, a plastic core having heat resistance and elasticity is formed at a stress concentration site and absorbs stress, thereby preventing defects such as cracking and interfacial peeling and improving reliability of a solder joint at low cost. Implementation is possible.

BGA형 반도체 칩 패키지, 솔더 조인트(solder joint), 응력, 솔더 볼, 플라스틱 코어(plastic core) BGA type semiconductor chip package, solder joint, stress, solder ball, plastic core

Description

플라스틱 코어 내장 솔더 볼을 부분적으로 갖는 BGA형 반도체 칩 패키지{BGA type semiconductor chip package having sectionally solder ball with in plastic core}BGA type semiconductor chip package having sectionally solder ball with in plastic core}

도 1은 종래 기술에 따른 BGA형 반도체 칩 패키지를 나타내는 개략적인 단면도.1 is a schematic cross-sectional view showing a BGA type semiconductor chip package according to the prior art.

도 2는 도 1의 솔더 볼에 가해지는 응력에 대한 시뮬레이션 결과를 보여주는 사진.Figure 2 is a photograph showing the simulation results for the stress applied to the solder ball of Figure 1;

도 3은 본 발명에 따른 BGA형 반도체 칩 패키지가 배선 기판에 실장된 상태를 나타낸 단면도.3 is a cross-sectional view showing a state in which a BGA type semiconductor chip package according to the present invention is mounted on a wiring board.

도 4는 본 발명에 따른 BGA형 반도체 칩 패키지의 일반적인 솔더 볼을 나타내는 사진.Figure 4 is a photograph showing a typical solder ball of the BGA type semiconductor chip package according to the present invention.

도 5는 본 발명에 따른 BGA형 반도체 칩 패키지의 플라스틱 코어 내장 솔더 볼을 나타내는 사진.5 is a photograph showing a solder ball embedded in a plastic core of a BGA type semiconductor chip package according to the present invention.

도 6은 도 3의 Ⅰ-Ⅰ선을 따라 절단한 부분 단면도.6 is a partial cross-sectional view taken along the line II of FIG. 3.

* 도면의 주요 부분에 대한 부호 설명 *Explanation of symbols on the main parts of the drawings

10,210; BGA형 반도체 칩 패키지(BGA type semiconductor chip package)10,210; BGA type semiconductor chip package

11,211; 볼 랜드(ball land)11,211; Ball land

12,212; 반도체 칩(semiconductor chip)12,212; Semiconductor chip

13,213; 기판(substrate)13,213; Substrate

14,214; 몰딩 수지(molding resin)14,214; Molding resin

20,220; 솔더 볼(solder ball)20,220; Solder ball

21; 플라스틱 코어(plastic core) 내장 솔더 볼21; Solder Balls with Plastic Core

22; 일반적인 솔더 볼(normal solder ball)22; Normal solder ball

23; 플라스틱 코어23; Plastic core

30,230; 배선 기판(circuit board)30,230; Circuit board

31,231; 볼 패드(ball pad)31,231; Ball pad

본 발명은 반도체 칩 패키지에 관한 것으로서, 더욱 상세하게는 배선 기판과 반도체 패키지를 전기적으로 접속시키는 외부접속단자로서 솔더 볼을 갖는 BGA형 반도체 칩 패키지에 관한 것이다.The present invention relates to a semiconductor chip package, and more particularly, to a BGA type semiconductor chip package having solder balls as an external connection terminal for electrically connecting a wiring board and a semiconductor package.

최근 전자산업은 더욱 경량화, 소형화, 고속화, 다기능화되고, 높은 신뢰성을 갖는 제품을 생산하는 추세이다. 이와 같은 추세에 대응하기 위한 패키지 조립(package assembly) 기술로서, 외부접속단자가 면 배열된 BGA형 반도체 칩 패키지가 잘 알려져 있다. BGA형 반도체 칩 패키지는 통상적인 패키지에 비하여, 배선 기판에 대한 실장 면적을 축소시킬 수 있고, 입출력 핀 수가 많으며, 전기적 특성이 우수하다는 장점들을 가진다.In recent years, the electronics industry has tended to produce products that are lighter, smaller, faster, and more versatile, and have higher reliability. As a package assembly technology to cope with such a trend, a BGA type semiconductor chip package in which external connection terminals are arranged is well known. The BGA type semiconductor chip package has advantages in that the mounting area for the wiring board can be reduced, the number of input / output pins are high, and the electrical characteristics are excellent, compared with the conventional package.

도 1은 종래 기술에 따른 BGA형 반도체 칩 패키지를 나타내는 개략적인 단면도이다.1 is a schematic cross-sectional view showing a BGA type semiconductor chip package according to the prior art.

도 1을 참조하면, 종래의 BGA형 반도체 칩 패키지(210)는 반도체 칩(212)이 실장된 기판(213)의 일면에 외부접속단자로서 솔더 볼(220)이 면 배열되어 있고, 그 반대면이 EMC 등의 몰딩 수지(214)로 몰딩된 구조이다. 솔더 볼(220)이 배선 기판(230)에 접합되어 패키지 실장이 이루어진다.Referring to FIG. 1, in the conventional BGA type semiconductor chip package 210, the solder balls 220 are arranged on one surface of the substrate 213 on which the semiconductor chip 212 is mounted, and the solder balls 220 are arranged on the opposite side thereof, and the opposite surface thereof. This structure is molded with molding resin 214 such as EMC. The solder balls 220 are bonded to the wiring board 230 to package the package.

이와 같은 BGA형 반도체 칩 패키지(210)는 솔더 볼(220)에 의해 배선 기판(230)과 물리적인 결합 및 전기적인 결합이 이루어진다. 따라서 솔더 볼(220) 접합 부분에 대한 솔더 조인트(solder joint) 신뢰성은 중요하다.The BGA type semiconductor chip package 210 is physically and electrically coupled with the wiring board 230 by the solder balls 220. Therefore, solder joint reliability of the solder ball 220 joint is important.

그런데, BGA형 반도체 칩 패키지(210)의 기판(213)과 몰딩 수지(214), 솔더 볼(220) 및 솔더 볼 접합부(211,231)는 서로 다른 열팽창 계수를 가진다. 이에 따라, 리플로우(reflow) 공정이나 테스트 공정을 진행하는 과정, 또는 BGA형 반도체 칩 패키지(210)가 동작하는 과정에서 열에 의한 응력 집중으로 인하여 크랙(crack)이나 계면박리(delamination) 등이 발생되어 솔더 조인트 신뢰성이 저하된다. 따라서, 응력 집중에 대한 대응 방안이 요구된다.However, the substrate 213, the molding resin 214, the solder balls 220, and the solder ball joints 211 and 231 of the BGA type semiconductor chip package 210 have different thermal expansion coefficients. Accordingly, cracks or delamination may occur due to stress concentration due to heat during a reflow process or a test process or during operation of the BGA type semiconductor chip package 210. This reduces the solder joint reliability. Therefore, a countermeasure against stress concentration is required.

도 2는 도 1의 솔더 볼에 가해지는 응력에 대한 시뮬레이션 결과를 보여주는 사진이다. 단, 푸른색으로 갈수록 응력의 강도가 약해지고, 붉은색으로 갈수록 응력의 강도가 커지는 것을 나타낸다. 응력이 집중되는 솔더 볼(220)에는 붉은색 별 표시를 했다. 2 is a photograph showing a simulation result of the stress applied to the solder ball of FIG. However, the intensity of the stress decreases as the color becomes blue, and the intensity of the stress increases as the color becomes red. The solder ball 220 where the stress is concentrated is marked with a red star.

본 출원인이 실시한 시뮬레이션 결과에 따르면, 도 2에서와 같이, 패키지 외곽 부분(A)에 위치한 솔더 볼(220)의 위쪽 부분이 연두색과 붉은색을 띠어 응력이 집중되는 것으로 나타났다. 특히, BGA형 반도체 칩 패키지에 있어서 응력의 집중이 특히 모서리 부분에서 집중됨을 알 수 있었다. According to a simulation result performed by the applicant, as shown in FIG. 2, the upper portion of the solder ball 220 positioned in the package outer portion A has a light green color and a red color, and stress is concentrated. In particular, in the BGA type semiconductor chip package, it can be seen that the concentration of stress is particularly concentrated at the corners.

따라서, 본 발명의 목적은 BGA형 반도체 칩 패키지의 응력이 집중되는 부분에서 솔더 조인트의 신뢰성이 향상되고, 저비용으로 실현 가능한 BGA형 반도체 칩 패키지를 제공하는 것이다.Accordingly, an object of the present invention is to provide a BGA type semiconductor chip package which can improve the reliability of the solder joint at a portion where the stress of the BGA type semiconductor chip package is concentrated and can be realized at low cost.

이와 같은 목적을 달성하기 위하여, 본 발명은 반도체 칩과 그 반도체 칩이 상부면에 실장된 기판 및 그 기판의 하부면에 면 배열된 복수 개의 솔더 볼을 포함하되, 기판 외곽 부분에 플라스틱 코어가 내장된 솔더 볼이 형성된 것을 특징으로 하는 BGA형 반도체 칩 패키지를 제공한다.In order to achieve the above object, the present invention includes a semiconductor chip, a substrate on which the semiconductor chip is mounted on an upper surface, and a plurality of solder balls arranged on the lower surface of the substrate, wherein a plastic core is embedded in the outer portion of the substrate. It provides a BGA type semiconductor chip package, characterized in that the solder ball is formed.

본 발명에 따른 BGA형 반도체 칩 패키지에 있어서, 플라스틱 코어가 내장된 솔더 볼은 기판의 모서리 부분에 형성된 것이 바람직하다.In the BGA type semiconductor chip package according to the present invention, the solder ball in which the plastic core is embedded is preferably formed at the edge of the substrate.

본 발명에 따른 BGA형 반도체 칩 패키지에 있어서, 플라스틱 코어는 열경화성 수지로 형성된 것이 바람직하다.In the BGA type semiconductor chip package according to the present invention, the plastic core is preferably formed of a thermosetting resin.

이하, 첨부 도면을 참조하여 본 발명의 바람직한 실시예를 보다 상세하게 설명하도록 한다. 첨부 도면에 있어서 일부 구성요소는 도면의 명확한 이해를 돕기 위해 다소 과장되거나 개략적으로 도시되거나 또는 생략되었으며, 각 구성요소의 실제 크기가 전적으로 반영된 것은 아니다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the accompanying drawings, some of the components are somewhat exaggerated, schematically illustrated or omitted to facilitate a clear understanding of the drawings, and the actual size of each component is not entirely reflected.

실시예Example

도 3은 본 발명에 따른 BGA형 반도체 칩 패키지가 배선 기판에 실장된 상태를 나타낸 단면도이다.3 is a cross-sectional view illustrating a state in which a BGA type semiconductor chip package according to the present invention is mounted on a wiring board.

도 3을 참조하면, 본 실시예의 BGA형 반도체 칩 패키지(10)는 기판(13)의 상부면에 반도체 칩(12)이 실장되고, 몰딩 수지(14)로 상부면이 몰딩된 구조이다. 기판(13)의 하부면의 볼 랜드(11)에는 일반적인 솔더 볼(22)과 플라스틱 코어(23)로 이루어진 복수 개의 솔더 볼(20)이 면 배열된 구조이다. 이 솔더 볼(20)이 배선 기판(30)의 볼 패드(31)에 접합되어 패키지 실장이 이루어진다.Referring to FIG. 3, the BGA type semiconductor chip package 10 according to the present exemplary embodiment has a structure in which a semiconductor chip 12 is mounted on an upper surface of a substrate 13 and an upper surface of the BGA semiconductor chip package 10 is molded with a molding resin 14. The ball land 11 of the lower surface of the substrate 13 has a structure in which a plurality of solder balls 20 made of a general solder ball 22 and a plastic core 23 are arranged in a plane. This solder ball 20 is bonded to the ball pad 31 of the wiring board 30 to perform package mounting.

도 4와 도 5는 본 발명에 따른 BGA형 반도체 칩 패키지의 일반적인 솔더 볼과 플라스틱 코어 내장 솔더 볼을 나타내는 사진이다. 도 6은 도 3의 Ⅰ-Ⅰ선을 따라 절단한 부분 단면도이다.4 and 5 are photographs showing a general solder ball and a plastic core embedded solder ball of the BGA type semiconductor chip package according to the present invention. 6 is a partial cross-sectional view taken along the line II of FIG. 3.

도 4 내지 도 6을 참조하면, 솔더 볼(20) 중에서 일반적인 솔더 볼(22)은 주석, 납 합금(SnPb) 또는 주석, 은, 구리 합금(SnAgCu)의 단일체로 형성된다. 플라스틱 코어(23)가 내장된 솔더 볼(21)은 플라스틱 코어(23) 상에 솔더층이 형성된 구조이다. 플라스틱 코어(23)와 솔더층의 접합력 향상을 위하여 니켈(Ni;24)층과 구리(Cu;25)층이 사이에 개재될 수 있다.4 to 6, the general solder balls 22 of the solder balls 20 are formed of a single body of tin, lead alloy (SnPb), or tin, silver, and copper alloy (SnAgCu). The solder ball 21 in which the plastic core 23 is embedded has a structure in which a solder layer is formed on the plastic core 23. In order to improve bonding strength between the plastic core 23 and the solder layer, a nickel (Ni; 24) layer and a copper (Cu; 25) layer may be interposed therebetween.

플라스틱 코어(23)는 내열성과 탄성을 가진다. 플라스틱 코어(23)로서는 열을 가하여 경화시켜 성형하면 다시 열을 가해도 형태가 변하지 않는 열경화성 수지 로 구성되는 것이 바람직하다. 열경화성 수지는 저분자 혼합물에서 점성을 가진 액체 상태의 플라스틱에 열을 가하면 가교가 진행되면서 입체적인 그물 모양 구조를 형성하게 되어, 응력에 대한 저항력이 우수하고 큰 응력을 가해도 변형되지 않는 성질을 갖게 된다. The plastic core 23 is heat resistant and elastic. It is preferable that the plastic core 23 is made of a thermosetting resin which does not change in shape even when heat is applied and cured by applying heat. When the thermosetting resin is heated to a viscous liquid plastic in a low molecular weight mixture, the crosslinking proceeds to form a three-dimensional network structure, which is excellent in resistance to stress and does not deform even when a large stress is applied.

플라스틱 코어(23)로서 사용될 수 있는 열경화성 수지로서는, 예컨대, 폴리이미드(PI; Polyimide), 폴리에스테르(PE; polyester), 폴리아미드(PA; polyamide)등이 사용될 수 있다. 내열성 실리콘 고무(heat resistant silicon rubber)와 같은 합성 수지의 사용도 가능하다. As the thermosetting resin that can be used as the plastic core 23, for example, polyimide (PI), polyester (PE; polyester), polyamide (PA; polyamide) and the like can be used. The use of synthetic resins such as heat resistant silicon rubber is also possible.

도 6에 도시된 바와 같이, 플라스틱 코어(23)가 내장된 솔더 볼(21)은 기판(13)의 하부면 외곽 부분에 형성된다. 특히, 플라스틱 코어 내장 솔더 볼(21)은 기판(13) 하부면에서 응력이 집중되는 모서리 부분에 형성된다. 솔더 볼(20) 중에서 일반적인 솔더 볼(22)은 플라스틱 코어(23)의 내측, 기판(13) 하부면의 모서리 부분을 제외한 영역에 형성된다.As shown in FIG. 6, the solder ball 21 having the plastic core 23 embedded therein is formed at an outer portion of the lower surface of the substrate 13. In particular, the plastic core embedded solder ball 21 is formed at a corner portion where stress is concentrated on the lower surface of the substrate 13. Among the solder balls 20, a general solder ball 22 is formed in an area of the plastic core 23 except for corner portions of the lower surface of the substrate 13.

플라스틱 코어 내장 솔더 볼(21)을 기판(13) 하부면에 전체적으로 면 배열하여 응력에 더욱 강하게 할 수 있다. 그러나, 플라스틱 코어 내장 솔더 볼(21)은 고가이다. 그리고 플라스틱 코어 내장 솔더 볼(21)은 일반적인 솔더 볼(22)의 제조 공정에 비하여 복잡하다. 따라서 응력이 집중되는 기판(13) 하부면의 외곽 부분, 특히 모서리 부분에만 플라스틱 코어 내장 솔더 볼(21)이 형성되는 것이 바람직하다. 고가이며 제조 공정이 복잡한 플라스틱 코어 내장 솔더 볼(21)을 응력이 집중되는 부분에만 설치함으로서 저렴한 비용으로 큰 효과를 얻을 수 있다.The plastic core embedded solder balls 21 may be arranged on the lower surface of the substrate 13 to be more resistant to stress. However, the plastic core embedded solder ball 21 is expensive. And the plastic core embedded solder ball 21 is more complicated than the manufacturing process of the general solder ball 22. Therefore, it is preferable that the plastic core embedded solder ball 21 is formed only at the outer portion of the lower surface of the substrate 13 where stress is concentrated, particularly at the corner portion. An expensive and complicated manufacturing process can be achieved by installing the plastic core embedded solder ball 21 only in the areas where stress is concentrated.

이상과 같은 본 발명에 의한 BGA형 반도체 칩 패키지에 따르면, BGA형 반도체 칩 패키지의 일면의 외곽에 내열성과 탄성을 갖는 플라스틱 코어가 내장된 솔더 볼이 형성되고, 그 이외의 영역에는 일반적인 솔더 볼이 형성된다. 이로 인해, 플라스틱 코어가 응력을 흡수하여 크랙이나 계면박리 등의 불량 발생을 방지함으로써 BGA형 반도체 칩 패키지의 솔더 조인트 신뢰성이 향상된다.According to the BGA type semiconductor chip package according to the present invention as described above, a solder ball containing a plastic core having heat resistance and elasticity is formed on the outer side of one surface of the BGA type semiconductor chip package. Is formed. This improves solder joint reliability of the BGA type semiconductor chip package by preventing the plastic core from absorbing stress and preventing defects such as cracking and interfacial peeling.

그리고 응력이 집중되는 BGA형 반도체 칩 패키지의 외곽에만 플라스틱 코어 솔더 볼을 형성하여, 저비용으로 솔더 조인트의 신뢰성이 향상된 BGA형 반도체 칩 패키지를 제공할 수 있다.In addition, by forming a plastic core solder ball only on the periphery of the stress-intensive BGA type semiconductor chip package, it is possible to provide a BGA type semiconductor chip package having improved solder joint reliability at low cost.

Claims (3)

반도체 칩과;A semiconductor chip; 상부면에 상기 반도체 칩이 실장된 기판;A substrate having the semiconductor chip mounted on an upper surface thereof; 상기 기판의 하부면에 면 배열된 복수 개의 솔더 볼을 포함하는 BGA형 반도체 칩 패키지에 있어서,In the BGA type semiconductor chip package including a plurality of solder balls are arranged on the lower surface of the substrate, 상기 복수 개의 솔더 볼 중에서 상기 기판의 외곽 부분에 형성된 솔더 볼들은 플라스틱 코어가 내장된 솔더 볼인 것을 특징으로 하는 BGA형 반도체 칩 패키지.The solder ball formed on the outer portion of the substrate of the plurality of solder balls are BGA type semiconductor chip package, characterized in that the solder ball is embedded with a plastic core. 제1 항에 있어서,According to claim 1, 상기 플라스틱 코어가 내장된 솔더 볼은 상기 기판의 모서리 부분에 형성된 것을 특징으로 하는 BGA형 반도체 칩 패키지.The solder ball embedded with the plastic core is formed in the corner portion of the substrate BGA type semiconductor chip package. 제1 항에 있어서,According to claim 1, 상기 플라스틱 코어는 열경화성 수지로 형성된 것을 특징으로 하는 BGA형 반도체 칩 패키지.The plastic core is a BGA type semiconductor chip package, characterized in that formed of a thermosetting resin.
KR1020050109595A 2005-11-16 2005-11-16 Bga type semiconductor chip package having sectionally solder ball with in plastic core KR20070052043A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101489469B1 (en) * 2013-11-05 2015-02-05 인하대학교 산학협력단 Patterned plastic ball grid array packaging
US9698088B2 (en) 2011-05-24 2017-07-04 Samsung Electronics Co., Ltd. Semiconductor packages
KR101984819B1 (en) * 2018-04-25 2019-05-31 주식회사 테토스 Method for manufacturing metal ball

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9698088B2 (en) 2011-05-24 2017-07-04 Samsung Electronics Co., Ltd. Semiconductor packages
KR101489469B1 (en) * 2013-11-05 2015-02-05 인하대학교 산학협력단 Patterned plastic ball grid array packaging
KR101984819B1 (en) * 2018-04-25 2019-05-31 주식회사 테토스 Method for manufacturing metal ball

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