KR20070042366A - Liquid crystal display device - Google Patents

Abstract

The present invention is to provide a liquid crystal display device suitable for improving the afterimage, flicker and spots due to the DC drop when a common voltage is applied, the liquid crystal display device for achieving the above object A liquid crystal panel comprising an upper and lower substrates defining an active region and a pixel region, and a liquid crystal layer filled therebetween; A gate driver including a plurality of gate drivers at one edge of the lower substrate; A data driver comprising a plurality of driver ICs on the other edge of the lower substrate so as to be connected to a source printed circuit board, respectively; First common voltage lines arranged at left and right edges and bottoms of the lower substrate, respectively; A plurality of second and third common voltage lines connected to the first common voltage line and arranged in a horizontal direction and a vertical direction between each pixel area; A fourth common voltage line arranged at one side of the lower substrate to be connected to the first common voltage line at the bottom of the lower substrate; And first to fourth common voltage input pads configured in the data driver to apply voltage to the first to fourth common voltage lines.

Common Voltage Line, Common Voltage Input Pad

Description

Liquid Crystal Display Device

1 is a circuit diagram showing an arrangement of a common voltage line of a liquid crystal display according to the prior art;

2 is a circuit diagram illustrating a process voltage line arrangement of a liquid crystal display according to another conventional technology.

3 is a circuit diagram showing an arrangement of a common voltage line of a liquid crystal display according to a first embodiment of the present invention.

4 is a circuit diagram illustrating a process voltage line arrangement of a liquid crystal display according to a second exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

30, 40: lower substrate 31, 41: active area

32: gate driver 33, 43: data driver

34a, 34b: first and second common voltage input pads

35a, to 35n: third common voltage input pad 36, 46a: fourth common voltage input pad

37a, 37b, 37c, 37d: first, second, third and fourth common voltage lines

42a and 42b: first and second gate drivers

44a and 44b: first and second common voltage input pads

45a, ..., 45n: third common voltage input pad 46b: fifth common voltage input pad

47a, 47b, 47c, 47d, 47e: first, second, third, fourth and fifth common voltage lines

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device suitable for improving afterimage, flicker, and unevenness due to voltage drop when voltage is applied to the liquid crystal panel.

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELDs), and vacuum fluorescent (VFD) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention, a variety of applications such as a television, a computer monitor, and the like for receiving and displaying broadcast signals have been developed.

A liquid crystal display device converts the optical properties such as birefringence, photoreactivity, and light scattering characteristics of a liquid crystal cell that emits light by applying a voltage to a specific molecular array of liquid crystals and converts them into other molecular arrays. It is a display device using the modulation of light by the liquid crystal cell.

In general, a liquid crystal display device includes a liquid crystal display panel on which an image is displayed, a backlight unit that illuminates light toward the liquid crystal display panel, a support frame that accommodates and supports the backlight unit from the rear of the backlight unit, and the front side of the liquid crystal display panel. It includes a chassis coupled to the support frame for supporting the liquid crystal display panel.

The liquid crystal display panel includes a first substrate on which a common electrode is formed, a switching element such as a thin film transistor (hereinafter, referred to as a TFT), a second substrate on which a pixel electrode is formed, and a liquid crystal positioned between both substrates. It includes. The image signal is applied to the TFT through the gate drive IC and the data drive IC of the TFT substrate, whereby the liquid crystal receives the signal and adjusts the light from the backlight assembly to form a screen.

A common electrode line for applying an electric field to the common electrode of the first substrate is formed on the second substrate, and the common electrode line and the common electrode of the first substrate are connected to each other by silver contacts, although not shown in the drawing.

Hereinafter, the configuration of a liquid crystal display device according to the prior art will be described.

1 is a circuit diagram showing an arrangement of a common voltage line of a liquid crystal display according to the prior art.

As shown in FIG. 1, a liquid crystal display according to the related art includes an upper substrate (not shown), a lower substrate 10 facing the upper substrate, and a liquid crystal layer (not shown) filled therebetween. The lower substrate 10 includes a gate driver 12 including a plurality of gate drivers at one edge region and a plurality of driver ICs connected to a source printed circuit board (not shown), respectively. It is configured to include a configured data driver (13).

A timing controller (not shown) for outputting control signals and image information to the gate driver 12 and the data driver 13 is further provided.

In the liquid crystal panel, an active part region 11 for displaying an image is defined, and the lower substrate 10 includes a plurality of gate lines and data lines that vertically intersect to define a pixel area in a matrix form. A plurality of pixel electrodes formed in each pixel region defined by each gate line and a data line, and a plurality of thin film transistors (TFT) for applying a signal of the data line to each pixel electrode according to the signal of the gate line The gate line and the data line intersect each other.

The thin film transistor includes a gate electrode protruding from one side of a gate line, a gate insulating film formed on the front surface including the gate electrode, an active layer overlapping an upper portion including the gate electrode, and a gate electrode overlapping at one side of the data line. And a source electrode overlapping each other, and a drain electrode spaced apart from the source electrode.

In addition, a passivation layer is formed on the drain electrode to include the first contact hole in the drain electrode, and the drain electrode and the pixel electrode are contacted through the first contact hole.

Although not shown in the drawing, the upper substrate includes a color filter layer coated separately by pixel region by a black matrix, and a common electrode serving as a counter electrode of the pixel electrode.

In the liquid crystal display having the above configuration, the liquid crystal is driven by applying a voltage to the common electrode and the pixel electrode formed between the upper substrate and the lower substrate 10.

The data driver 13 includes a data pad part (not shown) for transmitting a signal to the data line, and the first and second common parts are provided at both edges of the data driver 13 to apply a common electrode. The voltage input pads 14a and 14b are configured.

The common voltage line 15 is arranged in the horizontal direction between the left and right edges of the lower substrate 10 and connected to the pixel regions.

In this case, the first and second common electrode input pads 14a and 14b are connected to one end of the common voltage line 15 arranged at the left and right edges.

As described above, the common voltage line 15 receives a signal from one end arranged at the left and right edges, and sequentially transmits the signal to the common voltage line 15 arranged in the horizontal direction between the pixel areas.

However, when the common voltage is applied only at one end as described above, the distance from the first and second common voltage input pads 14a and 14b increases or the voltage drop increases as the resistance of the common voltage line 15 increases. The phenomenon increases. Therefore, a problem arises in that a uniform common voltage is not applied.

Next, a liquid crystal display device according to another conventional technique for solving the above problem will be described.

2 is a circuit diagram illustrating a process voltage line arrangement of a liquid crystal display according to another conventional technology.

The liquid crystal display according to the prior art is the same as the prior art shown in FIG. 1 except for further adding a common voltage line 25 in the longitudinal direction between each pixel region.

When the common voltage line 25 is applied in the longitudinal direction between the pixel areas as described above, the signal transmission of the common voltage in the entire liquid crystal panel can be made more uniform.

However, since the common voltage is still made by the first and second common voltage input pads 24a and 24b positioned at one end of the left and right edges, the common voltage line located at the bottom and center of the lower substrate 20. There is still a voltage drop at 25. This may cause afterimages and flecks due to flicker and DC.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a liquid crystal suitable for improving the generation of afterimages, flicker and DC stains due to voltage drop when a common voltage is applied. It is to provide a display device.

According to an aspect of the present invention, there is provided a liquid crystal display device comprising: a liquid crystal panel including an upper region, a lower substrate on which an active region and a pixel region are defined, and a liquid crystal layer filled therebetween; A gate driver including a plurality of gate drivers at one edge of the lower substrate; A data driver comprising a plurality of driver ICs on the other edge of the lower substrate so as to be connected to a source printed circuit board, respectively; First common voltage lines arranged at left and right edges and bottoms of the lower substrate, respectively; A plurality of second and third common voltage lines connected to the first common voltage line and arranged in a horizontal direction and a vertical direction between each pixel area; A fourth common voltage line arranged at one side of the lower substrate to be connected to the first common voltage line at the bottom of the lower substrate; And first to fourth common voltage input pads configured in the data driver to apply voltage to the first to fourth common voltage lines.

The fourth common voltage line is in contact with a center of the first common voltage line below the lower substrate.

The first and second common voltage input pads are configured at left and right sides of both edges of the data driver to transmit signals to one end of the first common voltage line, respectively, and the third common voltage input pads are arranged in the second common voltage input pad. The signal is configured to transmit a signal to one end of the voltage line, and the fourth common voltage input pad is configured to transmit a signal to one end of the fourth common voltage line.

The third common voltage line may be connected to the first common voltage line by connecting left and right sides in common.

According to another exemplary embodiment of the present invention, there is provided a liquid crystal display device comprising: a liquid crystal panel including an upper region, a lower substrate on which an active region and a pixel region are defined, and a liquid crystal layer filled therein; First and second gate drivers including a plurality of gate drivers at both edges of the lower substrate; A data driver comprising a plurality of driver ICs on the other edge of the lower substrate so as to be connected to a source printed circuit board, respectively; First common voltage lines arranged at left and right edges and bottoms of the lower substrate, respectively; A plurality of second and third common voltage lines connected to the first common voltage line and arranged in a horizontal direction and a vertical direction between each pixel area; Fourth and fifth common voltage lines arranged at one side and the other side of the lower substrate to be connected to the first common voltage line at the bottom of the lower substrate; And first to fifth common voltage input pads configured in the data driver to apply voltage to the first to fifth common voltage lines.

The fourth and fifth common voltage lines may be in contact with center regions of the first and second common voltage lines below the lower substrate, respectively.

Hereinafter, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

First, the configuration of the liquid crystal display device according to the first embodiment of the present invention will be described.

3 is a circuit diagram of a liquid crystal display device according to a first embodiment of the present invention.

As shown in FIG. 3, the liquid crystal display according to the first exemplary embodiment of the present invention includes an upper substrate (not shown), a lower substrate 30 opposite thereto, and a liquid crystal layer (not shown) filled therebetween. A liquid crystal panel, a gate driver 32 including a plurality of gate drivers at one edge of the lower substrate 30, and a data driver configured with a plurality of driver ICs connected to a source printed circuit board (not shown). 33).

In the liquid crystal panel, an active region 31 for displaying an image is defined, and the lower substrate 30 includes a plurality of gate lines and data lines vertically intersecting to define a pixel region in a matrix form. Each of the gates includes a plurality of pixel electrodes formed in each pixel region defined by a gate line and a data line, and a plurality of thin film transistors (TFTs) for applying a signal of the data line to each pixel electrode according to a signal of the gate line. It is formed at the intersection of the line and the data line.

The thin film transistor includes a gate electrode protruding from one side of a gate line, a gate insulating film formed on the front surface including the gate electrode, an active layer overlapping an upper portion including the gate electrode, and a gate electrode overlapping at one side of the data line. And a source electrode overlapping each other, and a drain electrode spaced apart from the source electrode.

In addition, a passivation layer is formed on the drain electrode including the data line to have a first contact hole, and the drain electrode and the pixel electrode are contacted through the first contact hole.

Although not shown in the drawing, the upper substrate includes a color filter layer coated separately by pixel region by a black matrix, and a common electrode serving as a counter electrode of the pixel electrode.

The shape of the thin film transistor, the color filter layer, and the common electrode of the upper and lower substrates is described as an example, and is not intended to limit the present invention, but may be configured in other forms.

In the liquid crystal display having the above configuration, the liquid crystal is driven by applying a voltage to the common electrode and the pixel electrode formed between the upper substrate and the lower substrate 30.

In addition, the lower substrate 30 includes first common voltage lines 37a at the left and right edges and lower ends of the outer portion of the active region 31 to apply the common electrode, and the first common voltage lines 37a. A plurality of second common voltage lines 37b are arranged in the transverse direction between the pixel regions, and are connected to the first common voltage line 37a to form a plurality of second common voltage lines in the longitudinal direction between the pixel regions. Three common voltage lines 37c are arranged.

In addition, a fourth common voltage line 37d is arranged on the left side of the lower substrate 30 so as to be connected to the first common voltage line 37a at the bottom of the lower substrate 30.

In addition, the data driver 33 includes a data pad part (not shown) for transmitting a signal to the data line, and the first common voltage line 37a at the left and right sides at both edges of the data driver 33. The first and second common voltage input pads 34a and 34b are configured to transmit signals to one end of the circuit. A plurality of third common voltage input pads 35a, 35b,..., 35n for transmitting a signal to one end of the second common voltage line 37b is configured. The fourth common voltage input pad 36 is configured to transmit a signal to one end of the fourth common voltage line 37d.

The fourth common voltage line 37d is in contact with the first common voltage line 37a at the bottom center of the lower substrate 30.

The third common voltage line 37c is commonly connected to the left and right sides of the third common voltage line 37c by contacting the first common voltage line 37a.

As described above, the first, second, third, and fourth common voltage lines 37a, 37b, 37c, and 37d are connected to each other.

As described above, the first to fourth common voltage input pads and the first, second, third, and fourth common voltage lines 37a, 37b, 37c, and 37d are provided to form the left and right sides of the lower substrate 30. Since the common voltage is applied not only between the and the pixel regions but also through the lower end of the lower substrate 30, the common voltage can be uniformly applied to the panel.

That is, by applying the common voltage to the lower end of the lower substrate 30 through the fourth common voltage input pad 36 and the fourth common voltage line 37d, the voltage drop phenomenon due to the resistance of the conventional common voltage line is eliminated. By compensating, the common voltage can be stably applied to the entire liquid crystal panel (lower substrate).

For reference, when the voltage is input to the first to fourth common voltage lines, the fourth common voltage input pad 36 is applied with a voltage about 1V higher than other common voltage input pads.

Next, a liquid crystal display device according to a second embodiment of the present invention having the above configuration will be described.

4 is a circuit diagram of a liquid crystal display device according to a second embodiment of the present invention.

As shown in FIG. 4, the liquid crystal display according to the second exemplary embodiment of the present invention includes an upper substrate (not shown), a lower substrate 40 opposed thereto, and a liquid crystal layer (not shown) filled therebetween. A plurality of drivers to be connected to the liquid crystal panel, the first and second gate drivers 42a and 42b including a plurality of gate drivers at both edges of the lower substrate 40, and a source printed circuit board (not shown). And a data driver 43 composed of ICs.

In the above, the IC connecting the first and second gate drivers 42a and 42b and the data driver 43 may use a method such as an FPC or a COF.

In the liquid crystal panel, an active region 41 for displaying an image is defined, and the lower substrate 40 includes a plurality of gate lines and data lines that vertically intersect to define a pixel region in a matrix form. Each of the gates includes a plurality of pixel electrodes formed in each pixel region defined by a gate line and a data line, and a plurality of thin film transistors (TFTs) for applying a signal of the data line to each pixel electrode according to a signal of the gate line. It is formed at the intersection of the line and the data line.

The thin film transistor includes a gate electrode protruding from one side of a gate line, a gate insulating film formed on the front surface including the gate electrode, an active layer overlapping an upper portion including the gate electrode, and a gate electrode overlapping at one side of the data line. And a source electrode overlapping each other, and a drain electrode spaced apart from the source electrode.

In addition, a passivation layer is formed on the drain electrode to include the first contact hole in the drain electrode, and the drain electrode and the pixel electrode are contacted through the first contact hole.

Although not shown in the drawing, the upper substrate includes a color filter layer coated separately by pixel region by a black matrix, and a common electrode serving as a counter electrode of the pixel electrode.

The shape of the thin film transistor, the pixel electrode, the color filter layer, and the common electrode of the upper and lower substrates is described as an example, and is not intended to limit the present invention, but may be configured in other forms.

In the liquid crystal display having the above configuration, the liquid crystal is driven by applying a voltage to the common electrode and the pixel electrode formed between the upper substrate and the lower substrate 40.

As described above, the second embodiment of the present invention is more effective when the double bank is applied in the implementation.

In addition, the lower substrate 40 includes first common voltage lines 47a at left and right edges and lower ends of the outer portion of the active region 41 to apply the common electrode, and the first common voltage lines 47a. A plurality of second common voltage lines 47b are arranged in the transverse direction between the pixel regions, and are connected to the first common voltage line 47a to form a plurality of second common voltage lines in the longitudinal direction between the pixel regions. Three common voltage lines 47c are arranged.

In addition, fourth and fifth common voltage lines 47d and 47e are arranged at left and right sides of the lower substrate 40 so as to be connected to the first common voltage line 47a at the bottom of the lower substrate 40.

In addition, the data driver 43 includes a data pad part (not shown) for transmitting a signal to the data line, and the first common voltage line 47a at the left and right sides at both edges of the data driver 43. The first and second common voltage input pads 44a and 44b are configured to transmit signals to one end of the circuit. A plurality of third common voltage input pads 45a, 45b,..., 45n for transmitting a signal to one end of the second common voltage line 47b is configured. The fourth and fifth common voltage input pads 46a and 46b are configured to transmit signals to one end of the fourth and fifth common voltage lines 47d and 47e.

The fourth and fifth common voltage lines 47d and 47e are in contact with the first common voltage line 47a of the lower center area of the lower substrate 40, respectively.

In the above-described third common voltage line 47c, left and right sides of the third common voltage line 47a are connected in common with each other.

As described above, the first, second, third, fourth, and fifth common voltage lines 47a, 47b, 47c, 47d, and 47e are connected to each other.

As described above, the lower substrate 40 is provided by providing the first to fifth common voltage input pads and the first, second, third, fourth and fifth common voltage lines 47a, 47b, 47c, 47d and 47e. Since the common voltage is applied not only between the left and right sides of each pixel and the pixel area but also through the lower end of the lower substrate 40, the common voltage can be uniformly applied to the panel.

That is, the common voltage may be applied to the lower end of the lower substrate 40 through the fourth and fifth common voltage input pads 46a and 46b and the fourth and fifth common voltage lines 47d and 47e. By compensating for the voltage drop caused by the resistance of the conventional common voltage line, the common voltage can be stably applied to the entire liquid crystal panel (lower substrate).

For reference, when the voltage is input to the first to fifth common voltage lines, the voltage is applied to the fourth and fifth common voltage input pads 46a and 46b by approximately 1V higher than other common voltage input pads.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be defined by the claims.

The liquid crystal display according to the present invention as described above has the following effects.

Since the common voltage is also applied through the lower side of the lower substrate, it is possible to apply a uniform common voltage as a whole. Therefore, it is possible to improve the generation of afterimages, flicker, and DC unevenness due to the voltage drop.

Claims (6)

A liquid crystal panel comprising an upper region, a lower substrate on which an active region and a pixel region are defined, and a liquid crystal layer filled therebetween; A gate driver including a plurality of gate drivers at one edge of the lower substrate; A data driver comprising a plurality of driver ICs on the other edge of the lower substrate so as to be connected to a source printed circuit board, respectively; First common voltage lines arranged at left and right edges and bottoms of the lower substrate, respectively; A plurality of second and third common voltage lines connected to the first common voltage line and arranged in a horizontal direction and a vertical direction between each pixel area; A fourth common voltage line arranged at one side of the lower substrate to be connected to the first common voltage line at the bottom of the lower substrate; And first to fourth common voltage input pads configured in the data driver to apply voltage to the first to fourth common voltage lines. The method of claim 1, And the fourth common voltage line is in contact with a center of the first common voltage line below the lower substrate. The method of claim 1, The first and second common voltage input pads are configured at left and right sides of both edges of the data driver to respectively transmit signals to one end of the first common voltage line. The third common voltage input pads are configured to transmit a signal to one end of the second common voltage line. And a fourth common voltage input pad is configured to transmit a signal to one end of the fourth common voltage line. The method of claim 1, And the third common voltage line is left and right contacted with the first common voltage line and is commonly connected to the third common voltage line. A liquid crystal panel comprising an upper region, a lower substrate on which an active region and a pixel region are defined, and a liquid crystal layer filled therebetween; First and second gate drivers including a plurality of gate drivers at both edges of the lower substrate; A data driver comprising a plurality of driver ICs on the other edge of the lower substrate so as to be connected to a source printed circuit board, respectively; First common voltage lines arranged at left and right edges and bottoms of the lower substrate, respectively; A plurality of second and third common voltage lines connected to the first common voltage line and arranged in a horizontal direction and a vertical direction between each pixel area; Fourth and fifth common voltage lines arranged at one side and the other side of the lower substrate to be connected to the first common voltage line at the bottom of the lower substrate; And first to fifth common voltage input pads configured in the data driver to apply voltage to the first to fifth common voltage lines. The method of claim 5, And the fourth and fifth common voltage lines are in contact with a center area of the first and second common voltage lines below the lower substrate, respectively.

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