KR20070027108A - Method for fabrication of image sensor using cu metal line for decreasing optical loss - Google Patents
Method for fabrication of image sensor using cu metal line for decreasing optical loss Download PDFInfo
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- 239000002184 metal Substances 0.000 title claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 24
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 230000003287 optical effect Effects 0.000 title abstract description 4
- 230000003247 decreasing effect Effects 0.000 title 1
- 239000010949 copper Substances 0.000 claims abstract description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims abstract description 11
- 229910052802 copper Inorganic materials 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 9
- 230000004888 barrier function Effects 0.000 claims description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 claims description 2
- 239000003989 dielectric material Substances 0.000 abstract 3
- MCTWTZJPVLRJOU-UHFFFAOYSA-N 1-methyl-1H-imidazole Chemical compound CN1C=CN=C1 MCTWTZJPVLRJOU-UHFFFAOYSA-N 0.000 abstract 1
- 102100032937 CD40 ligand Human genes 0.000 description 7
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- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 101000621427 Homo sapiens Wiskott-Aldrich syndrome protein Proteins 0.000 description 2
- 102100023034 Wiskott-Aldrich syndrome protein Human genes 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
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- 239000000126 substance Substances 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 1
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- 208000013469 light sensitivity Diseases 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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Abstract
Description
도 1a 내지 도 1e는 본 발명의 일실시 예에 따른 이미지센서의 Cu 배선 형성 공정을 도시한 단면도.1A to 1E are cross-sectional views illustrating a Cu wiring process of an image sensor according to an embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
DB1, DB2 : 확산방지막 IMD1 ~ IMD3 : 절연막DB1, DB2: Diffusion prevention film IMD1 ~ IMD3: Insulation film
M1 ~ M3 : 금속배선 Via1, Via2 : 비아 콘택M1 ~ M3: Metal wiring Via1, Via2: Via contact
Cap_b : 캡핑층 PL : 보호막Cap_b: Capping Layer PL: Protective Film
본 발명은 이미지센서에 관한 것으로 특히, 화소 영역에서의 절연막의 두께를 낮출 수 있는 Cu 배선을 이용한 이미지센서 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor, and more particularly, to an image sensor manufacturing method using Cu wiring which can lower the thickness of an insulating film in a pixel region.
이미지센서는 광학 영상(Optical image)을 전기 신호로 변환시키는 반도체소자이며, 이미지센서는 크게 전하결합소자(Charge Coupled Device; 이하 CCD라 함)와 CMOS(Complementary MOS; 이하 CMOS라 함) 이미지센서로 이루어진다.An image sensor is a semiconductor device that converts an optical image into an electrical signal. An image sensor is a charge coupled device (CCD) and a CMOS (Complementary MOS) image sensor. Is done.
CCD는 개개의 MOS(Metal Oxide Semiconductor) 캐패시터가 서로 매우 근접하도록 배치되어 있고, 전하 캐리어가 캐패시터에 저장되고 이송되는 방식의 소자이다. A CCD is a device in which individual metal oxide semiconductor (MOS) capacitors are arranged so close to each other that charge carriers are stored and transported in the capacitor.
반면, CMOS 이미지센서는 반도체의 CMOS 공정을 적용하여 하나의 단위 화소에 하나의 포토다이오드와 3개 또는 4개 등의 단위 화소 구동을 위한 트랜지스터를 포함한다. CMOS 이미지센서는 제어회로(Control circuit) 및 신호처리회로(Signal processing circuit)를 주변회로로 사용하는 CMOS 기술을 이용하며, 화소 수만큼 구동을 위한 MOS 트랜지스터들을 만들고, 이들을 이용하여 차례차례 출력(Output)을 검출하는 스위칭 방식을 채용하는 소자이다.On the other hand, the CMOS image sensor includes a transistor for driving one photodiode and three or four unit pixels in one unit pixel by applying a semiconductor CMOS process. CMOS image sensor uses CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits, makes MOS transistors to drive as many pixels, and uses them sequentially to output Is a device that adopts a switching method for detecting.
이러한 다양한 이미지센서를 제조함에 있어서, 이미지센서의 감광도(Photo sensitivity)를 증가시키기 위한 노력들이 진행되고 있으며, 그 중 하나가 집광기술이다. 예컨대, CMOS 이미지센서는 빛을 감지하는 포토다이오드와 감지된 빛을 전기적 신호로 처리하여 데이터화하는 CMOS 로직회로부분으로 구성되어 있으며, 광감도를 높이기 위해서는 전체 이미지센서 면적에서 포토다이오드의 면적이 차지하는 비율(이를 통상 Fill Factor"라 한다)을 크게 하려는 노력이 진행되고 있다.In manufacturing such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, and one of them is a light collecting technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data, and in order to increase the light sensitivity, the area of the photodiode in the total image sensor area ( Efforts are being made to increase this, usually referred to as "fill factor."
Cu의 경우 물질 자체의 비저항이 낮으므로 Al 등에 비해 고집적 소자의 배선 재료로 사용되고 있다.In the case of Cu, since the resistivity of the material itself is low, it is used as a wiring material of a highly integrated element compared to Al.
Cu 배선의 경우, 배선 형성 후 절연막을 증착하는 Al과는 달리 주변부에 절연막을 먼저 증착한 후 배선을 형성하는 다마신(Damascene) 공정을 이용하므로, 배선층이 형성될 때마다 배선 두께만큼의 절연막이 형성된다. 따라서, Cu 배선을 마지막 배선층에 이용하는 경우 Al에 비해 마지막 층의 두께만큼의 절연막으로 인한 광손실이 불가피하다.In the case of Cu wiring, unlike Al, which deposits an insulating film after wiring formation, a damascene process is performed in which an insulating film is first deposited on the periphery and then a wiring is formed. Is formed. Therefore, when Cu wiring is used for the last wiring layer, light loss due to the insulating film as thick as the last layer is inevitable compared to Al.
상기와 같은 종래 기술의 문제점을 해결하기 위해 제안된 본 발명은, Cu 배선을 사용함에 따라 마지막 절연막의 두께만큼의 광 손실이 발생하는 것을 방지할 수 있는 Cu 배선을 이용한 이미지센서 제조 방법을 제공하는데 그 목적이 있다.The present invention proposed to solve the problems of the prior art as described above, to provide an image sensor manufacturing method using a Cu wiring that can prevent the occurrence of light loss as the thickness of the last insulating film by using the Cu wiring. The purpose is.
상기 목적을 달성하기 위하여 본 발명은, 제1 내지 제N-1(N은 2보다 큰 자연수) 개의 구리 금속배선이 형성된 전면에 절연막을 형성하는 단계; 상기 절연막을 선택적으로 식각하여 다마신 구조를 형성하는 단계; 상기 다마신 구조를 매립하며 평탄화된 제N 구리 금속배선을 형성하는 단계; 적어도 상기 제N 구리 금속배선을 덮는 캡핑층을 형성하는 단계; 및 상기 캡핑층을 식각마스크로 상기 절연막을 제거하는 단계를 포함하는 이미지센서 제조 방법을 제공한다.In order to achieve the above object, the present invention comprises the steps of forming an insulating film on the entire surface of the first to N-1 (N is a natural number larger than 2) copper metal wiring; Selectively etching the insulating film to form a damascene structure; Filling the damascene structure and forming a planarized Nth copper metal interconnection; Forming a capping layer covering at least the Nth copper metallization; And removing the insulating layer by using the capping layer as an etch mask.
Cu 배선을 사용하는 이미지센서에서 종래의 문제점인 마지막 배선층 형성 전 에 증착되는 절연막을 메탈을 이용한 캡핑(Capping)의 방법으로 캡핑 이외의 지역에서의 마지막 절연막을 제거함으로써, 절연막의 두께를 낮출 수 있다.In the image sensor using Cu wiring, the thickness of the insulating film can be reduced by removing the last insulating film in a region other than capping by using a metal capping method of the insulating film deposited before forming the last wiring layer, which is a conventional problem. .
즉, 마지막 배선층이 형성된 후, TiN 등을 이용하여 캡핑층을 증착한 다음, 캡핑층을 패터닝하여 모든 마지막 Cu 배선층 상에 캡핑층이 잔류하도록한 다음, 켑핑층을 마스크로 마지막 절연막을 식각한다. TiN의 경우 절연막에 대한 식각선택비가 높고 전도성이 우수하므로 후속의 패드와 접속시 전기적 특성이 떨어지지 않으므로 캡핑층으로 사용하는 것이 바람직하다.That is, after the last wiring layer is formed, the capping layer is deposited using TiN, or the like, and then the capping layer is patterned so that the capping layer remains on all the final Cu wiring layers, and then the last insulating layer is etched using the capping layer as a mask. In the case of TiN, since the etching selectivity with respect to the insulating film is high and the conductivity is excellent, it is preferable to use it as a capping layer because the electrical properties are not degraded when connecting to a subsequent pad.
아울러, 절연막 식각시 식각정지는 마지막 배선층 전 단계의 배선층의 확산방지막에서 이루어지도록 한다.In addition, the etching stop during the etching of the insulating film is to be made in the diffusion barrier of the wiring layer before the last wiring layer.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시 예를 첨부한 도면을 참조하여 설명한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.
도 1a 내지 도 1e는 본 발명의 일실시 예에 따른 이미지센서의 Cu 배선 형성 공정을 도시한 단면도로서, 이를 참조하여 본 발명의 Cu 배선 공정을 살펴본다.1A to 1E are cross-sectional views illustrating a Cu wiring forming process of an image sensor according to an exemplary embodiment of the present invention. With reference to FIGS. 1A to 1E, the Cu wiring process of the present invention will be described.
도 1a에 도시된 바와 같이, 포토다이오드 및 트랜지스터 등의 하부 형성 공정이 완료된 기판(도시하지 않음) 상에 제1절연막(IMD1)을 형성한다.As illustrated in FIG. 1A, a first insulating layer IMD1 is formed on a substrate (not shown) on which lower formation processes such as photodiodes and transistors are completed.
제1절연막(IMD1)을 선택적으로 식각하여 제1금속배선이 형성될 트렌치(즉, 싱글 다마신 구조)를 형성한 다음, Cu를 증착하고 평탄화하여 제1금속배선(M1)을 형성한다.The first insulating layer IMD1 is selectively etched to form a trench (ie, a single damascene structure) in which the first metal wiring is to be formed, and then Cu is deposited and planarized to form the first metal wiring M1.
제1금속배선(M1)이 형성된 전면에 제1확산방지막(DB1, Diffusion Barrier1)을 증착한다.A first diffusion barrier layer (DB1, Diffusion Barrier1) is deposited on the entire surface of the first metal wiring M1.
전면에 제2절연막(IMD2)을 증착한 다음, 듀얼 다마신 구조를 형성한다. 듀얼 다마신 구조는 주지된 바와 같이, 제2금속배선(M2) 형성을 위한 트렌치와 제1비아콘택(Via1) 형성을 위한 비아 홀을 일련의 공정을 통해 형성한 구조로서, 셀프 얼라인과 비아 퍼스트 또는 트렌치 퍼스트 등의 다양한 방법이 있다.After the second insulating layer IMD2 is deposited on the entire surface, a dual damascene structure is formed. As is well known, the dual damascene structure is a structure in which a trench for forming the second metal interconnection M2 and a via hole for forming the first via contact Via1 are formed through a series of processes. There are various methods such as first or trench first.
전면에 Cu를 증착하고 평탄화함으로써, 제1비아콘택(Via1)과 제2금속배선(M2)을 동시에 형성한다.By depositing and planarizing Cu on the entire surface, the first via contact Via1 and the second metal wiring M2 are simultaneously formed.
제2금속배선(M1)이 형성된 전면에 제2확산방지막(DB2)을 증착한다.The second diffusion barrier layer DB2 is deposited on the entire surface where the second metal wiring M1 is formed.
전면에 제3절연막(IMD3)을 증착한 다음, 듀얼 다마신 구조를 형성한다. 듀얼 다마신 구조는 주지된 바와 같이, 제3금속배선(M3) 형성을 위한 트렌치와 제2비아콘택(Via2) 형성을 위한 비아 홀을 일련의 공정을 통해 형성한 구조로서, 셀프 얼라인과 비아 퍼스트 또는 트렌치 퍼스트 등의 다양한 방법이 있다.After the third insulating layer IMD3 is deposited on the entire surface, a dual damascene structure is formed. As is well known, the dual damascene structure is a structure in which a trench for forming the third metal interconnection M3 and a via hole for forming the second via contact Via2 are formed through a series of processes. There are various methods such as first or trench first.
전면에 Cu를 증착하고 평탄화함으로써, 제2비아콘택(Via1)과 제3금속배선(M3)을 동시에 형성한다.By depositing and planarizing Cu on the entire surface, the second via contact Via1 and the third metal wiring M3 are simultaneously formed.
여기서, 제1절연막(IMD1)과 제2절연막(IMD2) 및 제3절연막(IMD3)은 통상적인 산화막 계열의 절연막과 저유전율막(Low-k) 등을 포함하며, 평탄화 공정 시에는 화학기계적연마(Chemical Mechanical Polishing; 이하 CMP라 함) 방식을 이용한다.Here, the first insulating film IMD1, the second insulating film IMD2, and the third insulating film IMD3 include a conventional oxide film-based insulating film, a low dielectric constant film (Low-k), and chemical mechanical polishing during the planarization process. (Chemical Mechanical Polishing; hereinafter referred to as CMP).
도 1b에 도시된 바와 같이, 제3금속배선(M3)이 형성된 전면에 캡핑층(Cap_a)을 형성한다.As shown in FIG. 1B, a capping layer Cap_a is formed on the entire surface on which the third metal wiring M3 is formed.
캡핑층(Cap_a)으로는 전술한 바와 같이, TiN을 사용하는 것이 바람직하며, 이외에도 제3절연막(IMD3)과 식각선택비를 가지며, 전기전도도가 우수한 모든 물질을 사용할 수 있다.As described above, as the capping layer Cap_a, TiN is preferably used. In addition, any material having an etching selectivity and an excellent electrical conductivity may be used as the third insulating layer IMD3.
캡핑층(Cap_a) 상에 캡핑층(Cap_a)을 패터닝 하기 위한 포토레지스트 패턴(PR)을 형성한다. 포토레지스트 패턴(PR)은 모든 제3금속배선(M3) 상에 캡핑층(Cap_a)을 남기도록 형상을 갖게 하며, 제3금속배선(M3)에 비해 그 폭이 크도록 하는 것이 바람직하다.A photoresist pattern PR for patterning the capping layer Cap_a is formed on the capping layer Cap_a. The photoresist pattern PR may be shaped to leave the capping layer Cap_a on all the third metal lines M3, and may be larger in width than the third metal lines M3.
도 1c에 도시된 바와 같이, 포토레지스트 패턴(PR)을 식각마스크로 캡핑층(Cap_a)을 식각하여 제3금속배선(M3) 상에서만 캡핑층(Cap_b)이 남도록 한다.As illustrated in FIG. 1C, the capping layer Cap_a is etched using the photoresist pattern PR as an etch mask so that the capping layer Cap_b remains only on the third metal wiring M3.
포토레지스트 패턴(PR)을 제거한 다음, 세정 공정을 실시한다.After the photoresist pattern PR is removed, a cleaning process is performed.
도 1d에 도시된 바와 같이, 캡핑층(Cap_b)을 식각마스크로 제3절연막(IMD3)을 식각함으로써, 제3금속배선(M3)이 형성된 이외의 영역에서의 제3절연막(IMD3)을 제거한다.As illustrated in FIG. 1D, the third insulating layer IMD3 is etched using the capping layer Cap_b as an etch mask to remove the third insulating layer IMD3 in a region other than the third metal wiring M3. .
일반적인 산화막 식각 조건에서의 식각선택비를 높이기 위하여 제3절연막(IMD3)으로 저유전율막이나 플로린(Flourine)을 다량 포함하는 절연막을 사용할 수 있으며, 식각정지는 제2확산방지막(DB2)에서 이루어진다.In order to increase the etching selectivity under general oxide film etching conditions, an insulating film including a large amount of a low dielectric constant film or florin may be used as the third insulating film IMD3, and the etch stop is formed in the second diffusion barrier film DB2.
따라서, 제2확산방지막(DB2)이 식각정지막의 역할을 한다.Therefore, the second diffusion barrier DB2 serves as an etch stop layer.
제1 및 제2확산방지막(DB1, DB2)으로는 SiC나 SiN 등을 사용한다.SiC, SiN, or the like is used as the first and second diffusion barrier films DB1 and DB2.
도 1e에 도시된 바와 같이, 전면에 보호막(PL, Passivation Layer)을 형성한다.As shown in FIG. 1E, a passivation layer (PL) is formed on the entire surface.
도면에 도시되지는 않았지만, 후속 공정으로 Al을 이용한 패드 공정을 실시한다.Although not shown in the drawings, a pad process using Al is performed in a subsequent process.
전술한 바와 같이 이루어지는 본 발명은, Cu 배선시 마지막 절연막으로 인한 포토다이오드와 마이크로렌즈 사이의 절연막의 두께 증가에 따른 광 손실을 캡핑층을 이용한 마지막 절연막의 제거를 통해 방지할 수 있음을 실시 예를 통해 알아보았다.According to the present invention made as described above, the optical loss due to the increase in the thickness of the insulating film between the photodiode and the microlens due to the last insulating film during Cu wiring can be prevented by removing the last insulating film using the capping layer. Learned through
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다. Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
상술한 본 발명은, Cu 배선 공정을 이용한 이미지센서에서의 광 손실을 최소화함으로써, 이미지센서의 성능을 향상시키는 효과가 있다.The present invention described above has the effect of improving the performance of the image sensor by minimizing the light loss in the image sensor using the Cu wiring process.
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| KR1020050079519A KR20070027108A (en) | 2005-08-29 | 2005-08-29 | Method for fabrication of image sensor using cu metal line for decreasing optical loss |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100853094B1 (en) * | 2007-03-14 | 2008-08-19 | 동부일렉트로닉스 주식회사 | Image sensor and method for fabricatoin of the same |
| KR20230073007A (en) * | 2021-11-18 | 2023-05-25 | 삼성전자주식회사 | Image sensor, method of manufacturing the same, and electronic device including the image sensor |
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2005
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100853094B1 (en) * | 2007-03-14 | 2008-08-19 | 동부일렉트로닉스 주식회사 | Image sensor and method for fabricatoin of the same |
| KR20230073007A (en) * | 2021-11-18 | 2023-05-25 | 삼성전자주식회사 | Image sensor, method of manufacturing the same, and electronic device including the image sensor |
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