KR20070023560A - Dielectric film capacitor and method of manufacturing the same - Google Patents

Abstract

The dielectric film capacitor has an opening having a lower electrode made of a material containing platinum, a dielectric film comprising an oxide having an ABOx type perovskite structure provided above the lower electrode, and an upper electrode provided above the dielectric film. Include. The ratio of the planar area of the lower electrode to the area of the formation region of the dielectric film is 50% or more. The dielectric film capacitor is a dielectric film including a lower electrode made of a platinum-containing material, a lower electrode having a thickness of 10 to 100 nm, an oxide having an ABOx type perovskite structure provided above the lower electrode, and a dielectric film above. It includes an upper electrode provided.

Dielectric film forming composition, insulating layer, dielectric film capacitor, lower electrode, opening, upper electrode

Description

Dielectric film capacitor and manufacturing method therefor {DIELECTRIC FILM CAPACITOR AND METHOD OF MANUFACTURING THE SAME}

1 (a) to 1 (f) are cross-sectional views schematically showing one manufacturing process of the dielectric film capacitor 20 of the first embodiment of the present invention.

Fig. 2 is a plan view schematically showing the planar shape of the lower electrode 22 in the dielectric film capacitor 20 of the first embodiment of the present invention.

3A to 3F are cross-sectional views schematically showing one manufacturing process of the dielectric film capacitor 20 of the first embodiment of the present invention.

4 is a graph showing a measurement result of the surface roughness of the lower electrode 22 obtained in the second embodiment.

Fig. 5 is a graph showing particle diameter distribution of particles [component (i)] in a dispersion of oxide particles having an ABOx-type crystal structure obtained in Example 1;

Fig. 6 is a diagram showing the result of X-ray diffraction of the dried product of the dielectric film-forming composition 1 obtained in the first embodiment.

<Explanation of symbols for the main parts of the drawings>

1: Composition for Dielectric Film Formation

12: insulation layer

20: dielectric film capacitor

22: lower electrode

22a: opening

24, 24a: dielectric film

26: upper electrode

26a: conductive layer

[Document 1] Japanese Unexamined Patent Publication No. Hei 8-78636

[Document 2] Japanese Unexamined Patent Publication No. 2004-349394

[Document 3] Japanese Unexamined Patent Publication No. 2005-85812

[Document 4] Japanese Unexamined Patent Publication No. 2005-101531

The present invention relates to a dielectric film capacitor and a method of manufacturing the same.

For example, devices in the information industry field such as mobile communication terminals such as mobile phones are increasingly required to have higher speed, higher capacity, and smaller size in the future, and research and development of high-performance devices for realizing them are widely and vigorously progressed. have. Among them, dielectric materials having an ABOx type (perovskite) crystal structure represented by barium titanate, barium strontium titanate, and lead zirconate titanate are widely used in the field of electronic devices such as capacitors and memory materials.

However, for the miniaturization and high performance of such electronic devices, it is impossible to reduce the thickness of the device, and therefore, the establishment of a manufacturing technique of a high function and high quality dielectric film capacitor is key.

The dielectric film capacitor generally has a structure in which a substrate, an insulating layer, a lower electrode, a dielectric film, and an upper electrode are sequentially stacked. The dielectric film capacitor can be formed by sputtering, CVD (chemical vapor deposition), MBE (molecular beam epitaxy), sol-gel, MOD (organic metal decomposition), or the like. Especially, expectation is gathered in the liquid-phase method from the point which manufacture cost is low, the ease of composition control, shape provision, and an expensive apparatus are not needed.

When the dielectric film is formed by the vapor phase method, it is generally necessary to improve the dielectric properties of the dielectric film by heat-treating the formed dielectric film in an oxidizing atmosphere. When the dielectric film is formed by the liquid phase method, it is generally necessary to heat-treat the coating film obtained by applying a sol-gel solution in which an organic compound, which is a raw material of the dielectric film, is dissolved in an organic solvent, or a solution in which dielectric material particles are dispersed. For this reason, the noble metal which is hard to oxidize is used for a lower electrode. Specifically, as the material of the lower electrode, a material based on platinum Pt is often used.

When a dielectric film capacitor is prepared on a silicon wafer, for example, a lower electrode (for example, a Pt film) is formed on a silicon-based insulating layer (for example, a silicon oxide layer) formed on the silicon wafer. However, since the adhesion between the silicon-based insulating layer and the lower electrode (particularly, the Pt film) is poor, the lower electrode is easily peeled off from the silicon-based insulating layer. By peeling this lower electrode, it becomes very difficult to manufacture a dielectric film capacitor using methods such as patterning and dicing cut. In order to solve this problem, as an attempt to improve the adhesion between the silicon-based insulating layer and the lower electrode, a method of forming an adhesion layer between the silicon-based insulating layer and the lower electrode has been reported.

For example, Japanese Patent Laid-Open No. 8-78636 attempts to improve the adhesion between the silicon oxide layer and the noble metal electrode film by creating a titanium (Ti) film as an adhesion layer between the silicon oxide layer and the noble metal electrode film. However, the Ti film may be warped by the oxidation of the Ti film, or the oxide produced by the oxidation of the Ti film may diffuse to the interface between the noble metal electrode film and the dielectric film.

For example, Japanese Patent Laid-Open No. 2004-349394 discloses adhesion between a silicon oxide layer and a platinum electrode film by creating a gold (Au) film as an adhesion layer between the silicon oxide layer and the platinum electrode film to relieve stress of the platinum electrode film. Is trying to improve. However, the production of a multilayer noble metal thin film is disadvantageous in terms of cost when actually manufacturing a device. In addition, the adhesion between the Au film and the silicon oxide layer is not good, and it is difficult to say that the adhesion is improved.

For example, in Japanese Patent Application Laid-Open Nos. 2005-85812 and 2005-101531, an adhesion layer using the same material as the dielectric film is formed between the silicon oxide layer and the platinum electrode film to form an adhesion layer. By relieving stress, improvement of the adhesiveness of a silicon oxide layer and a platinum electrode film is attempted. According to this method, since the adhesion layer and the dielectric layer are the same material, even if the adhesion layer diffuses at the interface between the lower electrode and the dielectric film, the deterioration of characteristics is not caused. However, since it is necessary to select a dielectric material capable of functioning as an adhesion layer, the material composition usable as the dielectric film is limited, which is not preferable in view of the characteristics of the dielectric film capacitor.

[Patent Document 1] Japanese Patent Application Laid-Open No. 8-78636

[Patent Document 2] Japanese Patent Application Laid-Open No. 2004-349394

[Patent Document 3] Japanese Unexamined Patent Application Publication No. 2005-85812

[Patent Document 4] Japanese Patent Application Laid-Open No. 2005-101531

The present invention has been made in view of the above-described circumstances, and an object of the present invention is to improve adhesion between the lower electrode and the layer provided under the lower electrode, which makes it difficult to oxidize and provides a thermally stable electrode structure. It is desirable to provide a dielectric film capacitor having excellent and excellent characteristics and a method of manufacturing the same.

Another object of the present invention is to provide an electronic circuit component including the dielectric film capacitor.

In the dielectric film capacitor according to the first aspect of the present invention,

A lower electrode having an opening and made of a material containing platinum,

A dielectric film comprising an oxide having an ABOx type crystal structure provided above the lower electrode;

An upper electrode provided above the dielectric film,

The ratio of the planar area of the lower electrode to the area of the formation region of the dielectric film is 50% or more.

Here, the term "plane" refers to a plane perpendicular to the stacking direction of the lower electrode, the dielectric film and the upper electrode, and the term "plane area" refers to an area in the perpendicular plane. In addition, the "region of formation of a dielectric film" means the area | region (for example, the upper surface of the said dielectric film) which the said dielectric film occupies the largest area in the said plane.

In the dielectric film capacitor according to the second aspect of the present invention,

A lower electrode having a thickness of 10 to 100 nm made of a material containing platinum,

A dielectric film comprising an oxide having an ABOx type crystal structure provided above the lower electrode;

And an upper electrode provided above the dielectric film.

The manufacturing method of the dielectric film capacitor which concerns on the 3rd aspect of this invention is

(a) a step of forming a lower electrode having an opening and made of a material containing platinum;

(b) directly forming a dielectric film comprising an oxide having an ABOx type crystal structure on the lower electrode;

(c) forming an upper electrode above the dielectric film,

The step (a) includes a step of patterning the lower electrode so that the ratio of the planar area of the lower electrode to the area of the formation region of the dielectric film is 50% or more.

The manufacturing method of the dielectric film capacitor which concerns on the 4th aspect of this invention is

(a) forming a lower electrode having a thickness of 10 to 100 nm made of a material containing platinum,

(b) directly forming a dielectric film comprising an oxide having an ABOx type crystal structure on the lower electrode;

(c) forming an upper electrode above the dielectric film.

An electronic circuit component according to a fifth aspect of the present invention includes the above dielectric film capacitor.

EMBODIMENT OF THE INVENTION Hereinafter, the dielectric film capacitor of this embodiment of this invention, its manufacturing method, and electronic circuit component are demonstrated in detail.

1. First embodiment

1. 1. Dielectric Film Capacitor

FIG. 1F is a cross-sectional view schematically showing the dielectric film capacitor 20 of the first embodiment of the present invention, and FIG. 2 is a lower portion of the dielectric film capacitor 20 of FIG. 1F. It is a top view which shows typically the planar pattern of the electrode 22. As shown in FIG.

The dielectric film capacitor 20 of this embodiment includes a lower electrode 22, a dielectric film 24 provided above the lower electrode 22, and an upper electrode 26 provided above the dielectric film 24. do. The lower electrode 22 has an opening 22a as shown in Fig. 1F. That is, the lower electrode 22 includes a plurality of separated portions (part Y ₁ in FIG. 2). To Y ₁₂ ), and the gap between the separated portions is the opening portion 22a. The dielectric film 24 includes an oxide having an ABOx type crystal structure.

The dielectric film capacitor 20 of the present embodiment can be used as, for example, a thin film capacitor embedded in an interposer.

The dielectric film capacitor 20 of the present embodiment can be used, for example, as a ferroelectric film capacitor of a ferroelectric memory device (not shown). In this case, charges as information are collected in the dielectric film 24 of the dielectric film capacitor 20. In this case, the ferroelectric memory device includes a transistor (not shown) such as a thin film transistor (TFT), a MOSFET, etc. together with the dielectric film capacitor 20.

The lower electrode 22 is made of a material containing platinum, and preferably of platinum or a metal other than platinum and platinum (eg, at least one metal selected from ruthenium, rhodium, palladium, osmium and iridium). Made of alloy. The lower electrode 22 may be a single layer film or a laminated multilayer film.

In the oxide having the ABOx type crystal structure constituting the dielectric film 24, the metal type A may be at least one metal selected from Li, Na, Ca, Sr, Ba, and La, and the metal type B is Ti, At least one metal selected from Zr, Ta and Nb. For example, the dielectric film 24 may be made of [Pb (Zr, Ti) O ₃ ] (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT). have.

The upper electrode 26 may be formed of the above-described material as a material usable for the lower electrode 22, or may be formed of aluminum, silver, nickel, or the like. The upper electrode 26 may be a single layer film or may be a laminated multilayer film.

In this embodiment, the lower electrode 22 is provided on the insulating layer 12. The insulating layer 12 may be, for example, a silicon-based insulating layer. The silicon-based insulating layer is an insulating layer containing silicon, and the film thickness thereof is preferably 100 to 2000 nm, more preferably 100 to 500 nm. Here, when the film thickness of a silicon type insulating layer is less than 100 nm, a leak current is large, and when the film thickness of a silicon type insulating layer exceeds 2000 nm, the stress regarding a board | substrate becomes strong.

In addition, the silicon-based insulating layer preferably has a volume resistivity of 10 ¹⁰ Ωcm or more, and more preferably has a volume resistivity of 10 ¹² Ωcm or more. If the volume resistivity of the silicon-based insulating layer is less than 10 ¹⁰ ? Cm, the leakage current increases.

As a silicon type insulating layer, a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon type low-k film are mentioned, for example. Although not shown, a contact layer may be provided below the lower electrode 22.

In addition, when the insulating layer 12 is a silicon type insulating layer, the intermediate | middle layer (not shown) in which metal and silicon are mixed may be formed between the silicon type insulating layer and the lower electrode 22. The intermediate layer in which this metal and silicon are mixed is formed by reaction of the metal constituting the lower electrode 22 and the silicon atoms constituting the silicon-based insulating layer. Since the intermediate layer is formed between the silicon-based insulating layer and the lower electrode 22, the adhesion between the lower electrode 22 and the silicon-based insulating layer can be improved.

For example, when the lower electrode 22 is made of a material containing platinum, an intermediate layer in which platinum and silicon are mixed is formed between the silicon-based insulating layer and the lower electrode 22. In particular, when the lower electrode 22 is made of a material containing platinum, the adhesion between the lower electrode 22 and the silicon-based insulating layer may deteriorate, and the lower electrode 22 may be peeled off from the silicon-based insulating layer. In this case, according to the dielectric film capacitor 20 of the present embodiment, the silicon-based insulating layer (insulating layer 12) and the electrode (lower electrode 22) made of a material containing platinum include platinum and silicon. By arrange | positioning through the mixed intermediate | middle layer, adhesiveness between a silicon type insulating layer (insulating layer 12) and the lower electrode 22 can be made favorable.

In the dielectric film capacitor 20 of the present embodiment, the region X is a formation region of the dielectric film 24. This region X corresponds to the upper surface 24b of the dielectric film 24 (see FIG. 1 (f)). Here, the area X corresponds to the planar pattern of the upper electrode 26 further.

In FIG. 2, the area X is represented by a dot, the outer edge A of the area X is represented by a thick line, and the part Y _1. To Y ₁₂ ) are indicated by diagonal lines, respectively.

In addition, in FIG. 2, a plurality of separated portions Y ₁ constituting the lower electrode 22. To Y ₁₂ ) is shown in a lattice arrangement, but the arrangement pattern and the size of the plurality of separated portions are not limited thereto.

As shown in Fig. 2, in this dielectric film capacitor 20, the planar area of the lower electrode 22 relative to the area of the formation region X of the dielectric film 24 (plural separated portions Y ₁ to ₁₎ . that the proportion of the sum of the plane areas of the Y _12)] is 50% or more is preferred. When the said ratio is 50% or more, the adhesiveness of the lower electrode 22 and the layer under it can be improved, ensuring the function as an electrode of the lower electrode 22. On the other hand, when the said ratio is less than 50%, the function as an electrode of the lower electrode 22 may fall.

According to the dielectric film capacitor of this embodiment, the ratio of the planar area of the lower electrode 22 to the area of the formation region X of the dielectric film 24 is 50% or more, whereby the lower electrode 22 and the lower electrode The adhesiveness of the layer provided under (22) (the insulating layer 12 in FIG. 1F) is improved to be difficult to oxidize, and a thermally stable electrode structure can be provided, so that the yield is good and the characteristics are excellent. Thereby, peeling of the lower electrode 22 can be prevented, for example, when patterning the dielectric film 24 and the upper electrode 26 formed on the lower electrode 22.

In particular, when the lower electrode 22 is made of a material containing Pt, and the layer provided under the lower electrode 22 is a silicon-based insulating layer, the adhesion between the lower electrode 22 and the silicon-based insulating layer can be satisfactorily improved. Peeling of the electrode 22 can be prevented.

1. 2. Method of manufacturing dielectric film capacitor

Next, referring to Figs. 1A to 1F, a method of manufacturing the dielectric film capacitor 20 of the present embodiment will be described. 1A to 1F are cross-sectional views schematically showing one manufacturing process of the dielectric film capacitor 20 of the first embodiment of the present invention.

The manufacturing method of the dielectric film capacitor 20 of this embodiment includes the steps of (a) forming the lower electrode 22 which has the opening part 22a and consists of a material containing platinum, (b) the lower electrode 22 The step of directly forming the dielectric film 24 containing the oxide having an ABOx type crystal structure on the), and (c) the step of forming the upper electrode 26 above the dielectric film 24. Here, the step (a) includes the step of patterning the lower electrode 22 such that the ratio of the planar area of the lower electrode 22 to the area of the formation region X of the dielectric film 24 is 50% or more. (See Figure 2).

Hereinafter, each manufacturing process of the dielectric film capacitor 20 of this embodiment is demonstrated.

1. 2. 1. Formation of Lower Electrode 22

First, as shown in Fig. 1A, a substrate 10 is prepared. The substrate 10 may be, for example, a semiconductor substrate such as a silicon substrate, an SOI substrate, a sapphire substrate, or a compound semiconductor substrate.

Next, as shown in FIG. 1B, an insulating layer 12 is formed on the substrate 10. As a material of the insulating layer 12, what was illustrated by the column of "dielectric film capacitor" can be used. In addition, the insulating layer 12 can be formed using a well-known method (for example, CVD method, thermal oxidation method, and spin coat method).

Subsequently, as shown in FIG. 1C, the lower electrode 22 is formed on the insulating layer 12. Although the deposition method of the lower electrode 22 is not specifically limited, For example, it can form using the spatter method. In addition, after forming a conductive layer (not shown) for forming the lower electrode 22, the conductive layer is patterned to form the lower electrode 22.

Patterning of the lower electrode 22 can be performed by patterning using the lift-off method or the ion milling method, for example. In a way, it has an opening (22a), a plurality of separate portions (Y ₁ To Y ₁₂ ), a lower electrode 22 can be formed (see FIG. 2).

1. 2. 2. Formation of Dielectric Film 24a

Next, as shown in Fig. 1D, a dielectric film 24a is directly formed on the lower electrode 22. Figs. This dielectric film 24a is patterned by a process described later to form a dielectric film 24 of a predetermined pattern (see Fig. 1 (f)). The dielectric film 24a can be formed by, for example, sputtering, CVD (chemical vapor deposition), MBE (molecular beam epitaxy), sol-gel, MOD (organic metal decomposition), or the like. In addition, it is preferable to form the dielectric film 24a by a liquid phase method that does not require an expensive device from the viewpoint of manufacturing cost, ease of composition control and shape provision. When the dielectric film 24a is formed by the liquid phase method, the dielectric film 24a can be formed by applying a composition for forming a dielectric film.

In the dielectric film capacitor 20 of the present embodiment, the lower electrode 22 includes an opening 22a. For this reason, since the composition can be introduced into the opening 22a of the lower electrode 22 by forming the dielectric film 24a by applying the composition for forming a dielectric film, the dielectric film 24a is formed in the opening 22a. I can reliably bury).

The composition for forming a dielectric film of the present embodiment is a group of (i) particles having an ABOx type crystal structure, (ii) metal alkoxides, metal carboxylates, metal complexes and metal hydroxides containing metal type A and metal type B. It may be a composition comprising (i) and (ii) or one of the at least one component selected from (i) and an organic solvent.

The concentration of the oxide particles of the (i) ABOx type crystal structure contained in the dielectric film-forming composition of the present embodiment is 20 to 3% by weight, preferably 15 to 5% by weight.

Here, specific examples of the metal species A and the metal species B are as described in the section of the above-mentioned "dielectric film capacitor".

Examples of the organic solvent included in the dielectric-forming composition of the present embodiment include alcohol solvents, polyhydric alcohol solvents, ether solvents, ketone solvents, ester solvents, and the like. Can be mentioned.

The dielectric film 24a can be obtained by apply | coating the composition for dielectric film formation of this embodiment on the lower electrode 22, forming a coating film, and drying this coating film as needed, Preferably, it is often heat-firing. have.

As a coating method of the composition for dielectric film formation of this embodiment, for example, the open spin coating method, the closed spin coating method, the LSM-CVD method (solution vaporization chemical vapor deposition method) of misting coating, the dipping method, the spray method, Known coating methods such as a roll coating method, a printing method, an inkjet method, and an electrophoretic electrodeposition method can be used.

Drying of a coating film is normally performed at 50-300 degreeC, Preferably it is the temperature of 100-250 degreeC. In addition, the dielectric film 24a finally obtained can be set to a desired film thickness by repeating the application of the composition for forming a dielectric film and a series of operations until drying several times as necessary.

Thereafter, the coating film is usually heated to a temperature of 300 to 900 ° C, preferably 400 to 750 ° C, and baked to obtain the dielectric film 24a.

1. 2. 3. Formation of the Upper Electrode 26

Next, as shown in Fig. 1E, a conductive layer 26a is formed on the dielectric film 24a. This conductive layer 26a is patterned by a process described later to form an upper electrode 26 of a predetermined pattern (see Fig. 1 (f)). The method for forming the conductive layer 26a is not particularly limited as long as it does not impart insignificant damage to the dielectric film 24a. For example, a vapor deposition method and a sputtering method can be used.

Subsequently, as shown in Fig. 1E, the resist layer R is formed on the conductive layer 26a by, for example, a photolithography method. In the present embodiment, the resist R has a planar shape and a size corresponding to the formation region X of the desired dielectric film 24. Using the resist R as a mask, the dielectric film 24a and the conductive layer 26a are patterned. As a result, the dielectric film 24 and the upper electrode 26 are formed.

Here, for the patterning of the dielectric film 24a and the conductive layer 26a, a known method such as wet etching or dry etching can be used.

By the above process, the dielectric film capacitor 20 of the present embodiment can be obtained.

2. Second Embodiment

2. 1. Dielectric Film Capacitor

3F is a cross-sectional view schematically showing the dielectric film capacitor 20 of the first embodiment of the present invention.

The dielectric film capacitor 20 of this embodiment includes a lower electrode 22, a dielectric film 24 provided above the lower electrode 22, and an upper electrode 26 provided above the dielectric film 24. do. The dielectric film 24 includes an oxide having an ABOx type crystal structure.

The dielectric film capacitor 20 of the present embodiment can be used as, for example, a thin film capacitor embedded in an interposer.

The dielectric film capacitor 20 of the present embodiment can be used, for example, as a ferroelectric film capacitor of a ferroelectric memory device (not shown). In this case, charges as information are collected in the dielectric film 24 of the dielectric film capacitor 20. In this case, the ferroelectric memory device includes a transistor (not shown) such as a thin film transistor (TFT), a MOSFET, etc. together with the dielectric film capacitor 20.

The lower electrode 22 is made of a material containing platinum, preferably platinum, or a metal other than platinum and platinum (for example, at least one metal selected from ruthenium, rhodium, palladium, osmium and iridium). Made of alloy. The film thickness d (see FIG. 3 (f)) of the lower electrode 22 is 10 to 100 nm, more preferably 10 to 70 nm, and most preferably 10 to 50 nm. If the film thickness of the lower electrode 22 is smaller than 10 nm, the electrical resistance may be too high. On the other hand, if the film thickness is larger than 100 nm, the lower electrode 22 has a lower adhesiveness in terms of lowering the adhesion between the lower electrode 22 and the layer below it. It is not preferable because the surface roughness of the electrode 22 becomes large. The lower electrode 22 may be a single layer film or a laminated multilayer film.

In addition, the lower electrode 22 preferably has a sheet resistance of 0.1 to 3.0 Ω / □, and more preferably has a sheet resistance of 0.1 to 1.0 Ω / □. When the surface resistance of the lower electrode 22 exceeds 3.0 Ω / square, a capacitor having a large resistance loss is obtained.

In the oxide having the ABOx type crystal structure constituting the dielectric film 24, the metal type A may be at least one metal selected from Li, Na, Ca, Sr, Ba, and La, and the metal type B is Ti, At least one metal selected from Zr, Ta and Nb. For example, the dielectric film 24 may be made of [Pb (Zr, Ti) O ₃ ] (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT). have.

The upper electrode 26 may be formed of the above-described material as a material usable for the lower electrode 22, or may be formed of aluminum, silver, nickel, or the like. The upper electrode 26 may be a single layer film or may be a laminated multilayer film.

In this embodiment, the lower electrode 22 is provided on the insulating layer 12. The insulating layer 12 may be, for example, a silicon-based insulating layer. The silicon-based insulating layer is an insulating layer containing silicon, and the film thickness thereof is preferably 100 to 2000 nm, more preferably 100 to 500 nm. If the film thickness of the silicon-based insulating layer is less than 100 nm, the leakage current is large, and if the film thickness of the silicon-based insulating layer exceeds 2000 nm, the stress applied to the substrate is increased.

Further, the silicon-based insulating layer preferably has a volume resistivity of 10 ¹⁰ Ωcm or more, and more preferably has a volume resistivity of 10 ¹² Ωcm or more. If the volume resistivity of the silicon-based insulating layer is less than 10 ¹⁰ ? Cm, the leakage current increases.

As a silicon type insulating layer, a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon type low-k film are mentioned, for example. Although not shown, a contact layer may be provided below the lower electrode 22.

In the case where the insulating layer 12 is a silicon-based insulating layer, an intermediate layer (not shown) in which a metal and silicon are mixed may be formed between the silicon-based insulating layer and the lower electrode 22. The intermediate layer in which this metal and silicon are mixed is formed by reaction of the metal constituting the lower electrode 22 and the silicon atoms constituting the silicon-based insulating layer. By forming an intermediate layer in which a metal and silicon are mixed between the silicon-based insulating layer and the lower electrode 22, the adhesion between the lower electrode 22 and the silicon-based insulating layer can be improved.

For example, when the lower electrode 22 is made of a material containing platinum, an intermediate layer in which platinum and silicon are mixed is formed between the silicon-based insulating layer and the lower electrode 22. In particular, when the lower electrode 22 is made of a material containing platinum, the adhesion between the lower electrode 22 and the silicon-based insulating layer may deteriorate and the lower electrode 22 may be peeled off from the silicon-based insulating layer. In this case, according to the dielectric film capacitor 20 of the present embodiment, the electrode (lower electrode 22) composed of a silicon-based insulating layer (insulating layer 12) and a material containing platinum is composed of platinum and silicon. By arrange | positioning through the mixed intermediate | middle layer, adhesiveness between a silicon type insulating layer (insulating layer 12) and the lower electrode 22 can be made favorable.

According to the dielectric film capacitor of the present invention, by including a lower electrode having a film thickness of 10 to 100 nm made of a material containing platinum, the lower electrode 22 and a layer provided below the lower electrode 22 (Fig. In f), the adhesion of the insulating layer 12] is improved, the surface roughness of the lower electrode 22 is difficult to oxidize, and a thermally stable electrode structure can be provided, so that the yield is good and the characteristics are excellent. . Thereby, peeling of the lower electrode 22 can be prevented, for example, when patterning the dielectric film 24 and the upper electrode 26 formed on the lower electrode 22.

In particular, when the lower electrode 22 is made of a material containing platinum, and the layer provided under the lower electrode 22 is a silicon-based insulating layer, the adhesion between the lower electrode 22 and the silicon-based insulating layer can be satisfactorily improved. Peeling of the lower electrode 22 can be prevented.

In addition, since the surface roughness of the lower electrode 22 is good, the leakage current flowing through the dielectric thin film is reduced, and the reliability of the withstand voltage of the dielectric thin film is also improved.

2. 2. Method of manufacturing dielectric film capacitor

Next, referring to Figs. 3A to 3F, a method of manufacturing the dielectric film capacitor 20 of the present embodiment will be described. 3A to 3F are cross-sectional views schematically showing one manufacturing process of the dielectric film capacitor 20 of the first embodiment of the present invention.

The method of manufacturing the dielectric film capacitor 20 of the present embodiment includes the steps of (a) forming a lower electrode having a thickness of 10 to 100 nm made of a material containing platinum, and (b) on the lower electrode 22. A step of directly forming a dielectric film 24 containing an oxide having an ABOx type crystal structure, and (c) a step of forming an upper electrode 26 above the dielectric film 24.

Hereinafter, each manufacturing process of the dielectric film capacitor 20 of this embodiment is demonstrated.

2. 2. 1. Deposition of the lower electrode 22

First, as shown in Fig. 3A, a substrate 10 is prepared. The substrate 10 may be, for example, a semiconductor substrate such as a silicon substrate, an SOI substrate, a sapphire substrate, or a compound semiconductor substrate.

Next, as shown in FIG. 3B, an insulating layer 12 is formed on the substrate 10. As the material of the insulating layer 12, those exemplified in the section of the "dielectric film capacitor" can be used. In addition, the insulating layer 12 can be formed using a well-known method (for example, CVD method, thermal oxidation method, and spin coat method).

Subsequently, as shown in Fig. 3C, a lower electrode 22 having a film thickness of 10 to 100 nm made of a material containing platinum is formed on the insulating layer 12. Figs. Although the deposition method of the lower electrode 22 is not specifically limited, For example, it can form using the spatter method.

2. 2. 2. Formation of Dielectric Film 24a

Subsequently, as shown in FIG. 3D, the dielectric film 24a is directly formed on the lower electrode 22. As shown in FIG. This dielectric film 24a is patterned by a process described later to form a dielectric film 24 of a predetermined pattern (see Fig. 3 (f)). The dielectric film 24a can be formed by, for example, sputtering, CVD (chemical vapor deposition), MBE (molecular beam epitaxy), sol-gel, MOD (organic metal decomposition), or the like. In addition, it is preferable to form the dielectric film 24a by a liquid phase method that does not require an expensive device from the viewpoint of manufacturing cost, ease of composition control and shape provision. In the case of forming the dielectric film 24a by the liquid phase method, the dielectric film 24a can be formed by applying the composition for forming a dielectric film.

The composition for forming a dielectric film of the present embodiment is a group of (i) particles having an ABOx type crystal structure, (ii) metal alkoxides, metal carboxylates, metal complexes and metal hydroxides containing metal type A and metal type B. It may be a composition comprising (i) and (ii) or one of the at least one component selected from (i) and an organic solvent.

The concentration of the oxide particles of the (i) ABOx type crystal structure contained in the dielectric film-forming composition of the present embodiment is 20 to 3% by weight, preferably 15 to 5% by weight.

Here, specific examples of the metal type A and the metal type B are as described in the section of the above-mentioned "dielectric film capacitor".

Examples of the (i) organic solvent included in the dielectric-forming composition of the present embodiment include alcohol solvents, polyhydric alcohol solvents, ethyl solvents, ketone solvents, ester solvents, and the like. .

The dielectric film 24a can be obtained by apply | coating the composition for dielectric film formation of this embodiment on the lower electrode 22, forming a coating film, and drying this coating film as needed, preferably by heating and baking. .

As a coating method of the composition for dielectric film formation of this embodiment, for example, the open spin coating method, the closed spin coating method, the LSM-CVD method (solution vaporization chemical vapor deposition method) of misting coating, the dipping method, the spray method, Known coating methods such as a roll coating method, a printing method, an inkjet method, and an electrophoretic electrodeposition method can be used.

Drying of a coating film is normally performed at 50-300 degreeC, Preferably it is 100-250 degreeC. In addition, the dielectric film 24a finally obtained can be set to a desired film thickness by repeating the application of the composition for forming a dielectric film and a series of operations until drying several times as necessary. Thereafter, the coating film is usually heated to a temperature of 300 to 900 ° C, preferably 400 to 750 ° C, and baked to obtain the dielectric film 24a.

2. 2. 3. Formation of the upper electrode 26a, and formation of the dielectric film 24 and the upper electrode 26

Next, as shown in Fig. 3E, an upper electrode 26a is formed on the dielectric film 24a. The method of forming the upper electrode 26a is not particularly limited as long as it does not impart insignificant damage to the dielectric film 24a. For example, a vapor deposition method or a sputtering method can be used.

Subsequently, as shown in Fig. 3E, the resist layer R is formed on the upper electrode 26a by, for example, a photolithographic method. In the present embodiment, the resist R has a planar shape and a size corresponding to the planar patterns of the desired dielectric film 24 and the upper electrode 26. The dielectric film 24a and the upper electrode 26a are patterned using this resist R as a mask. As a result, the dielectric film 24 and the upper electrode 26 are formed (see FIG. 3 (f)). As shown in Fig. 3F, the end faces of the dielectric film 24 and the upper electrode 26 coincide with each other.

Here, for the patterning of the dielectric film 24a and the upper electrode 26a, a known method such as wet etching or dry etching can be used.

By the above process, the dielectric film capacitor 20 of the present embodiment can be obtained (see FIG. 3 (f)).

3. Electronic circuit components

The electronic circuit component of this embodiment includes the dielectric film capacitor 20 of the said 1st or 2nd embodiment. Although the use of the electronic circuit component of this embodiment is not specifically limited, It can be used for electronic devices, such as a mobile communication terminal (for example, a mobile telephone), an information processing apparatus, an amusement apparatus.

4. Examples

Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not limited to this Example.

4. 1. First embodiment

4. 1. 1. Preparation of dielectric film forming composition

First, the composition for dielectric film formation used also for forming the dielectric film capacitor of this embodiment was prepared.

In ethylene glycol monomethyl ether _{609.04g, Ti (OCH (CH 3} ) 2) was added to 113.71g _4, and the mixture was stirred at 25 ℃ 30 minutes. Thereafter, 77.33 g of Ba (OH) ₂ .H ₂ O was added to dissolve it and heated at 80 ° C. for 2 hours. Thereafter, the insoluble content was removed by filtration with a Teflon (registered trademark) filter having a pore diameter of 0.2 µm.

620.00 g of the reaction solution was cooled to 0 deg. C, 167.40 g of water equivalent to 30 times the molar amount of Ba was added, and vigorously stirred to obtain a hydrolysis and a condensate. Thereafter, the resulting hydrolysis and condensate was left to crystallize at 60 DEG C for 3 hours.

After crystallization, the crystal particles and the supernatant solution were separated by decantation, 600 g of ethylene glycol monomethyl ether was added, and the mixture was left at 60 ° C and left for 3 hours. This operation was repeated four times.

After separating the crystal particles and the supernatant solution, BaTiO ₃ Ethylene glycol monomethyl ether was added so that solid content concentration in the case of conversion may be 10 weight%, and 0.1 weight of polyoxypropylene polyoxyethylene condensate of ethylenediamine is added with respect to particle weight 100 as a dispersing agent, and a crystal grain is carried out by an ultrasonic disperser. Was dispersed. Thus, the dielectric film formation composition (1) which concerns on this Example containing the ABOx type crystal structure which is (i) component was obtained.

The particle size distribution of the particles having the ABOx-type crystal structure contained in the dielectric film-forming composition (1) thus obtained was manufactured by a dynamic light scattering particle size distribution measuring device [model name "LB-500", manufactured by Horiba Seisakusho Co., Ltd. 5 shows the results measured by the dynamic scattering method. 5, it can be seen that the particles contained in this particle dispersion have a particle distribution (average particle diameter of about 40 nm) mainly composed of 40 nm.

In addition, the composition 1 for forming a dielectric film could be easily filtered through a filter having a pore diameter of 200 nm to remove coarse particles.

In addition, the crystal structure of the particle | grains (component (i)) which has the ABOx type crystal structure of this Example was confirmed by X-ray analysis. The X-ray diffraction chart which measured the particle | grain dispersion liquid which has the ABOx type crystal structure obtained in this way to the glass plate, and dried at room temperature with the X-ray-diffraction apparatus (model name "MXP18A", the make of McScience Co., Ltd.) is shown in FIG. Indicates. According to Fig. 6, it can be judged that the particles in the dielectric film-forming composition 1 having the ABOx type crystal structure have the ABOx type crystal structure of the BaTiO ₃ composite oxide.

4. 1. 2. Formation of Dielectric Film Capacitor 20

4. 1.2a. Formation of the lower electrode 22

First, as shown in Fig. 1A, a substrate 10 made of unitary window silicon is prepared. Next, as shown in Fig. 1B, an insulating layer (silicon oxide layer) 12 having a thickness of 0.1 mu m is formed on the substrate 10 by thermal oxidation.

Subsequently, as shown in Fig. 1C, a resist pattern is formed on the insulating layer 12, and a Pt film having a film thickness of 30 nm is formed on the insulating layer 12 by a sputtering method, and then the resist pattern is dissolved and removed. Thus, the lower electrode 22 made of Pt was formed.

In the present embodiment, the planar area [part (Y ₁ ) of the lower electrode 22 with respect to the area of the formation region X of the dielectric film 24. To Y ₁₂ ) of the total planar area] was 50% (see FIG. 2).

4. 1.2b. Formation of Dielectric Film 24

Subsequently, a dielectric film 24a was formed on the lower electrode 22 as shown in Fig. 1D. In this embodiment, an example is described in which the dielectric film 24a is formed by the liquid phase method.

The composition 1 for forming a dielectric film was formed on the lower electrode 22 made of Pt having a film thickness of 50 nm having good adhesion and good surface roughness for 5 seconds at 300 rpm using a spin coater, followed by 15 at 3000 rpm. After rotation coating for a second to form a coating film, the coating film was dried at 250 ° C. for 1 minute, and then the coating film was heated and baked at 750 ° C. for 60 minutes. This operation was performed twice to produce a dielectric film 24a having a film thickness of 242 nm.

4. 1.2c. Formation of the Upper Electrode 26

Subsequently, as shown in Fig. 1E, a conductive layer (Ni film) 26a having a thickness of 50 nm was formed on the dielectric film 24a by the spatter method. Subsequently, the resist layer R was formed on the conductive layer 26a by the photolithographic method. The resist layer R has a planar shape and a planar area corresponding to the dielectric film 24 to be formed. Thereafter, the dielectric film 24a and the conductive layer 26a are wet-etched together using the resist R as a mask, thereby forming the dielectric film 24 and having a planar area of 100 mm 2 and a film thickness of 200 nm. The upper electrode 26 was formed (see FIG. 1 (f)). Through the above steps, the dielectric film capacitor 20 of this embodiment was obtained.

4. 1. 3. Evaluation of Electrical Characteristics of the Dielectric Film Capacitor 20

The dielectric constant, dielectric loss, and leakage current of the dielectric film capacitor 20 obtained in this example were measured. The relative dielectric constant and dielectric loss were measured using a precision LCR meter HP4284A (manufactured by Yokogawa Hewlett Packard Co., Ltd.), and the leakage current was measured by an electrometer 6517A (manufactured by Case-Instrument Co., Ltd.). As a result, the dielectric constant was 183 and the dielectric loss was 0.04 at a measurement frequency of 100 Hz, and the leakage current was 1.10 × 10 ⁻⁷ (A / cm 2) at 0.2 MV / cm.

As apparent from the measurement results, the dielectric film 24a is formed by applying the composition for forming a dielectric film on the lower electrode 22 made of Pt, and then the conductive layer 26a is formed on the dielectric film 24a. After forming the dielectric film 24 and the conductive layer 26a by wet etching to form the dielectric film 24 and the upper electrode 26, the dielectric film capacitor 20 showing good electrical characteristics is formed. Could write

4. 2. First Comparative Example

In the manufacturing process of the dielectric film capacitor of the first embodiment, the lower electrode made of Pt was formed without patterning. That is, the lower electrode of this comparative example does not have an opening, and has the same planar shape and size as the dielectric film 24 and the upper electrode 26. Subsequently, a dielectric film 2a was formed on this lower electrode as in the above embodiment. Subsequently, after the conductive layer 26a was formed, the dielectric film 24 and the conductive layer 26a were patterned by wet etching. As a result, the lower electrodes were peeled off, and a dielectric film capacitor could not be produced.

According to this comparative example, since the lower electrode does not have an opening (in this case, the ratio of the planar area of the lower electrode 22 to the area of the formation region of the dielectric film 24a is approximately 100%), Since the adhesiveness of the lower layer deteriorates, it is inferred that the lower electrode was peeled off.

4. 3. Second embodiment

4. 3. 1. Preparation of dielectric film forming composition

In this embodiment, the composition for forming a dielectric film prepared in the first embodiment was used.

4. 3. 2. Formation of Dielectric Film Capacitor 20

4. 3. 2a. Formation of the lower electrode 22

First, as shown in Fig. 3A, a substrate 10 made of single crystal silicon is prepared. Next, as shown in FIG. 3B, an insulating layer (silicon oxide layer) 12 having a thickness of 0.1 μm is formed on the substrate 10 by thermal oxidation.

Subsequently, as shown in Fig. 3C, a resist pattern is formed on the insulating layer 12, and a Pt film having a film thickness of 30 nm is formed by a spatter method, and then the resist pattern is dissolved and removed to form Pt. A lower electrode 22 was formed.

4. 3. 2b. Formation of Dielectric Film 24a

Subsequently, a dielectric film 24a was formed on the lower electrode 22 as shown in Fig. 3D. In this embodiment, an example is described in which the dielectric film 24a is formed by the liquid phase method.

The composition 1 for forming a dielectric film was formed on the lower electrode 22 made of Pt having a good thickness and a good surface roughness of 30 nm with a spin coater at 300 rpm for 5 seconds, and then continued at 3000 rpm. After the coating was spun for 15 seconds to form a coating film, the coating film was dried at 250 ° C. for 1 minute, and then the coating film was heated and baked at 750 ° C. for 60 minutes. This operation was performed twice to prepare a dielectric film 24a having a film thickness of 195 nm.

4. 3. 2c. Formation of the upper electrode 26a and formation of the dielectric film 24 and the upper electrode 26

Subsequently, as shown in Fig. 3E, an upper electrode (Al film) 26a having a thickness of 200 nm was formed on the dielectric film 24a by the spatter method. Subsequently, the resist layer R was formed on the upper electrode 26a by the photolithographic method. The resist R was wet-etched together with the dielectric film 24a and the upper electrode 26a as a mask, thereby forming a dielectric film 24 and an upper electrode 26 having a plane area of 0.5 mm in diameter (Fig. 3). (f)]. Through the above steps, the dielectric film capacitor 20 of this embodiment was obtained.

4. 3. 3. Evaluation of Electrical Characteristics of the Dielectric Film Capacitor 20

The dielectric constant, dielectric loss and leakage current of the dielectric film capacitor 20 obtained in this example were measured. The relative dielectric constant and dielectric loss were measured using a precision LCR meter HP4284A (manufactured by Yokogawa Hewlett Packard Co., Ltd.), and the leak current was measured by an electrometer 6517A (manufactured by Case Instruments Co., Ltd.). As a result, the dielectric constant was 195 and the dielectric loss was 0.04 at the measurement frequency of 100 Hz, and the leakage current was 2.70 × 10 ⁻⁷ (A / cm 2) at 0.2 MV / cm.

As apparent from the measurement results, the dielectric film 24a is formed by applying the composition for forming a dielectric film on the lower electrode 22 made of Pt, and then the upper electrode 26a is formed on the dielectric film 24a. And then pattern the dielectric film 24a and the upper electrode 26a by wet etching to form the dielectric film 24 and the upper electrode 26, thereby showing the dielectric film capacitor 20 showing good electrical characteristics. Could write

4. 4. Second comparative example

In the manufacturing process of the dielectric capacitor of the second embodiment, except that the thickness of the lower electrode 22 is 300 nm, the dielectric of the second comparative example is produced by the same manufacturing process as the manufacturing process of the dielectric capacitor of the second embodiment. An attempt was made to build a capacitor. However, as shown in Table 1 and FIG. 4, in the second comparative example, when the lower electrode 22 was baked at 750 ° C. for 60 minutes, the lower electrode 22 was peeled off, which did not reach completion of the dielectric capacitor. As a cause, in the lower electrode 22 which has a film thickness of 300 nm of a 2nd comparative example, since the adhesiveness of the lower electrode 22 and the lower layer deteriorates, it is inferred that the lower electrode 22 peeled.

Further, in the lower electrode 22 having the film thickness of 300 nm of the second comparative example, the surface roughness was too large in any of the cases of annealing temperatures of 600 ° C, 750 ° C, and 900 ° C, which was not suitable as the lower electrode of the dielectric capacitor.

4. 5. Third embodiment

In the same manner as in the second embodiment, the lower electrode 22 (platinum film) having a different film thickness was formed. The lower electrode 22 was annealed, and it was examined whether the adhesion changed due to the difference in temperature (annealing temperature) at the time of annealing. The results are shown in Table 1. The adhesiveness of the lower electrode 22 was evaluated by the checkerboard tape peeling test.

Here, the temperature of annealing corresponds to the baking temperature at the time of forming the dielectric film 24a formed on the lower electrode 22. That is, in the third embodiment, the effect (the surface roughness here) of the firing temperature of the dielectric film 24a on the lower electrode 22 was investigated.

In Table 1, evaluation result "A" and "B" are as follows.

A: no peeling off of the lower electrode 22

B: there is peeling of the lower electrode 22

Table 1

Electrode film thickness [nm] Adhesion layer Adhesion (annealing temperature) Room temperature 600 ℃ 750 ℃ 900 ℃ Experimental Example 70 none A A A A Experimental Example 2 50 none A A A A Experimental Example 3 30 none A A A A 2nd comparative example 300 none A B B B Third Comparative Example 200 Ti film (100 nm) A A A B

In addition, the surface roughness of the lower electrode 22 was examined using an Alpha-Step IQ SURFACE PROFILER (manufactured by KLA TENCOR). The results are shown in FIG. In Fig. 4, the plots of 300 nm, 70 nm, 50 nm and 30 nm correspond to the second comparative example and the first to third test examples in Table 1, respectively. In Table 1, in the third comparative example, a Ti film 100 nm was formed as an adhesion layer between the lower electrode 22 and the insulating layer 12, and the lower electrode 22 having a thickness of 200 nm was formed on the adhesion layer. ), The result of evaluation of adhesion is shown.

From the results in Table 1 and Fig. 4, since the lower electrode 22 having a thickness of 100 nm or less (particularly, 70 nm or less of film thickness) has excellent adhesion and good surface roughness, the lower electrode 22 of the dielectric capacitor is used. It is obvious that it is suitable as.

In addition, from the result of the third comparative example, when the adhesion layer (Ti film) was formed between the lower electrode 22 and the insulating layer 12, the lower electrode 22 was peeled off when the annealing temperature was 900 ° C. . That is, when the adhesion layer was formed, it was found that the adhesion decreased when the annealing temperature was increased. On the other hand, in the first to third test examples, the adhesion layer is not formed between the lower electrode 22 and the insulating layer 12, and the annealing temperature is because the film thickness of the lower electrode 22 is 10 to 100 nm. It is clear that even if the value is high, the adhesion between the lower electrode 22 and the insulating layer 12 can be maintained.

As mentioned above, although embodiment of this invention was described in detail, it will be easily understood by those skilled in the art that many deformation | transformation are possible, without deviating substantially from the novelty and effect of this invention. Accordingly, all such modifications are intended to be included within the scope of this invention.

According to the present invention, it is possible to improve the adhesion between the lower electrode and the layer provided under the lower electrode, thereby providing an electrode structure that is difficult to oxidize and thermally stable, and has a high yield and excellent characteristics, and a dielectric film capacitor thereof A manufacturing method can be provided.

In addition, an electronic circuit component including the dielectric film capacitor may be provided.

Claims (24)

A lower electrode having an opening and made of a material containing platinum, A dielectric film comprising an oxide having an ABOx type crystal structure provided above the lower electrode; An upper electrode provided above the dielectric film, The dielectric film capacitor having a ratio of the planar area of the lower electrode to 50% or more of the area of the dielectric film formation region. The oxide having the ABOx type crystal structure, wherein the metal species A are at least one metal selected from Li, Na, Ca, Sr, Ba, and La, and the metal species B are Ti, Zr, A dielectric film capacitor, which is at least one metal selected from Ta and Nb. The dielectric film capacitor of claim 1, wherein the lower electrode is provided on a silicon-based insulating layer. The dielectric film capacitor of claim 3, wherein the silicon-based insulating layer has a thickness of 100 to 2000 nm. The dielectric film capacitor of claim 3, wherein the silicon-based insulating layer has a volume resistivity of 10 ¹⁰ Ωcm or more. The dielectric film capacitor of claim 3, wherein an intermediate layer in which metal and silicon are mixed is formed between the silicon-based insulating layer and the lower electrode. 4. The dielectric film capacitor of claim 3, wherein the silicon-based insulating layer is a silicon oxide layer. (a) a step of forming a lower electrode having an opening and made of a material containing platinum; (b) directly forming a dielectric film comprising an oxide having an ABOx type crystal structure on the lower electrode; (c) forming an upper electrode above the dielectric film, And said step (a) comprises the step of patterning said lower electrode such that the ratio of the planar area of said lower electrode to the area of the formation region of said dielectric film is 50% or more. The method of manufacturing a dielectric film capacitor according to claim 8, wherein the step (b) includes a step of forming the dielectric film by applying a composition for forming a dielectric film. 10. The composition for forming a dielectric film of claim 9, wherein the composition for forming a dielectric film comprises (i) particles having an ABOx type crystal structure, (ii) metal alkoxides, metal carboxylates, metal complexes and metal hydroxides comprising metal type A and metal type B. (I) and (ii) or any one of (i) an organic solvent among at least one component selected from the group of The metal species A is at least one metal selected from Li, Na, Ca, Sr, Ba and La, And the metal species B is at least one metal selected from Ti, Zr, Ta, and Nb. The method of manufacturing a dielectric film capacitor according to claim 8, wherein the step (a) includes a step of forming the lower electrode by patterning using a lift-off method or an ion milling method. An electronic circuit component comprising the dielectric film capacitor according to any one of claims 1 to 7. A lower electrode having a thickness of 10 to 100 nm made of a material containing platinum, A dielectric film comprising an oxide having an ABOx type crystal structure provided above the lower electrode; A dielectric film capacitor comprising an upper electrode provided above the dielectric film. The dielectric film capacitor of claim 13, wherein the lower electrode has a sheet resistance of 0.1 to 3.0 mA / square. The oxide having the ABOx type crystal structure, wherein the metal species A are at least one metal selected from Li, Na, Ca, Sr, Ba, and La, and the metal species B are Ti, Zr, A dielectric film capacitor, which is at least one metal selected from Ta and Nb. The dielectric film capacitor of claim 13, wherein the lower electrode is provided on a silicon-based insulating layer. The dielectric film capacitor according to claim 16, wherein the thickness of the silicon-based insulating layer is 100 to 2000 nm. The dielectric film capacitor of claim 16, wherein the silicon-based insulating layer has a volume resistivity of 10 ¹⁰ Ωcm or more. The dielectric film capacitor of claim 16, wherein an intermediate layer in which metal and silicon are mixed is formed between the silicon-based insulating layer and the upper electrode. The dielectric film capacitor according to claim 16, wherein said silicon-based insulating layer is a silicon oxide layer. (a) forming a lower electrode having a thickness of 10 to 100 nm made of a material containing platinum, (b) directly forming a dielectric film comprising an oxide having an ABOx type crystal structure on the lower electrode; (c) A method of manufacturing a dielectric film capacitor, comprising the step of forming an upper electrode above the dielectric film. The method of manufacturing a dielectric film capacitor according to claim 21, wherein said step (b) includes a step of forming said dielectric film by applying a composition for forming a dielectric film. 23. The composition for forming a dielectric film of claim 22, wherein the composition for forming a dielectric film comprises (i) particles having an ABOx type crystal structure, (ii) metal alkoxides, metal carboxylates, metal complexes and metal hydroxides comprising metal type A and metal type B. (I) and (ii) or any one of (i) an organic solvent among at least one component selected from the group of The metal species A is at least one metal selected from Li, Na, Ca, Sr, Ba and La, And the metal species B is at least one metal selected from Ti, Zr, Ta, and Nb. An electronic circuit component comprising the dielectric film capacitor according to any one of claims 13 to 20.

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