KR20070023359A - Display apparatus - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, comprising: an insulating substrate, a plurality of gate lines and data lines formed on the substrate and insulated from each other, and driven on the plurality of gate lines and data lines. A terminal portion formed on the substrate for applying a signal and having a plurality of terminals arranged in multiple layers, and a driving integrated circuit chip (IC) mounted on the terminal portion.

Display Device, Drive Integrated Circuit Chip, Terminals, Multilayer Array

Description

Display device {DISPLAY APPARATUS}

1 is a schematic plan view of a substrate used in a display device according to an exemplary embodiment of the present invention.

2 is a plan view illustrating an arrangement of terminals of FIG. 1.

3 is a cross-sectional view taken along line III-III of FIG. 2.

* Explanation of symbols for the main parts of the drawings

100: substrate 101: display area

102: non-display area 110: thin film transistor

121: gate line 161: data line

180 pixel electrode 500 terminal portion

501: first terminal 502: second terminal

510: insulating film 520: protective film

531: first pad 532: second pad

540: anisotropic conductive adhesive resin 600: driving integrated circuit chip

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device in which an effective display area is improved in comparison with the size of a display panel.

The display device refers to a device for receiving an image signal information from the outside to form an image. BACKGROUND ART With the recent rapid development of semiconductor technology, display devices have become smaller and lighter, and the demand for such display devices has exploded. In general, the type of flat panel display panel used in a small and lightweight display device includes a field emission display device (FED), a vacuum fluorescence display (VFD), and a liquid crystal display panel (LCD). ), An organic light emitting display (OLED), and a plasma display panel (PDP). Although the detailed structure of the display panel varies depending on the type, the display panel generally includes a pair of substrates installed to face each other, and the inside of the display panel is maintained at a high vacuum.

Among them, liquid crystal displays (LCDs) using liquid crystal display panels, which have recently been in the spotlight, have advantages such as miniaturization, light weight, and low power consumption, and are currently installed in almost all information processing devices requiring display devices. It is used.

The display device basically has a display panel for displaying an image and a driving circuit board for controlling the display panel. Here, a driving integrated circuit chip is mounted at an edge of the display panel to transmit a driving signal supplied from the driving circuit board to the display panel. In this way, the driving integrated circuit chip is directly mounted on the substrate constituting the display panel is referred to as chip on glass (COG). The driving integrated circuit chip is mounted by bump bonding to be in contact with the terminal portion formed on the substrate.

However, as the image quality of the display device is improved, the number of pixels is greatly increased. In order to operate the increased pixels well, the size and number of driving integrated circuit chips are correspondingly increased. Accordingly, the area occupied by the terminal formed on the substrate in order to contact the driving integrated circuit chip is also increased, thereby reducing the display area in comparison with the overall size of the substrate.

In addition, even when a highly integrated driving integrated circuit chip is used, it is not easy to reduce the area occupied by the terminal unit to be connected thereto.

Accordingly, an aspect of the present invention is to provide a display device which minimizes an area occupied by a terminal by arranging terminals to enable high-density mounting of a driving integrated circuit chip on a substrate.

According to an exemplary embodiment, a display device includes an insulating substrate, a plurality of gate lines and data lines formed on the substrate, and insulated and intersecting with each other, and a driving signal to the plurality of gate lines and data lines. It includes a terminal portion formed on the substrate for applying a plurality of terminals arranged in a plurality of layers, and a driving integrated circuit chip (IC) mounted on the terminal portion.

The terminal portion includes a plurality of first terminals formed on the substrate, an insulating film covering the plurality of first terminals, a plurality of second terminals formed on the insulating film, a protective film covering the plurality of second terminals, and the plurality of first terminals. It is preferable to include a plurality of first pads for connecting with the driving integrated circuit chip, and a plurality of second pads for connecting the plurality of second terminals with the driving integrated circuit chip.

Here, a plurality of first contact holes formed in the insulating film and the passivation layer to partially expose the plurality of first terminals, and a second contact formed in the passivation layer to partially expose the plurality of second terminals, respectively. Preferably, the first pad is in contact with the first terminal through the first contact hole, and the second pad is in contact with the second terminal through the second contact hole.

Preferably, the plurality of first pads and the plurality of second pads are formed on substantially the same plane.

The display device according to the present invention preferably further includes a first connection line and a second connection line for connecting the first terminal and the second terminal to the gate line or the data line, respectively.

It is preferable that the display device according to the present invention further include an anisotropic conductive adhesive resin coated on the first pad and the second pad.

It is preferable that the said anisotropic electrically conductive adhesive resin contains many conductive balls.

Preferably, the driving integrated circuit chip has a plurality of bumps to be connected to the terminal portion.

The display device according to the present invention preferably further includes a thin film transistor (TFT) connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor.

Thus, by arranging the terminals so that the driving integrated circuit chip can be densely mounted on the substrate, the area occupied by the terminal can be minimized.

Hereinafter, a display device according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings. In the accompanying drawings, the display device substrate 100 in which the driving integrated circuit chip 600 is directly mounted is schematically illustrated. Such a display device substrate is commonly used as a thin film transistor substrate of a liquid crystal display device. In order to clearly describe the present invention, parts irrelevant to the description are omitted, and like reference numerals designate like elements throughout the specification. One embodiment according to the present invention is only for illustrating the present invention, the present invention is not limited thereto.

As shown in FIG. 1, a display device according to an exemplary embodiment of the present invention includes a substrate 100, a plurality of gate lines 121 formed in the display area 101 on the substrate 100 and insulated from each other. A plurality of terminals 501 and 502 are formed in the non-display area 102 on the substrate 100 to apply driving signals to the data line 161, the plurality of gate lines 121, and the data lines 161. The terminal unit 500 is arranged in multiple layers and the driving integrated circuit chip 600 mounted on the terminal unit 500. A thin film transistor (TFT) 110 formed at the intersection of the gate line 121 and the data line 161 and connected thereto, the pixel electrode 180 connected to the thin film transistor 110, The display device may further include a connection line 550 connecting the gate line 121, the data line 161, and the terminal unit 500. Here, the substrate 100 may be made of an insulating material such as glass, quartz, ceramic, or plastic, and the pixel electrode 180 may be made of transparent indium tin oxide (ITO) as a conductive material.

The driving integrated circuit chip 600 has a plurality of bumps 610 (refer to reference numeral 610 shown in FIG. 3) for connecting to the terminal unit 500 and mounted directly on the substrate 100 on which the terminal unit 500 is located. It is connected to a printed circuit board (PCB) (not shown) through a flexible printed circuit board (FPCB) (not shown) to receive an image signal from the outside. Therefore, in addition to the terminal unit 500 for connecting with the driving integrated circuit chip 600, additional terminals for connecting with the flexible circuit layer may be further formed on the substrate 100.

In the thin film transistor, a source electrode is connected to the data line 161, a gate electrode is connected to the gate line 121, and a drain electrode is connected to the pixel electrode 180. Accordingly, the driving signal received from the driving integrated circuit chip 600 through the terminal unit 500 is transmitted to the gate line 121 and the data line 161 and input to the gate electrode and the source electrode of the thin film transistor 110. In response to these driving signals, the thin film transistor 110 switches the pixel electrode 180 by turning on or off an electrical signal necessary for pixel formation through the drain electrode.

2 shows an arrangement structure of the terminal part 500. The terminal unit 500 will be described in detail with reference to FIG. 2.

As shown in FIG. 2, the terminal part 500 may include first terminals 501 located at an outer side, second terminals 502 located inside the first terminals 501, and first terminals 501. First pads 531 contacted through first contact holes 521, and second pads 532 contacted through second terminals 502 and second contact holes 522. do. The connection wiring is divided into a first connection wiring 551 connected to the first terminal 501 and a second connection wiring 552 connected to the second terminal 502. Here, the first pad 531 and the second pad 532 are formed on substantially the same plane, and the first terminal 501 and the first connection wire 551 and the second terminal 502 connected thereto and the same. The connected second connection wires 552 are formed on different planes, that is, different layers.

In the present embodiment, the terminal portion 500 is formed in a double layer structure having a plurality of terminals 501 and 502 arranged in two rows in two different layers, but this is merely to illustrate the present invention, and the present invention It is not limited to this. Therefore, the terminal unit 500 may be formed in a multilayer structure having a plurality of terminals arranged in three or more rows in three or more different layers.

As such, the first terminals 501 arranged in the terminal unit 500, the first pads 531 and second terminals 502 and the second pads 532 contacted with each other contact each other. By densely spaced at a minimum interval so as not to be, the area occupied by the terminal unit 500 for mounting the driving integrated circuit chip 600 may be minimized. That is, the highly integrated high density mounting of the driving integrated circuit chip 600 can be performed. Therefore, the size of the display area that can be secured to the maximum on the substrate 100 can be increased.

3 shows a cross section of the terminal portion 500. A stacking structure of the terminal unit 500 will be described in detail with reference to FIG. 3.

As shown in FIG. 3, the terminal part 500 includes a first terminal 501 formed on the substrate 100, an insulating film 510 covering the first terminal 501, and a second terminal 502 formed on the insulating film 510. ), A passivation layer 520 covering the second terminal 502, a first pad 531 in contact with the first terminal 501, and a second pad 502 in contact with the second terminal 502. . Here, a first contact hole 521 is formed in the passivation layer to partially expose the first terminal 501, and a second contact hole is formed in the insulating film 510 and the passivation layer 520 so as to partially expose the second terminal 502. 522 is formed. Accordingly, the first pad 531 contacts the first terminal 501 through the first contact hole 521, and the second pad 532 contacts the second terminal 502 through the second contact hole 521. Contact. Accordingly, the first pad 531 and the second pad 532 are formed on the passivation layer 520 that is substantially the same plane.

The anisotropic conductive adhesive resin 540 is coated on the first pad 531 and the second pad 532, and the anisotropic conductive adhesive resin 540 includes a plurality of conductive balls 541 therein. When the bumps 610 of the driving integrated circuit chip 600 are aligned to correspond to the first pad 531 and the second pad 532 and then compressed, the bumps 610 and the first pad 531 and the first pad 610 may be pressed. As the conductive balls 541 are compressed between the two pads 532, the bumps 610, the first pad 531, and the second pad 532 are electrically contacted with each other. Therefore, the driving integrated circuit chip 600 and the terminal portion 500 are connected.

Although not illustrated, the first connection line 551 or the second connection line 552 may be connected to the gate line 121 or the data line 161 formed on another layer. In this case, the first connection wiring 551 through a method such as an ITO bridge in the non-display area 102 having a relatively free space between the gate line 121 or the data line 161 to be connected to the terminal unit 500. ) May be moved to the same layer as the gate line 121 or the data line 161 to be connected.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications or changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. It goes without saying that it belongs to the scope of the present invention.

As described above, the display device according to the present invention can minimize the area occupied by the terminal by arranging the terminals so that the driving integrated circuit chip can be densely mounted on the substrate. Therefore, the size of the display area on the substrate can be increased as much as possible.

Claims (9)

Insulating substrates; A plurality of gate lines and data lines formed on the substrate and intersecting with each other; A terminal portion formed on the substrate for applying driving signals to the plurality of gate lines and data lines, the plurality of terminals being arranged in multiple layers; And And a driving integrated circuit chip (IC) mounted on the terminal unit. The method of claim 1, The terminal portion includes a plurality of first terminals formed on the substrate, an insulating film covering the plurality of first terminals, a plurality of second terminals formed on the insulating film, a protective film covering the plurality of second terminals, and the plurality of first terminals. And a plurality of first pads for connecting with the driving integrated circuit chip, and a plurality of second pads for connecting the plurality of second terminals with the driving integrated circuit chip. The method of claim 2, A plurality of first contact holes formed in the insulating layer and the passivation layer to partially expose the plurality of first terminals, and a second contact hole formed in the passivation layer to partially expose the plurality of second terminals, respectively. Has, The first pad contacts the first terminal through the first contact hole, and the second pad contacts the second terminal through the second contact hole. The method of claim 2, And the plurality of first pads and the plurality of second pads are formed on substantially the same plane. The method of claim 2, And a first connection line and a second connection line for connecting the first terminal and the second terminal to the gate line or the data line, respectively. The method of claim 2, And anisotropic conductive adhesive resin coated on the first pad and the second pad. The method of claim 6, The anisotropic conductive adhesive resin includes a plurality of conductive balls. The method of claim 1, The driving integrated circuit chip has a plurality of bumps to be connected to the terminal unit. The method of claim 1, And a thin film transistor (TFT) connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor.

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