KR20070002886A - Wafer reclamation method - Google Patents
Wafer reclamation method Download PDFInfo
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- KR20070002886A KR20070002886A KR1020050058584A KR20050058584A KR20070002886A KR 20070002886 A KR20070002886 A KR 20070002886A KR 1020050058584 A KR1020050058584 A KR 1020050058584A KR 20050058584 A KR20050058584 A KR 20050058584A KR 20070002886 A KR20070002886 A KR 20070002886A
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- wafer
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- cop
- furnace
- rapid thermal
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 238000010438 heat treatment Methods 0.000 claims abstract description 30
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000001301 oxygen Substances 0.000 claims abstract description 20
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 20
- 239000002244 precipitate Substances 0.000 claims abstract description 18
- 239000013078 crystal Substances 0.000 claims abstract description 11
- 239000002245 particle Substances 0.000 claims abstract description 8
- 238000004140 cleaning Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 6
- 235000012431 wafers Nutrition 0.000 claims description 43
- 238000011069 regeneration method Methods 0.000 claims description 13
- 238000012545 processing Methods 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 4
- 238000007517 polishing process Methods 0.000 abstract description 2
- 238000004064 recycling Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 description 7
- 230000008929 regeneration Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
도 1은 본 발명에 따른 웨이퍼 재생 방법을 설명하기 위한 플로우 챠트.1 is a flow chart for explaining a wafer regeneration method according to the present invention.
* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
S1 : 막 제거 공정 S2 : 식각 공정S1: film removal process S2: etching process
S3 : 연마 공정 S4 : 세정 공정S3: Polishing Process S4: Cleaning Process
S5 : COP 제거 공정 S6 : 산소석출물 제거 공정S5: COP removal step S6: Oxygen precipitate removal step
본 발명은 웨이퍼 재생 방법에 관한 것으로, 보다 상세하게는, 소자 공정이 진행된 웨이퍼에서의 COP(Crystal Originated Particle) 및 산소석출물(Oxygen precipitate)를 제거하기 위한 방법에 관한 것이다. The present invention relates to a wafer regeneration method, and more particularly, to a method for removing COP (Crystal Originated Particle) and Oxygen precipitate (Oxygen precipitate) in the wafer subjected to the device process.
주지된 바와 같이, 지금까지는 소자 공정이 진행된 웨이퍼에 대해서 막 제거(film stipping), 식각(etching), 연마(polishing) 및 세정(cleaning) 등의 일련의 공정들을 순차적으로 진행해서 일정 품질 이상의 웨이퍼를 재생하고 있다. As is well known, up to now, wafers having a device process are sequentially subjected to a series of processes such as film stipping, etching, polishing, and cleaning to obtain wafers having a certain quality or higher. Playing.
그리고, 이렇게 재생된 웨이퍼는 소자 업체에서 테스트 및 모니터용으로 재사용되고 있다. The reclaimed wafers are then reused by device manufacturers for testing and monitoring.
그러나, 일반적으로 소자 공정이 진행된 웨이퍼는 써멀버짓(thermal budget)에 의해 웨이퍼 표면 및 벌크(bulk) 내에 결정 결함, 예컨데, COP와 산소석출물이 발생하게 되는데, 이러한 원치 않는 결정 결함들은 상기한 지금까지의 재생 공정을 통해서는 제거되지 않고 있는 실정이다. In general, however, wafers subjected to device processing are subject to crystal defects, such as COP and oxygen precipitates, on the wafer surface and in the bulk due to thermal budgets. It is not removed through the regeneration process.
따라서, 현재의 웨이퍼 재생 공정을 통해 제공되는 웨이퍼는 소자 업체에서 요구하는 파티클 또는 LLS(Local Light Scattering) 수준을 만족시키지 못하고 있다. Therefore, wafers provided through current wafer regeneration processes do not meet the particle or local light scattering (LLS) level required by device manufacturers.
이 결과, 재생 웨이퍼는 파티클 모니터링용으로는 사용이 부적합하며, 그래서, 그 사용 범위가 한정적이고, 또한, 반복적 사용시 COP 크기의 증가로 인해 반복 사용 회수가 일반 웨이퍼에 비해 적게 되는 바, 현재 그 사용 물량 또한 감소되고 있다. As a result, reclaimed wafers are unsuitable for particle monitoring, so their range of use is limited, and the number of repeated uses is less than that of ordinary wafers due to the increase in COP size during repeated use. Quantity is also decreasing.
따라서, 본 발명은 상기와 같은 종래의 문제점을 해결하기 위해 안출된 것으로서, COP 및 산소석출물과 같은 결정 결함을 신뢰성있게 제거할 수 있는 웨이퍼 재생 방법을 제공함에 그 목적이 있다. Accordingly, an object of the present invention is to provide a wafer regeneration method capable of reliably removing crystal defects such as COP and oxygen precipitates, which are devised to solve the conventional problems as described above.
또한, 본 발명은 COP 및 산소석출물과 같은 결정 결함을 신뢰성있게 제거함으로써 사용 범위를 넓힐 수 있는 웨이퍼 재생 방법을 제공함에 그 다른 목적이 있다. In addition, another object of the present invention is to provide a wafer regeneration method that can extend the range of use by reliably removing crystal defects such as COP and oxygen precipitates.
상기와 같은 목적을 달성하기 위하여, 본 발명은, 소자 공정이 진행된 웨이 퍼를 재생하기 위한 웨이퍼 재생 방법으로서, 재생될 웨이퍼에 대해서 막 제거, 식각, 연마 및 세정 공정을 순차적으로 수행하는 단계; 상기 공정들의 진행을 통해 얻어진 일정 품질 이상의 웨이퍼에 대해 1100℃ 이상의 온도로 1차 열처리를 수행하여 웨이퍼 벌크 내의 COP(Crystal Originated Particle)를 제거하는 단계; 및 상기 COP가 제거된 웨이퍼에 대해 1200℃ 이상의 온도로 2차 열처리를 수행하여 상기 웨이퍼 표면에서의 산소석출물을 제거하는 단계;를 포함하는 웨이퍼 재생 방법을 제공한다. In order to achieve the above object, the present invention provides a wafer regeneration method for reproducing a wafer in which the device process has been performed, comprising: sequentially performing a film removal, etching, polishing and cleaning process for the wafer to be regenerated; Performing a first heat treatment at a temperature of 1100 ° C. or higher on a wafer of a predetermined quality or more obtained through the process of removing the COP (Crystal Originated Particle) in the wafer bulk; And removing oxygen precipitates from the surface of the wafer by performing a second heat treatment at a temperature of 1200 ° C. or higher on the wafer from which the COP has been removed.
여기서, 상기 1차 열처리 및 2차 열처리는 퍼니스 또는 급속열공정 장비를 사용하여 수행한다. Here, the primary heat treatment and the secondary heat treatment are performed using a furnace or rapid thermal process equipment.
상기 1차 열처리와 2차 열처리는 각각 수행한다. The first heat treatment and the second heat treatment are performed respectively.
또한, 상기 1차 열처리와 2차 열처리는 퍼니스 또는 급속열공정 장비 내에서 연속적으로 수행할 수 있다. In addition, the first heat treatment and the second heat treatment may be continuously performed in the furnace or rapid thermal process equipment.
게다가, 상기 1차 열처리와 2차 열처리는 퍼니스 또는 급속열공정 장비를 사용하여 동시에 수행할 수 있다. In addition, the first heat treatment and the second heat treatment can be performed simultaneously using a furnace or rapid thermal processing equipment.
(실시예)(Example)
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명하도록 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 1은 본 발명에 따른 웨이퍼 재생 방법을 설명하기 위한 플로우 챠트이다. 1 is a flow chart for explaining a wafer regeneration method according to the present invention.
도시된 바와 같이, 본 발명의 웨이퍼 재생 방법은 우선 기존의 웨이퍼 재생 방법에 따라 재생 과정이 수행될 웨이퍼에 대해 막 제거 공정(S1), 식각 공정(S2), 연마 공정(S3) 및 세정 공정(S4) 등을 순차적으로 수행한다. As shown, the wafer regeneration method of the present invention is a film removal step (S1), an etching step (S2), a polishing step (S3) and a cleaning step (1) for a wafer on which a regeneration step is to be performed according to the existing wafer regeneration method. S4) and the like are performed sequentially.
그런다음, 상기 공정들의 진행을 통해 얻어진 일정 품질 이상의 웨이퍼에 대해 열처리 공정을 통해 COP 제거 공정(S5) 및 산소석출물 제거 공정(S6)을 수행하고, 이를 통해, COP를 제거함과 아울러 산소석출물을 제거한다. Then, a COP removal process (S5) and an oxygen precipitate removal process (S6) are performed through a heat treatment process on wafers having a predetermined quality or higher obtained through the above processes, thereby removing COP and removing oxygen precipitates. do.
여기서, 상기 COP 제거 공정(S5)에 대해 살펴보면, COP는 표면에 매우 얇은 산화물 측벽(oxide side wall)이 존재하고 내부는 비어 있는 상태로서, 이와같은 COP를 제거하기 위해 본 발명은 1100℃ 이상 고온의 퍼니스(furnace) 또는 급속열공정(Rapid Thermal Process)을 수행한다. 이렇게 하면, 챔버 내에서 격자간형 산소(interstitial oxygen)의 확산을 통해 산화물 측벽이 제거되고, 동시에 Ar 또는 N2 가스 분위기에 의해 COP 내부에서 격자간형 실리콘 주입(interstitial silicon injection) 효과가 일어나 웨이퍼 벌크 내에서의 결정 결함인 COP가 제거된다. Here, looking at the COP removal step (S5), the COP is a very thin oxide side wall (oxide side wall) is present on the surface and the interior is empty, in order to remove such COP, the present invention is a high temperature of 1100 ℃ or more Furnace or Rapid Thermal Process is performed. This removes the oxide sidewalls through diffusion of interstitial oxygen in the chamber, and at the same time creates an interstitial silicon injection effect inside the COP by an Ar or N2 gas atmosphere, thereby creating a wafer within the wafer bulk. COP, which is a crystal defect of, is removed.
그다음, 상기 산소석출물 제거 공정(S6)에 대해 살펴보면, 본 발명은 1200℃ 이상에서 적정 시간 동안 열처리를 실시한다. 이렇게 하면, 산소 원자가 다시 격자간형 자리(interstitial site)로 다시 분포하게 되고, 연속된 열처리에 의해 상기 산소의 외방 확산(out-diffusion)이 일어나 상기 웨이퍼 표면에서의 결정 결함인 산소석출물이 제거된다. 특별히, 이와 같은 열처리에 의해 웨이퍼 표면의 수㎛ 깊이 내에는 더이상의 산소석출물이 없게 된다. Next, looking at the oxygen precipitate removal step (S6), the present invention is subjected to heat treatment for a suitable time at 1200 ℃ or more. In this way, oxygen atoms are redistributed again to interstitial sites, and out-diffusion of oxygen occurs by continuous heat treatment to remove oxygen precipitates, which are crystal defects on the wafer surface. In particular, such heat treatment results in no further oxygen precipitates within a few micrometers depth of the wafer surface.
결국, 상기한 바와 같이, 본 발명은 일련의 재생 공정이 수행된 웨이퍼에 대해 추가적으로 적정 열처리를 수행함으로써 웨이퍼 수㎛ 깊이 벌크 내에서의 COP 및 웨이퍼 표면 상에서의 산소석출물과 같은 결정 결함을 제거 또는 현저히 줄일 수 있으며, 그래서, 재생 파티클 문제를 해결할 수 있다.As a result, as described above, the present invention performs additional heat treatment on a wafer subjected to a series of regeneration processes to remove or significantly reduce crystal defects such as COP and oxygen precipitates on the wafer surface in the bulk of the wafer several micrometers deep. It can reduce, and thus solve the problem of playing particles.
한편, COP 및 산소석출물을 제거하기 위한 열처리는 퍼니스 또는 급속열공정 장비를 사용하여 각각 수행할 수도 있겠지만, 바람직하게는 상기 퍼니스 또는 급속열공정 장비 내에서 연속적으로 수행하거나, 또는, 상기 장비를 사용하여 동시에 수행한다. On the other hand, the heat treatment for removing COP and oxygen precipitates may be performed using a furnace or a rapid thermal processing equipment, respectively, but preferably carried out continuously in the furnace or a rapid thermal processing equipment, or using the equipment Simultaneously.
이상에서와 같이, 본 발명은 추가 열처리를 통해 재생 웨이퍼에서의 COP 및 산소석출물과 같은 결정 결함을 신뢰성있게 제거할 수 있다. 따라서, 본 발명은 이러한 재생 웨이퍼를 파티클 모니터링용에도 적용할 수 있으며, 결국, 재생 웨이퍼의 사용 영역을 크게 늘릴 수 있다. As described above, the present invention can reliably remove crystal defects such as COP and oxygen precipitates in the recycled wafer through further heat treatment. Therefore, the present invention can be applied to such recycled wafers for particle monitoring, and, as a result, can greatly increase the use area of the recycled wafers.
이상, 여기에서는 본 발명의 특정 실시예에 대하여 설명하고 도시하였지만, 당업자에 의하여 이에 대한 수정과 변형을 할 수 있으며, 그러므로, 이하 특허청구범위는 본 발명의 진정한 사상과 범위에 속하는 한 모든 수정과 변형을 포함하는 것으로 이해할 수 있다. As described above, specific embodiments of the present invention have been described and illustrated, but modifications and variations can be made by those skilled in the art. Therefore, the following claims are intended to cover all modifications and modifications as long as they fall within the true spirit and scope of the present invention. It is understood to include variations.
Claims (5)
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KR1020050058584A KR20070002886A (en) | 2005-06-30 | 2005-06-30 | Wafer reclamation method |
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KR1020050058584A KR20070002886A (en) | 2005-06-30 | 2005-06-30 | Wafer reclamation method |
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- 2005-06-30 KR KR1020050058584A patent/KR20070002886A/en not_active Application Discontinuation
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