KR20060112351A - Cmos image sensor, and method for fabricating the same - Google Patents

Cmos image sensor, and method for fabricating the same Download PDF

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KR20060112351A
KR20060112351A KR1020050034657A KR20050034657A KR20060112351A KR 20060112351 A KR20060112351 A KR 20060112351A KR 1020050034657 A KR1020050034657 A KR 1020050034657A KR 20050034657 A KR20050034657 A KR 20050034657A KR 20060112351 A KR20060112351 A KR 20060112351A
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semiconductor substrate
image sensor
cmos image
conductivity type
region
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Korean (ko)
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박영규
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매그나칩 반도체 유한회사
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07732—Physical layout of the record carrier the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G06K19/0702—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including a battery
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B31/00—Arrangements for the associated working of recording or reproducing apparatus with related apparatus
    • G11B31/02—Arrangements for the associated working of recording or reproducing apparatus with related apparatus with automatic musical instruments
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K5/00—Casings, cabinets or drawers for electric apparatus
    • H05K5/02—Details
    • H05K5/0256—Details of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms
    • H05K5/026—Details of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms having standardized interfaces
    • H05K5/0278—Details of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms having standardized interfaces of USB type

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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
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  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

A CMOS image sensor is provided to increase quantum efficiency by increasing the quantity of light incident upon a photodiode and by lengthening the path of the incident light. A semiconductor substrate(200) of first conductivity type is formed on the surface of a photo detection region where a photodiode is to be formed, having an unevenness part. A first impurity region(202) of second conductivity type is formed in the semiconductor substrate in the photo detection region. A second impurity region(203) of first conductivity type is formed in the unevenness part of the photo detection region. An ARC(anti-reflective coating)(204) is formed on the unevenness part.

Description

씨모스 이미지 센서 및 그 제조 방법{CMOS IMAGE SENSOR, AND METHOD FOR FABRICATING THE SAME}CMOS image sensor and its manufacturing method {CMOS IMAGE SENSOR, AND METHOD FOR FABRICATING THE SAME}

도 1은 종래 기술에 따른 씨모스 이미지 센서의 제조 공정중, 포토다이오드를 나타낸 단면도.1 is a cross-sectional view showing a photodiode in the manufacturing process of the CMOS image sensor according to the prior art.

도 2a 내지 도 2d는 본 발명에 따른 씨모스 이미지 센서의 제조 공정중 포토다이오드를 나타낸 단면도.2A to 2D are cross-sectional views showing a photodiode in the manufacturing process of the CMOS image sensor according to the present invention.

도 3은 상기 요철부를 나타내는 단면도.3 is a cross-sectional view showing the irregularities.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

200 : 반도체 기판 202 : 제1 불순물영역200 semiconductor substrate 202 first impurity region

203 : 제2 불순물영역 204 : 반사방지막203: second impurity region 204: antireflection film

본 발명은 반도체 제조 기술에 관한 것으로 특히, 반도체 소자 제조 공정 중 , 씨모스 이미지 센서의 제조 공정에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a manufacturing process of CMOS image sensor during a semiconductor device manufacturing process.

일반적으로, 이미지 센서는 디지털 카메라, 휴대폰 등의 가정용 제품이나, 병원에서 사용되는 내시경, 지구를 돌고 있는 인공위성의 망원경에 이르기까지 매우 광범위한 분야에서 사용되고 있으며, 다양한 이미지 센서중, 씨모스 제조 기술로 생산되는 씨모스(CMOS) 이미지 센서는 광학적 이미지를 전기적 신호로 변환시키는 소자로서, 화소수 만큼 모스(MOS)트랜지스터를 만들고 이것을 이용하여 차례차례 출력을 검출하는 스위칭 방식을 채용하고 있다. 씨모스 이미지 센서는, 종래 이미지 센서로 널리 사용되고 있는 씨씨디(CCD) 이미지센서에 비하여 구동 방식이 간편하고 다양한 스캐닝 방식의 구현이 가능하며, 신호처리 회로를 단일칩에 집적할 수 있어 제품의 소형화가 가능할 뿐만 아니라, 호환성의 씨모스 기술을 사용하므로 제조 단가를 낮출 수 있고, 전력 소모 또한 크게 낮다는 장점을 지니고 있어서 휴대폰, PC, 감시 카메라 등의 저가, 저전력을 요하는 분야에 쓰이고 있다. In general, image sensors are used in a wide range of fields, from home products such as digital cameras and mobile phones, to endoscopes used in hospitals, and to satellite telescopes around the earth. The CMOS image sensor is a device that converts an optical image into an electrical signal, and employs a switching method in which a MOS transistor is formed by the number of pixels and the output is sequentially detected using the MOS transistor. The CMOS image sensor is simpler to drive than the CCD image sensor, which is widely used as a conventional image sensor, enables various scanning methods, and can integrate signal processing circuits onto a single chip. In addition to the use of compatible CMOS technology, the manufacturing cost can be lowered and the power consumption is significantly lower. Therefore, it is used in low cost and low power fields such as mobile phones, PCs and surveillance cameras.

도 1은 종래 기술에 따른 씨모스 이미지 센서의 제조 공정중, 포토다이오드를 나타낸 단면도이다.1 is a cross-sectional view showing a photodiode in the manufacturing process of the CMOS image sensor according to the prior art.

도 1을 참조하면, 제1 도전형의 반도체 기판(100) 활성영역과 소자분리영역을 분리하는 소자분리막을 형성한후, 상기 반도체 기판(100) 상에 게이트 절연막과 게이트 전도막을 순차적으로 증착한다.Referring to FIG. 1, after forming an isolation layer separating an active region and an isolation region of a first conductivity type semiconductor substrate 100, a gate insulating layer and a gate conductive layer are sequentially deposited on the semiconductor substrate 100. .

이어서, 상기 게이트 절연막과 게이트 전도막을 선택적 식각하여 게이트 전극을 형성하고, 포토다이오드가 형성될 광감지영역의 상기 반도체 기판(100)에 제2 도전형의 제1 불순물영역(101)을 형성한다.Subsequently, a gate electrode is formed by selectively etching the gate insulating layer and the gate conductive layer, and a first impurity region 101 of the second conductivity type is formed in the semiconductor substrate 100 of the photosensitive region where the photodiode is to be formed.

이어서, 상기 반도체 기판(100)과 상기 제1 불순물영역(101) 상에 제1 도전형의 제2 불순물영역(102)을 형성한다.Next, a second impurity region 102 of a first conductivity type is formed on the semiconductor substrate 100 and the first impurity region 101.

이어서, 상기 제2 불순물영역(102)이 형성된 기판 상에 반사방지막(103)을 증착하여 포토다이오드를 형성한다.Subsequently, an antireflection film 103 is deposited on the substrate on which the second impurity region 102 is formed to form a photodiode.

그런데, 종래 기술의 씨모스 이미지 센서에서의 포토다이오드는 빛이 입사되더라도 실제적으로 광전변환에 기여하는 입사광은 반사에 의해 줄어들게 되고, 이러한 반사는 물질에 따라 정해진 상수로 공정 개선 등으로 향상 시킬 수 없는 문제짐이 있다.However, the photodiode of the CMOS image sensor of the prior art, even though the light is incident, the incident light that actually contributes to the photoelectric conversion is reduced by the reflection, such reflection can not be improved by the process improvement, etc. with a constant determined according to the material There is a problem.

본 발명은 상기한 종래기술의 문제점을 해결하기 위해 제안된 것으로서, 입사광의 양을 늘려 양자 효율을 높이는 씨모스 이미지 센서의 제조 방법을 제공하는 것을 그 목적으로 한다.The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a method for manufacturing a CMOS image sensor that increases the amount of incident light to increase quantum efficiency.

상기의 목적을 달성하기 위한 본 발명의 일측면에 따르면, 포토다이오드가 형성될 광감지영역을 갖는 제1 도전형의 반도체 기판을 준비하는 단계, 상기 광감지영역의 상기 반도체 기판 내부에 제2 도전형의 제1 불순물영역을 형성하는 단계, 상기 광감지영역의 상기 반도체 기판 내부와 상기 제1 불순물영역 상에 제1 도전형의 제2 불순물영역을 형성하는 단계 및 상기 제2 불순물영역의 상기 반도체 기판을 이등방 식각하여 요철부를 형성하는 단계를 포함하는 씨모스 이미지 센서의 제조 방법이 제공된다.According to an aspect of the present invention for achieving the above object, the step of preparing a semiconductor substrate of the first conductivity type having a photosensitive region on which a photodiode is to be formed, a second conductive inside the semiconductor substrate of the photosensitive region Forming a first impurity region of a type, forming a second impurity region of a first conductivity type in the semiconductor substrate of the photosensitive region and on the first impurity region, and the semiconductor of the second impurity region An isotropic etching of a substrate to form a concave-convex portion provides a method of manufacturing a CMOS image sensor.

이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부 도면을 참조하여 설명하기로 한다.Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

도 2a 내지 도 2d는 본 발명에 따른 씨모스 이미지 센서의 제조 공정중 포토다이오드를 나타낸 단면도이다.2A to 2D are cross-sectional views illustrating a photodiode in the manufacturing process of the CMOS image sensor according to the present invention.

본 발명에 따른 씨모스 이미지 센서의 제조 공정은 우선, 도 2a에 도시된 바와 같이, 제1 도전형의 반도체 기판(200, 실리콘 기판) 활성영역과 소자분리영역을 분리하는 소자분리막을 형성한후, 상기 반도체 기판(200) 상에 게이트 절연막과 게이트 전도막을 순차적으로 증착한다.In the manufacturing process of the CMOS image sensor according to the present invention, first, as shown in Figure 2a, after forming a device isolation film for separating the active region and the device isolation region of the first conductivity type semiconductor substrate (200, silicon substrate) A gate insulating film and a gate conductive film are sequentially deposited on the semiconductor substrate 200.

이어서, 상기 게이트 절연막과 게이트 전도막을 선택적 식각하여 게이트 전극을 형성하고, 포토다이오드가 형성될 광감지영역의 상기 반도체 기판(200)에 제2 도전형의 제1 불순물영역(202)을 형성한다.Subsequently, a gate electrode is formed by selectively etching the gate insulating layer and the gate conductive layer, and a first impurity region 202 of the second conductivity type is formed in the semiconductor substrate 200 of the photosensitive region in which the photodiode is to be formed.

이어서, 상기 반도체 기판(200)과 상기 제1 불순물영역(202) 상에 제1 도전형의 제2 불순물영역(203)을 형성한다.Subsequently, a second impurity region 203 of a first conductivity type is formed on the semiconductor substrate 200 and the first impurity region 202.

이어서, 상기 제2 불순물영역(203)의 반도체 기판(200)의 표면을 이방성 식각하여 요철부(A)를 형성한다.Subsequently, the surface of the semiconductor substrate 200 of the second impurity region 203 is anisotropically etched to form the uneven portion A. FIG.

이때, 상기 요철부(A)는 상기 반도체 기판(200)의 실리콘 (111)면이 드러난 요철 형상인 것이 바람직하다.In this case, the uneven portion A may have an uneven shape in which the silicon 111 surface of the semiconductor substrate 200 is exposed.

또한, 상기 이방성 식각은 NaOH를 이용한 습식 식각인 것이 바람직하다.In addition, the anisotropic etching is preferably a wet etching using NaOH.

이어서, 상기 요철부(A)가 형성된 기판 상에 반사방지막(204)을 증착하여 포토다이오드를 형성한다.Subsequently, an anti-reflection film 204 is deposited on the substrate on which the uneven portion A is formed to form a photodiode.

도 3은 상기 요철부(A)를 나타내는 단면도이다.3 is a cross-sectional view showing the uneven portion A. FIG.

도 3을 참조하면, 요철 형상의 상기 요철부(A)에 입사광이 들어오면 일부는 반사되고 일부는 흡수된다. 이때 반사된 빛은 요철 형상의 굴곡에 의해 다시 흡수되어 입사광의 반사로 인한 손실을 감소시키는 것을 확인할 수 있다.Referring to FIG. 3, when incident light enters the uneven portion A, the uneven portion A is partially reflected and partially absorbed. At this time, the reflected light is again absorbed by the irregular shape bent to reduce the loss due to the reflection of the incident light.

또한, 입사광이 통과하는 경로도 길어지게 되어 전자-정공 쌍(Electron-Hole Pairs)을 생성할 수 있는 기회가 많아지게 된다.In addition, the path through which incident light passes also increases, increasing the chance of generating electron-hole pairs.

즉, 본 발명에서는 양자 효율을 높이기 위하여 광감지영역의 상기 반도체 기판(200)의 표면에 요철부(A)를 형성시켜 입사광의 상기 포토다이오드를 통과하는 경로를 길게한다. 따라서, 상기 길어진 경로로 인하여 다수의 전자-정공 쌍을 생성시킬 수 있다.That is, in the present invention, in order to increase the quantum efficiency, the uneven portion A is formed on the surface of the semiconductor substrate 200 in the light sensing region to lengthen the path through the photodiode of incident light. Thus, the elongated path allows the generation of multiple electron-hole pairs.

그리고, 종래 기술로 제조된 포토다이오드 보다 길어진 입사광의 경로는 상기 종래 기술 보다 상대적으로 얕은 곳에 포토다이오드를 형성할 수 있게한다.In addition, the path of incident light longer than that of the conventional photodiode enables the photodiode to be formed at a relatively shallower location than the prior art.

이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

이상에서 살펴본 바와 같이, 본 발명은 포토다이오드로 들어오는 입사광의 양을 늘리고, 상기 입사광의 경로를 길게 하여 양자 효율을 높인다. 따라서, 저조도 특성을 개선시키는 효과가 있다.As described above, the present invention increases the amount of incident light entering the photodiode and increases the path of the incident light to increase quantum efficiency. Therefore, there is an effect of improving low light characteristics.

또한, 수직 방향 보다는 수평방향으로 다량의 입사광이 들어오기 때문에 포토다이오드의 수직적 깊이가 줄어들어 소자의 소형화를 이룰수 있다.In addition, since a large amount of incident light enters the horizontal direction rather than the vertical direction, the vertical depth of the photodiode is reduced, thereby miniaturizing the device.

Claims (7)

포토다이오드가 형성될 광감지영역에서 그 표면에 요철불를 갖는 제1 도전형의 반도체 기판;A first conductive semiconductor substrate having irregularities on its surface in the photosensitive region in which the photodiode is to be formed; 상기 광감지영역의 상기 반도체 기판 내부에 형성되는 제2 도전형의 제1 불순물영역; 및A first impurity region of a second conductivity type formed in the semiconductor substrate of the light sensing region; And 상기 광감지영역의 상기 요철부에 형성되는 제1 도전형의 제2 불순물영역A second impurity region of a first conductivity type formed in the uneven portion of the light sensing region 을 구비하는 씨모스 이미지 센서.CMOS image sensor having a. 제1항에 있어서,The method of claim 1, 상기 요철부 상에 형성된 반사방지막을 더 구비하는 씨모스 이미지 센서.The CMOS image sensor further comprises an anti-reflection film formed on the uneven portion. 제1항에 있어서,The method of claim 1, 상기 반도체 기판은 실리콘이며, 상기 요철부는 상기 실리콘의 (111)면이 드러난 요철 형상인 것을 특징으로 하는 씨모스 이미지 센서.The semiconductor substrate is silicon, and the concave-convex portion is a CMOS image sensor, characterized in that the concave-convex shape of the (111) surface of the silicon is exposed. 포토다이오드가 형성될 광감지영역을 갖는 제1 도전형의 반도체 기판을 준비 하는 단계;Preparing a semiconductor substrate of a first conductivity type having a photosensitive region in which a photodiode is to be formed; 상기 광감지영역의 상기 반도체 기판 내부에 제2 도전형의 제1 불순물영역을 형성하는 단계;Forming a first impurity region of a second conductivity type in the semiconductor substrate of the photosensitive region; 상기 광감지영역의 상기 반도체 기판 내부와 상기 제1 불순물영역 상에 제1 도전형의 제2 불순물영역을 형성하는 단계; 및Forming a second impurity region of a first conductivity type in the semiconductor substrate of the light sensing region and on the first impurity region; And 상기 제2 불순물영역의 상기 반도체 기판 표면을 이방성 식각하여 요철부를 형성하는 단계Anisotropically etching the surface of the semiconductor substrate of the second impurity region to form an uneven portion 를 포함하는 씨모스 이미지 센서의 제조 방법.Method of manufacturing a CMOS image sensor comprising a. 제4항에 있어서,The method of claim 4, wherein 상기 요철부 상에 반사방지막을 형성하는 단계를 더 포함하는 씨모스 이미지 센서의 제조 방법.And forming an anti-reflection film on the uneven portion. 제4항에 있어서,The method of claim 4, wherein 상기 반도체 기판은 실리콘이며, 상기 요철부는 상기 실리콘의 (111)면이 드러난 요철 형상인 것을 특징으로 하는 씨모스 이미지 센서의 제조 방법.The semiconductor substrate is silicon, and the uneven portion is a manufacturing method of the CMOS image sensor, characterized in that the uneven shape of the (111) surface of the silicon is exposed. 제4항에 있어서,The method of claim 4, wherein 상기 이방성 식각은 NaOH를 이용한 습식 식각인 것을 특징으로 하는 씨모스 이미지 센서의 제조 방법.The anisotropic etching is a method of manufacturing a CMOS image sensor, characterized in that the wet etching using NaOH.
KR1020050034657A 2005-04-26 2005-04-26 Cmos image sensor, and method for fabricating the same KR20060112351A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100853097B1 (en) * 2006-12-22 2008-08-19 동부일렉트로닉스 주식회사 Method for Manufacturing of Semiconductor Device
KR20190039994A (en) * 2016-08-29 2019-04-16 하마마츠 포토닉스 가부시키가이샤 Distance sensor and distance image sensor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100853097B1 (en) * 2006-12-22 2008-08-19 동부일렉트로닉스 주식회사 Method for Manufacturing of Semiconductor Device
KR20190039994A (en) * 2016-08-29 2019-04-16 하마마츠 포토닉스 가부시키가이샤 Distance sensor and distance image sensor
US11215698B2 (en) 2016-08-29 2022-01-04 Hamamatsu Photonics K.K. Distance sensor and distance image sensor

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