WO2021253971A1

WO2021253971A1 - Photosensitive pixel module, image sensor, and electronic device

Info

Publication number: WO2021253971A1
Application number: PCT/CN2021/088659
Authority: WO
Inventors: 张学勇
Original assignee: Oppo广东移动通信有限公司
Priority date: 2020-06-16
Filing date: 2021-04-21
Publication date: 2021-12-23
Also published as: CN111769126A

Abstract

A photosensitive pixel module (100), an image sensor (010), and an electronic device (100). The photosensitive pixel module (100) comprises a protective ring (110), a plurality of photosensitive pixel units (120), and shallow trench isolations (130); the plurality of photosensitive pixel units (120) are arranged in the protective ring (110); and a shallow trench isolation (130) is provided between any two adjacent photosensitive pixel units (120) in the plurality of photosensitive pixel units (120). By providing a plurality of photosensitive pixel units (120) in the protective ring (110), and providing the shallow trench isolation (130) between any two adjacent photosensitive pixel units (120) in the plurality of photosensitive pixel units (120) for isolation, photoelectric conversion can be achieved; moreover, the plurality of photosensitive pixel units (120) share the protective ring (110), thereby reducing the area occupied by the protective ring (110), increasing the proportion and the filling factor of the photosensitive pixel units (120) in unit area, and facilitating improving the photon sensitivity and the imaging quality of the image sensor (010).

Description

Photosensitive pixel module, image sensor and electronic equipment

cross reference

This disclosure claims the priority of the Chinese patent application filed on June 16, 2020 with the application number 202010548644.X titled "photosensitive pixel module, image sensor and electronic equipment", and the entire content of the Chinese patent application is incorporated by reference in its entirety. Into this article.

Technical field

The present disclosure relates to the technical field of electronic devices, and in particular, to a photosensitive pixel module, an image sensor, and an electronic device.

Background technique

In an image sensor, a light signal is usually converted into an electric signal by a photosensitive pixel unit, and a plurality of photosensitive pixel units are distributed in an array in the image sensor. Generally, the higher the area ratio of the photosensitive pixel unit in the unit area of the image sensor, the higher the quality of imaging by the image sensor. At present, due to problems such as the structure of the pixel sensing unit, the area of the photosensitive pixel unit per unit area in the image sensor is relatively low, which is not conducive to the improvement of imaging quality.

It should be noted that the information disclosed in the background art section above is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to those of ordinary skill in the art.

Public content

The purpose of the present disclosure is to provide a photosensitive pixel module, an image sensor, and an electronic device, so as to at least to some extent solve one or more problems caused by the defects of the related technology.

According to a first aspect of the present disclosure, a photosensitive pixel module is provided, and the photosensitive pixel module includes:

Protection ring

A plurality of photosensitive pixel units, the plurality of photosensitive pixel units are arranged in the guard ring;

Shallow groove isolation, the shallow groove isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units.

According to a second aspect of the present disclosure, there is provided an image sensor including the above-mentioned photosensitive pixel module.

According to a third aspect of the present disclosure, there is provided an electronic device including the above-mentioned image sensor.

It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the application.

Description of the drawings

The drawings herein are incorporated into the specification and constitute a part of the specification, show embodiments consistent with the disclosure, and are used together with the specification to explain the principle of the disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

FIG. 1 is a schematic structural diagram of a first photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

2 is a schematic structural diagram of a second photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

3 is a schematic structural diagram of a third photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

4 is a schematic structural diagram of a fourth photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

FIG. 5 is a schematic structural diagram of a fifth photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

6 is a schematic structural diagram of a sixth photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

FIG. 7 is a schematic diagram of the interval of photosensitive pixel units in a photosensitive pixel module provided by an exemplary embodiment of the present disclosure;

FIG. 8 is a schematic structural diagram of an image sensor provided by an exemplary embodiment of the present disclosure;

FIG. 9 is a schematic structural diagram of an electronic device provided by an exemplary embodiment of the present disclosure.

detailed description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms, and should not be construed as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided so that the present invention will be comprehensive and complete, and fully convey the concept of the example embodiments To those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed descriptions will be omitted.

Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship between one component of an icon and another component, these terms are used in this specification only for convenience, for example, according to the drawings. The direction of the example described. It can be understood that if the device of the icon is turned over and turned upside down, the component described as "upper" will become the "lower" component. When a structure is “on” another structure, it may mean that a certain structure is integrally formed on other structures, or that a certain structure is “directly” arranged on other structures, or that a certain structure is “indirectly” arranged on other structures through another structure. On other structures.

The terms "a", "a", "the" and "said" are used to indicate the presence of one or more elements/components/etc.; the terms "include" and "have" are used to indicate open-ended inclusion It means and means that there may be additional elements/components/etc. in addition to the listed elements/components/etc.

In this example embodiment, a photosensitive pixel module 100 is first provided. As shown in FIG. 1, the photosensitive pixel module 100 includes a guard ring 110, a plurality of photosensitive pixel units 120, and a shallow trench isolation 130 (STI, Shallow trench isolation). , A plurality of photosensitive pixel units 120 are arranged in the protection ring 110; a shallow groove isolation 130 is provided between any two adjacent photosensitive pixel units 120 among the plurality of photosensitive pixel units 120 in the same protection ring 110.

In the photosensitive pixel module 100 provided by the embodiment of the present disclosure, a plurality of photosensitive pixel units 120 are arranged in the guard ring 110, and a shallow groove is arranged between any two adjacent photosensitive pixel units 120 among the plurality of photosensitive pixel units 120. 130 is isolated to achieve photoelectric conversion, and because multiple photosensitive pixel units 120 share the guard ring 110, the area occupied by the guard ring 110 is reduced, and the proportion and fill factor of the photosensitive pixel unit 120 per unit area are increased, which is beneficial to Improve the imaging quality of the image sensor.

Hereinafter, each part of the photosensitive pixel module 100 provided by the embodiment of the present disclosure will be described in detail:

The photosensitive pixel unit 120 may include a SPAD (Single-photon avalanche diode). The single-photon avalanche diode is a photodiode that works under a large reverse bias voltage, and is essentially a PN junction. During normal operation, a reverse bias voltage (-15V～-30V) greater than avalanche breakdown is applied to both ends of the PN junction. Since the PN junction is reverse biased, no current flows. But when only a single photon enters the depletion zone of the PN junction, it will trigger the photogenerated carriers. The photogenerated carriers continue to collide and excite other carriers in the PN junction under the action of the electric field formed by the large bias voltage to generate a large current. The whole process is similar to an avalanche. Therefore it is called a single photon avalanche diode. The single-photon avalanche diode is mainly used in dToF. It is a key device for measuring a single photon in dToF (Direct-time of flight), and it is also the most basic device for a pixel.

On this basis, as shown in FIG. 2, the photosensitive pixel unit 120 includes a substrate 122, an avalanche layer 121, a cathode diffusion layer 124, and a cathode layer 123. The substrate 122 has an anode region 1221, and the substrate 122 is provided with a A accommodating portion 1222, the first accommodating portion 1222 is located on one side of the anode region 1221, and the side of the first accommodating portion 1222 away from the anode region 1221 has a first opening 1223 (the opening is located on a surface of the substrate); The layer 121 is disposed on the first accommodating portion 1222 of the substrate 122; the cathode layer 123 is disposed on the avalanche layer 121, and the cathode layer 123 is located on the side of the avalanche layer 121 away from the anode region 1221, and the cathode layer 123 is exposed to the first accommodating portion The first opening 1223 of the portion 1222; the cathode diffusion layer 124 is provided between the avalanche layer 121 and the cathode layer 123. The shallow trench isolation 130 is provided between the cathode diffusion layers 124 of two adjacent photosensitive pixel units 120. Wherein, the first accommodating portion 1222 may be a cavity with a first opening 1223.

Here, the embodiment of the present disclosure provides an avalanche photodiode with an n+/p-well structure, which is only an exemplary description. The photosensitive pixel module provided in the embodiment of the present disclosure can also be used for other n+/p-well The structure of the avalanche photodiode is not limited to the embodiment of the present disclosure.

By forming another cathode diffusion layer 124 between the cathode layer 123 and the avalanche layer 121, the avalanche layer 121 is moved from the surface of the cathode layer 123 to an area away from the surface, so that the avalanche area can be far away from the shallow trench isolation 130. Since the Si-SiO2 at the interface of the shallow trench isolation 130 has a large number of trap energy levels, which can trap carriers, the electric field of the avalanche layer 121 is very strong. If the trapped carriers are very close to the avalanche layer 121, they will easily enter the avalanche layer. 121 triggers avalanche ionization, causing the device to erroneously break down, and the final result is that the DCR (Dark count rate) of the device is too large. The cathode diffusion layer 124 can solve the above problem.

For example, a stepped hole is provided on the substrate 122, and the stepped hole may be a stepped square hole or a stepped round hole. The avalanche layer 121 may be provided at the bottom of the stepped hole. The stepped hole is a blind hole. The bottom of the stepped hole refers to the end of the stepped hole away from the first opening 1223. The cathode diffusion layer 124 is disposed on the side of the avalanche layer 121 away from the bottom of the stepped hole, and the side of the cathode diffusion layer 124 away from the avalanche layer 121 may be exposed to the first opening 1223 of the stepped hole. The cathode layer 123 is embedded in the cathode diffusion layer 124, and the cathode layer 123 is exposed to the surface of the cathode diffusion layer 124 away from the avalanche layer 121. Among the surfaces where the avalanche layer 121 and the cathode diffusion layer 124 are in contact with each other, the area of the contact surface of the cathode diffusion layer 124 is larger than the area of the contact surface of the avalanche layer 121. As shown in FIG. 3, the side of the first opening 1223 of the stepped hole in the substrate 122 may extend to be flush with the surface of the cathode layer 123 away from the avalanche layer 121. Or as shown in FIG. 2, the side where the first opening 1223 of the stepped hole in the substrate 122 is located may extend to the bottom end of the shallow groove isolation 130. The bottom end of the shallow trench isolation 130 refers to an end of the shallow trench isolation 130 embedded in the substrate 122. The top surface of the shallow trench isolation 130 is flush with the top surface of the cathode diffusion layer 124.

The depth of the shallow trench isolation 130 is greater than the depth of the cathode layer 123, and the depth of the shallow trench isolation 130 is less than the depth of the cathode diffusion layer 124. The depth mentioned here refers to the distance of each device in the direction from the cathode layer 123 to the avalanche layer 121. The depth of the shallow trench isolation 130 may be 1 to 3 microns.

The shallow trench isolation 130 can be formed by depositing, patterning, and etching silicon through a silicon nitride mask to form a trench, and fill the trench with deposited oxide. In the process of forming the shallow trench isolation 130, a silicon nitride layer can be deposited on the semiconductor substrate 122 first, and then the silicon nitride layer can be patterned to form a hard mask; A trench is formed between the cathode diffusion layers 124; finally, an oxide is filled in the trench to form a shallow trench isolation 130 for the element. For example, the cross-sectional shape of the shallow trench isolation 130 may be a trapezoid, and the filled oxide may be silicon dioxide.

The cathode layer 123 and the cathode diffusion layer 124 are doped with a first type dopant, and the avalanche layer 121 and the substrate 122 are doped with a second type dopant. For example, the cathode layer 123 may be an n-type heavily doped semiconductor layer (for example, an n-type heavily doped silicon layer). The cathode diffusion layer 124 may be an n-type doped semiconductor layer (such as n-type silicon), and its doping concentration is lower than that of the cathode layer 123. The avalanche layer 121 may be a p-type heavily doped semiconductor layer (for example, a p-type heavily doped silicon layer). The substrate 122 may be a p-type doped semiconductor layer (for example, p-type silicon), and its doping concentration is lower than that of the avalanche layer 121.

In the embodiments of the present disclosure, an n+/p-well type pn junction design is adopted. During the avalanche breakdown of n+/p-well, electron ionization is the main factor. The electron mobility is about 3 times higher than the hole mobility. Ionization is easier. The sensitivity of the image sensor is improved, which means that the photon detection efficiency is higher. And the p-type substrate 122 is used, and the p substrate 122 is usually used in the CMOS process. First, the integrated circuit tends to use NMOS transistors as the main reason, because the NMOS transistor is electronically conductive, and the electron mobility is the same as the hole migration in the PMOS transistor. Secondly, the p-substrate 122 can be directly used as an NMOS transistor, and the p-type silicon as the substrate 122 can be directly grounded, which can reduce the bias voltage of the image sensor during operation and stably reduce the noise signal.

The photosensitive pixel module 100 provided by the embodiment of the present disclosure may be used in a BSI (Backside-illuminated, back-illuminated) image sensor. BSI technology can use n+/p-well technology, and the avalanche region is mainly generated by electron ionization in p-well (p-well). The ionization probability of electrons is about 3 times higher than the ionization probability of holes. In the BSI image sensor, n+/p-well adopts electron avalanche ionization, which has high ionization rate and high photon detection efficiency PDE.

On this basis, as shown in FIG. 4, the photosensitive pixel module 100 provided by the embodiment of the present disclosure may further include a signal collection layer 140, a color filter layer 160, and a light converging layer 150. The pixel collection layer is stacked on the photosensitive pixel unit 120 away from the input. On the light side, the signal acquisition layer 140 includes a signal acquisition circuit, and the signal acquisition circuit is connected to the photosensitive pixel unit 120. The color film layer 160 is disposed on the light-incoming side of the photosensitive pixel unit 120. The light condensing layer 150 is disposed on the light-incoming side of the photosensitive pixel unit 120, and the light condensing layer 150 is used for condensing light on the photosensitive pixel unit 120.

The light entrance side of the photosensitive pixel unit 120 may be the side of the substrate 122 away from the cathode layer 123, and the signal collection layer 140 is provided on the side of the photosensitive pixel unit 120 away from the light entrance side, that is, light can directly enter the photosensitive pixel. Unit 120. The single-photon avalanche diode in the photosensitive pixel unit 120 generates an avalanche current under light. The signal acquisition circuit in the signal acquisition layer 140 receives the avalanche current and transmits the avalanche current to the processor.

The signal acquisition circuit can acquire avalanche signals by progressive scanning. A plurality of rows of circuit units are arranged in the signal acquisition circuit layer, and each circuit unit is connected to a photosensitive pixel unit 120. When collecting signals, the circuit units are scanned line by line, and the photoelectric signals of the photosensitive pixel unit 120 are obtained line by line.

The color film layer 160 may include a plurality of color light-transmitting units, for example, RGB light-transmitting units. RGB light-transmitting units are staggered. Each light-sensitive pixel unit 120 corresponds to a light-transmitting unit. For example, any R light-transmitting unit is located above a pixel sensing unit, any G light-transmitting unit is located above a pixel sensing unit, and any B The light-transmitting unit is located above a pixel sensing unit.

The light concentrating layer 150 may be provided on a side of the color film layer 160 away from the photosensitive pixel unit 120, and the light concentrating layer 150 may include an anti-reflection film layer and a micro lens array. The anti-reflection film layer is disposed on the side of the color film layer 160 away from the photosensitive pixel unit 120, and the micro lens array is disposed on the side of the anti-reflection film layer away from the color film layer 160. The external light enters the photosensitive pixel unit 120 after passing through the micro lens array, the anti-reflection film layer and the color film layer 160. The use of microlenses to converge the incident light in the corresponding ionization zone of the avalanche layer 121 and reduce the reflected light through the anti-reflection film layer can improve the photon detection efficiency PDE of the device. Of course, in practical applications, the photosensitive pixel module 100 provided in the embodiment of the present disclosure can also improve the device photon detection efficiency PDE in other ways, which is not specifically limited in the embodiment of the present disclosure.

Alternatively, as shown in FIG. 5, the photosensitive pixel unit 120 provided by the embodiment of the present disclosure may include: a substrate 122, a cathode layer 123, an avalanche layer 121, and an anode layer 125. The cathode layer 123 is provided on the substrate 122 and the cathode layer 123. A second accommodating portion 1231 is provided, and the second accommodating portion 1231 has a second opening 1232 on the side away from the substrate 122; the avalanche layer 121 is embedded on the side of the cathode layer 123 away from the substrate 122, and the avalanche layer 121 is exposed The second opening 1232 of the cathode layer 123; the anode layer 125 is provided on the side of the avalanche layer 121 away from the substrate 122. The anode layer 125 may be embedded on the side of the avalanche layer 121 away from the cathode layer 123. The second accommodating portion 1231 may be a cavity having a second opening 1232.

Here, the embodiment of the present disclosure provides an avalanche photodiode with a p+/n-well structure, which is only an exemplary description. The photosensitive pixel module provided by the embodiment of the present disclosure can also be used for other p+/n-well The structure of the avalanche photodiode is not limited to the embodiment of the present disclosure.

On this basis, the cathode layer 123 includes the first type dopant, the avalanche layer 121, the anode layer 125, and the substrate 122 include the second type dopant, and the doping concentration of the avalanche layer 121 is lower than that of the anode layer. concentration. For example, the cathode layer 123 may be an n-type heavily doped semiconductor layer, and the cathode layer 123 forms an n-well. The anode layer 125 may be a p-type heavily doped semiconductor layer, the avalanche layer 121 may be a p-type doped semiconductor, and the doping concentration of the avalanche layer 121 is lower than that of the anode layer.

The avalanche layer 121 in any two adjacent photosensitive pixel units 120 in the plurality of photosensitive pixel units 120 in the same guard ring 110 are isolated by shallow groove isolation 130, and the depth of the shallow groove isolation 130 is greater than the depth of the anode layer and smaller than the avalanche The depth of layer 121.

The photosensitive pixel unit 120 can be used in an FSI (Front-illuminated) image sensor. As shown in FIG. 6, the photosensitive pixel module 100 further includes: a signal collection layer 140, a color filter layer 160, and a light concentrating layer 150. The pixel collection layer is stacked on the light entrance side of the photosensitive pixel unit 120, and the signal collection layer 140 includes signal collection layers. The circuit, the signal acquisition circuit and the photosensitive pixel unit 120 are connected. The color film layer 160 is disposed on a side of the signal collection layer 140 away from the photosensitive pixel unit 120. The light condensing layer 150 is disposed on the light-incoming side of the photosensitive pixel unit 120, and the light condensing layer 150 is used for condensing light on the photosensitive pixel unit 120. In the FSI image sensor, light enters the photosensitive pixel unit 120 after passing through the signal collecting layer 140, so the color film layer 160 and the light concentrating layer 150 are located on the side of the signal collecting layer 140 away from the photosensitive pixel unit 120.

As shown in FIG. 2, the guard ring 110 may include a deep trench isolation 111 (DTI, deep trench isolation). The deep trench isolation 111 has a closed ring shape, and the deep trench isolation 111 surrounds a plurality of photosensitive pixel units 120. The deep trench isolation 111 may be a U-shaped trench that is etched on the substrate 122 by reactive ion, and then a conductive material is filled in the U-shaped trench to form the deep trench isolation 111. The depth of the deep trench isolation 111 extending into the substrate 122 is greater than the depth of the shallow trench isolation 130 extending into the substrate 122

It should be noted that in the manufacturing process of the plurality of photosensitive pixel units 120 in the embodiment of the present disclosure, the substrate 122 may be a monolithic substrate 122. By forming a hole on the substrate 122, an avalanche layer 121 and a cathode are formed in the hole. Layer 123 and so on.

Alternatively, as shown in FIG. 5, the guard ring 110 may include a semiconductor guard ring 112, the semiconductor guard ring 112 is disposed on the cathode layer 123, and the semiconductor guard ring 112 is in a closed ring shape. The material of the semiconductor guard ring 112 may be a semiconductor ring with a different doping concentration from other layers. For example, a heavily doped semiconductor ring (p-type heavily doped) may be provided on the substrate 122. Alternatively, an n-type semiconductor guard ring 112 may be provided on the substrate 122, and the doping concentration of the n-type semiconductor guard ring 112 is lower than that of the cathode layer 123 at this time. Of course, in practical applications, the protective ring 110 provided by the embodiment of the present disclosure may also be made of other materials, which is not specifically limited in the embodiment of the present disclosure.

When the guard ring 110 includes the semiconductor guard ring 112, a deep groove isolation 170 with a trapezoidal cross-section may be provided in addition to the annular semiconductor guard ring 112. The deep groove isolation 170 can prevent optical crosstalk between adjacent pixel regions, prevent carrier electrical crosstalk, and can improve the light collection efficiency of the photosensitive pixel unit 120 in the guard ring 110.

In the embodiment of the present disclosure, a plurality of photosensitive pixel units 120 may be arranged in one guard ring 110, and any two adjacent photosensitive pixel units 120 among the plurality of photosensitive pixel units 120 are separated by a shallow groove isolation 130. For example, the photosensitive pixel unit 120 may be a rectangular parallelepiped photosensitive pixel unit 120, and in this case, the guard ring 110 may have a rectangular frame shape. A plurality of photosensitive pixel units 120 may be arranged in an array in the guard ring 110. For example, the number of pixel sensing units in a guard ring 110 may be 2, 3, 4, 5...16, etc., and the photosensitive pixel units 120 are in the guard ring 110. The distribution mode within 110 can be 1×2, 1×3, 2×2, 1×5...4×4, etc. Of course, in practical applications, the number of photosensitive pixel units 120 in one guard ring 110 can also be other numbers, and the arrangement can also be other ways, and the embodiments of the present disclosure are not limited thereto.

Generally, in order to reduce the premature breakdown of the pixel sensing unit, the width of the guard ring 110 should be at least 1 micron, and the process requires the smallest isolation well to be at least 0.5 micron. Therefore, the distance between the effective photosensitive pixel units 120 needs to be at least 2.5 microns. In the related art, each pixel needs to be surrounded by a guard ring 110 structure. The minimum distance between the pixel avalanche layer 121 and the protection ring 110 is limited by the technical process. The minimum distance between the avalanche layer 121 and the protection ring 110 is 1 micrometer, and the width of the protection ring 110 should not be less than 0.5 micrometer. This directly results in that when the pixel pitch in the image sensor is less than 5 microns, the fill factor FF of the image sensor will be less than 20%. As shown in FIG. 7, the shallow groove isolation 130 is adopted in the embodiment of the present disclosure to reduce the minimum distance between the photosensitive pixel unit 120 and the photosensitive pixel unit 120 from 2La+LDTI≥2.5 micrometers to LSTI=1 micrometer. The isolation 130 and the shared guard ring 110 can reduce the interval between adjacent pixels to 1 micron.

The photosensitive pixel module 100 provided by the embodiment of the present disclosure is suitable for any wavelength of visible light to near-infrared light. However, considering that current similar time-of-flight sensors all use 940nm laser light source to avoid the interference of the sun's background light, the photosensitive pixel module 100 silicon The thickness of the wafer can be controlled at about 10 to 3 microns, because the penetration depth of the 940nm light source in the silicon wafer is about 10 microns. The thickness of the photosensitive pixel module 100 refers to the size from the surface under the cathode layer 123 to the upper surface of the anode layer.

In the photosensitive pixel module 100 provided by the embodiment of the present disclosure, a plurality of photosensitive pixel units 120 are arranged in the guard ring 110, and a shallow groove is arranged between any two adjacent photosensitive pixel units 120 among the plurality of photosensitive pixel units 120. 130 is isolated to achieve photoelectric conversion, and because multiple photosensitive pixel units 120 share the guard ring 110, the area occupied by the guard ring 110 is reduced, and the proportion of the photosensitive pixel unit 120 per unit area is increased, which is beneficial to improve the image sensor The imaging quality.

Exemplary embodiments of the present disclosure also provide an image sensor 010. As shown in FIG. 8, the image sensor includes the aforementioned photosensitive pixel module 100.

The image sensor may include a plurality of photosensitive pixel modules 100, and the plurality of photosensitive pixel modules 100 are arranged in an array. When fabricating the image sensor, the photosensitive pixel unit 120 layer and the signal collection layer 140 can be fabricated separately, and then the photosensitive unit layer and the signal collection layer 140 are stacked by 3D stacking technology.

On the one hand, in terms of process technology, the 3D stacking of the photosensitive pixel unit 120 layer can be processed separately from the signal acquisition layer 140, and different process nodes can be used, which is conducive to the flexible design and power consumption control of the signal acquisition layer 140 (reading circuit) . In terms of technology, the current mainstream CIS chips all use BSI+3D stacking. On the other hand, in terms of power consumption, due to the 3D stacking process, the pixel unit layer and the signal acquisition layer 140 can use different processes, especially the signal acquisition layer 140 is made of more advanced small processes, which can greatly save power consumption. . It is estimated that one-half of the power consumption can be saved.

The image sensor provided by the embodiment of the present disclosure includes a photosensitive pixel module 100, by arranging a plurality of photosensitive pixel units 120 in the guard ring 110, and between any two adjacent photosensitive pixel units 120 among the plurality of photosensitive pixel units 120 The shallow groove isolation 130 is used for isolation, which can realize photoelectric conversion, and since multiple photosensitive pixel units 120 share the guard ring 110, the area occupied by the guard ring 110 is reduced, and the proportion and fill factor of the photosensitive pixel unit 120 per unit area are increased. , Help to improve the imaging quality of the image sensor.

Exemplary embodiments of the present disclosure also provide an electronic device, which includes the above-mentioned image sensor 010.

The image sensor 010 provided by the embodiment of the present disclosure may be used in a camera module of an electronic device to realize functions such as taking pictures and video recording of the electronic device. The camera module of the electronic device may also include a lens, and the lens is used to transmit external light to the image sensor. Or the image sensor can be used for 3D distance measurement of electronic devices, such as distance measurement in augmented reality devices or mixed reality devices.

As shown in FIG. 9, the electronic device 100 provided by the embodiment of the present disclosure further includes a display screen 10, a frame 20, a main board 30, a battery 40 and a back cover 50. Wherein, the display screen 10 is installed on the frame 20 to form the display surface of the electronic device, and the display screen 10 serves as the front shell of the electronic device 100. The back cover 50 is pasted on the frame by double-sided tape, and the display screen 10, the frame 20 and the back cover 50 form a receiving space for accommodating other electronic components or functional modules of the electronic device 100. At the same time, the display screen 10 forms the display surface of the electronic device 100 for displaying information such as images and texts. The display screen 10 may be a liquid crystal display (Liquid Crystal Display, LCD) or an Organic Light-Emitting Diode (OLED) display screen.

The display screen 10 may be provided with a glass cover. Wherein, the glass cover can cover the display screen 10 to protect the display screen 10 and prevent the display screen 10 from being scratched or damaged by water.

The display screen 10 may include a display area 11 and a non-display area 12. Among them, the display area 11 performs the display function of the display screen 10, and is used to display information such as images and texts. The non-display area 12 does not display information. The non-display area 12 can be used to set up functional modules such as a camera, a receiver, and a proximity sensor. In some embodiments, the non-display area 12 may include at least one area located at the upper and lower portions of the display area 11.

The display screen 10 may be a full screen. At this time, the display screen 10 can display information in a full screen, so that the electronic device 100 has a larger screen-to-body ratio. The display screen 10 only includes the display area 11 and does not include the non-display area. At this time, functional modules such as a camera and a proximity sensor in the electronic device 100 may be hidden under the display screen 10, and the fingerprint recognition module of the electronic device 100 may be arranged on the back of the electronic device 100.

The frame 20 may be a hollow frame structure. The material of the frame 20 may include metal or plastic. The main board 30 is installed inside the above-mentioned accommodating space. For example, the main board 30 may be installed on the frame 20 and be housed in the above-mentioned receiving space together with the frame 20. A grounding point is provided on the main board 30 to realize the grounding of the main board 30. The motherboard 30 can be integrated with one or more of functional modules such as a motor, a microphone, a speaker, a receiver, a headphone interface, a universal serial bus interface (USB interface), a camera, a proximity sensor, an ambient light sensor, a gyroscope, and a processor. . At the same time, the display screen 10 can be electrically connected to the main board 30.

The main board 30 is provided with a display control circuit. The display control circuit outputs electrical signals to the display screen 10 to control the display screen 10 to display information.

The battery 40 is installed inside the above-mentioned storage space. For example, the battery 40 may be installed on the frame 20 and stored in the aforementioned storage space together with the frame 20. The battery 40 may be electrically connected to the main board 30 to implement the battery 40 to supply power to the electronic device 100. Wherein, the main board 30 may be provided with a power management circuit. The power management circuit is used to distribute the voltage provided by the battery 40 to various electronic components in the electronic device 100.

The back cover 50 is used to form the outer contour of the electronic device 100. The back cover 50 may be integrally formed. During the molding process of the back cover 50, a rear camera hole, a fingerprint recognition module mounting hole, and other structures may be formed on the back cover 50.

The lens may be located in the rear camera hole on the rear cover 50, and the image sensor 010 may be located in the middle frame, the rear cover, or the main board. The image sensor 010 can be connected to the image processor on the main board for transmitting photoelectric signals to the main board.

The electronic device provided by the embodiment of the present disclosure includes an image sensor 010. A plurality of photosensitive pixel units 120 are arranged in the guard ring 110, and any two adjacent photosensitive pixel units 120 are arranged between any two of the plurality of photosensitive pixel units 120. The shallow groove isolation 130 is used for isolation, which can realize photoelectric conversion, and since multiple photosensitive pixel units 120 share the guard ring 110, the area occupied by the guard ring 110 is reduced, and the proportion of the photosensitive pixel unit 120 per unit area is increased, which is beneficial to Improve the imaging quality of the image sensor.

Those skilled in the art will easily think of other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptive changes of the present disclosure. These variations, uses, or adaptive changes follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field that are not disclosed in the present disclosure. . The description and the embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the appended claims.

Claims

A photosensitive pixel module, wherein the photosensitive pixel module includes:

Protection ring

A plurality of photosensitive pixel units, the plurality of photosensitive pixel units are arranged in the guard ring;

Shallow groove isolation, the shallow groove isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units.
The photosensitive pixel module of claim 1, wherein the photosensitive pixel unit comprises:

A substrate having an anode area on the substrate, a first accommodating portion is provided on the substrate, the first accommodating portion is located on one side of the anode area, and the first accommodating portion is far away from the substrate. There is a first opening on one side of the anode area;

An avalanche layer, the avalanche layer is provided in the first accommodating portion of the substrate;

The cathode layer is provided on the avalanche layer, and the cathode layer is located on the side of the avalanche layer away from the anode region, and the cathode layer is exposed to the first opening.
The photosensitive pixel module of claim 2, wherein the photosensitive pixel unit further comprises:

The cathode diffusion layer is provided between the avalanche layer and the cathode layer.
3. The photosensitive pixel module of claim 3, wherein the depth of the shallow groove isolation is greater than the depth of the cathode layer, and the depth of the shallow groove isolation is less than the depth of the cathode diffusion layer.
3. The photosensitive pixel module of claim 3, wherein the cathode layer is embedded in the cathode diffusion layer, and a side of the cathode layer away from the avalanche layer is exposed to the cathode diffusion layer.
7. The photosensitive pixel module according to claim 5, wherein the shallow grooves are separated and arranged between the cathode diffusion layers of two adjacent photosensitive pixel units.
The photosensitive pixel module of claim 3, wherein the cathode layer and the cathode diffusion layer are doped with a first type dopant, and the avalanche layer and the substrate are doped with a second type dopant Things.
7. The photosensitive pixel module of claim 7, wherein the doping concentration of the cathode layer is greater than the doping concentration of the cathode diffusion layer, and the doping concentration of the avalanche layer is greater than the doping concentration of the substrate.
3. The photosensitive pixel module of claim 2, wherein the photosensitive pixel module further comprises:

A signal collection layer, the pixel collection layer is stacked on the side of the photosensitive pixel unit away from the light entrance side, the signal collection layer includes a signal collection circuit, and the signal collection circuit is connected to the photosensitive pixel unit.
The photosensitive pixel module of claim 1, wherein the photosensitive pixel unit comprises:

Substrate

A cathode layer, the cathode layer is provided on the substrate, a second accommodating portion is provided on the cathode layer, and the second accommodating portion is provided with a second opening on a side away from the substrate;

An avalanche layer, the avalanche layer is embedded on a side of the cathode layer away from the substrate, and the avalanche layer is exposed to the second opening;

The anode layer is provided on the side of the avalanche layer away from the substrate.
The photosensitive pixel module of claim 10, wherein the cathode layer includes a first type dopant, the avalanche layer and the anode layer include a second type dopant, and the doping of the avalanche layer The concentration is less than the doping concentration of the anode layer.
9. The photosensitive pixel module of claim 10, wherein the photosensitive pixel module further comprises:

A signal collection layer, the pixel collection layer is stacked on the light-incoming side of the photosensitive pixel unit, the signal collection layer includes a signal collection circuit, and the signal collection circuit is connected to the photosensitive pixel unit.
The photosensitive pixel module according to any one of claims 2-12, wherein the guard ring comprises:

Deep groove isolation, the deep groove isolation is in a closed ring shape, and the deep groove isolation surrounds a plurality of the photosensitive pixel units.
15. The photosensitive pixel module of claim 13, wherein the depth of the deep groove isolation extending into the substrate is greater than the depth of the shallow groove isolation extending into the substrate.
The photosensitive pixel module according to any one of claims 2-12, wherein the guard ring comprises:

A semiconductor guard ring, the semiconductor guard ring is in a closed ring shape, and the semiconductor guard ring surrounds a plurality of the photosensitive pixel units.
The photosensitive pixel module according to any one of claims 1-12, wherein the shallow groove isolation is filled with oxide.
The photosensitive pixel module according to any one of claims 1-12, wherein the photosensitive pixel module further comprises:

A light concentrating layer, the light concentrating layer is arranged on the light-incoming side of the photosensitive pixel unit, and the light concentrating layer is used for condensing light on the photosensitive pixel unit.
The photosensitive pixel module according to any one of claims 1-12, wherein the thickness of the photosensitive pixel module is 3 micrometers to 10 micrometers.
An image sensor, wherein the image sensor comprises the photosensitive pixel module according to any one of claims 1-18.
An electronic device, wherein the electronic device comprises the image sensor according to claim 18.