KR20060112116A - Method for fabricating fuse of semiconductor device - Google Patents

Abstract

A method for forming a fuse in a semiconductor device is provided to protect a semiconductor device from impact or stress from the outside by forming a sidewall spacer made of a material with small modulus on the sidewall of a fuse box. A passivation layer is formed on a semiconductor substrate(200) having a fuse layer(220). The passivation layer in a fuse box formation part is etched to form a fuse box exposing the fuse layer, made of a stack structure composed of an oxide layer and a nitride layer. A protection layer is formed on the resultant structure, made of a polyimide layer. The protection layer is etched to form a sidewall spacer(300) on the sidewall of the fuse box.

Description

Method for fabricating fuse of semiconductor device

1A to 1D are cross-sectional views illustrating a fuse forming method of a semiconductor device according to the prior art.

2A to 2D are cross-sectional views illustrating a fuse forming method of a semiconductor device in accordance with an embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

200 semiconductor substrate 210 first interlayer insulating film

220: fuse layer 230: second interlayer insulating film

240: first metal wiring 250: third interlayer insulating film

260: second metal wiring 270: first passivation layer

280: second passivation layer 290: protective layer

300: side wall spacer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fuse of a semiconductor device. In particular, a sidewall spacer made of a material having a small modulus is formed on a sidewall of a fuse box, which is a central part of a fuse crack, to protect the fuse from external impact or stress. It relates to a fuse forming method.

In the manufacture of a semiconductor device, especially a memory device, if any one of the many fine cells is defective, the semiconductor device does not function as a memory and thus is treated as a defective product.

However, even though only a few cells in the memory have failed, discarding the entire device as defective is an inefficient method of yield.

Therefore, the current yield is improved by replacing the defective cells by using a redundancy cell pre-installed in the memory device, thereby restoring the entire memory.

In the repair operation using spare memory cells, a spare row and a spare column are pre-installed in each cell array so that defective memory cells having defects are stored in row / column units. The process proceeds in a manner of laziness to a spare memory cell.

In detail, after the wafer processing is completed, a program for selecting a defective memory cell through a test and replacing the corresponding address with the address signal of the spare cell is performed in the internal circuit.

Therefore, in actual use, when an address signal corresponding to a bad line is input, the selection is switched to a spare line instead.

One of the programming methods is a method of burning a fuse with a laser beam, and the wiring broken by the laser irradiation is called a fuse line, and the broken portion and the area surrounding the fuse box are called fuse boxes. It is called a fuse box.

Hereinafter, with reference to the accompanying drawings, it will be described a problem of the fuse forming method according to the prior art.

1A to 1D are cross-sectional views illustrating a fuse forming method of a semiconductor device according to the prior art.

Referring to FIG. 1A, a first interlayer insulating film 20, a fuse layer 30, a second interlayer insulating film 40, a first metal wiring 50, and a third interlayer insulating film 60 are formed on a semiconductor substrate 10. And second metal wirings 70 are sequentially formed.

A first passivation layer 80 and a second passivation layer 90 are then formed over the entire surface.

Referring to FIG. 1B, a polyimide layer 100 is formed on the second passivation layer 90.

Referring to FIG. 1C, the polyimide layer 100 is etched, the second passivation layer 90, the first passivation layer 80, the second metal wiring 70, and the third interlayer insulating film 60. The fuse structure may be formed by etching the stacked structure of the first metal wire 50 and the second interlayer insulating film 40.

After the fuse box is formed, a subsequent process is performed, and after the electrical test of the semiconductor chip is completed, the packaging process is performed. At this time, the package material has a high modulus and thus a strong stress due to shrinkage is applied to the entire chip. Will be added to.

The portion of the fuse box may be relieved of stress by the passivation layer, but the portion of the fuse box may be affected by the stress because the passivation layer is removed.

Therefore, referring to FIG. 1D, strong stress is concentrated at the bottom 110 of the fuse box, and cracks are generated at the bottom edge of the fuse box 120 as a boundary of concentration, thereby causing an abnormal semiconductor device. The problem occurs that operates as.

Conventionally, in order to eliminate such defects, the fuse box which was opened by coating the polyimide layer again after the fuse cutting process was covered. There was a problem due to the need for cost and production date.

In addition, there has been a method of leaving the sidewall of the passivation layer in the related art, but there is still a problem in that the sidewall of the deposited passivation layer absorbs the stress caused by the package material.

In order to solve the above problems, the present invention forms a sidewall spacer made of a material having a small modulus on the sidewall of the fuse box, which is a central part of the fuse crack, in a method of forming a fuse of a semiconductor device, thereby preventing external impact or stress. It is an object of the present invention to protect the fuse to prevent abnormal operation of the semiconductor device.

The fuse forming method of the semiconductor device according to the present invention comprises the steps of forming a passivation layer on the semiconductor substrate having a fuse layer, forming a fuse box to expose the fuse layer by etching the passivation layer of the predetermined portion as a fuse box, Forming a protective layer over the entire surface, and etching the protective layer to form sidewall spacers on sidewalls of the fuse box.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

2A to 2D are cross-sectional views illustrating a fuse forming method of a semiconductor device according to an exemplary embodiment of the present invention.

Referring to FIG. 2A, a first interlayer insulating layer 210, a fuse layer 220, a second interlayer insulating layer 230, a first metal wiring 240, and a third interlayer insulating layer 250 are formed on the semiconductor substrate 200. And second metal wirings 260 are sequentially formed.

Subsequently, a stacked structure of the first passivation layer 270 and the second passivation layer 280 is formed on the entire surface.

It is preferable that the first passivation layer 270 is formed of an oxide film and the second passivation layer 280 is formed of a nitride film.

Referring to FIG. 2B, a second passivation layer 280, a first passivation layer 270, a second metal wiring 260, and a third interlayer insulating layer 250 may be formed by an etching process using a mask defining a portion defined as a fuse box. ), And a fuse structure of the first metal wiring 240 and the second interlayer insulating film 230 is etched.

Referring to FIG. 2C, a protective layer 290 is formed over the entire surface.

The protective layer 290 may be made of a material having a modulus smaller than the passivation layers 270 and 280 including polyimide.

In addition, the protective layer 290 is preferably photosensitive or non-photosensitive.

Referring to FIG. 2D, the protective layer 290 is etched to form sidewall spacers 300 on sidewalls of the fuse box.

In the method of forming a fuse of a semiconductor device according to an embodiment of the present invention, a sidewall spacer made of a polyimide-like material having a significantly low modulus value and a large coefficient of thermal expansion is placed on the sidewall of the fuse box, thereby providing a stress of the package material. It absorbs stress and prevents stress from concentrating on the bottom edge of the fuse box, thereby preventing the semiconductor device from operating abnormally, resulting in a drastic process reduction, and the existing thermal process is not added. The electrical characteristics of the can be maintained as it is.

Claims (5)

(a) forming a passivation layer on the semiconductor substrate including the fuse layer; (b) forming a fuse box to expose the fuse layer by etching the passivation layer in a portion intended as a fuse box; (c) forming a protective layer over the entire surface; and (d) etching the protective layer to form sidewall spacers on sidewalls of the fuse box. The method of claim 1, The passivation layer is a fuse forming method of the semiconductor device, characterized in that formed in a laminated structure of an oxide film and a nitride film. The method of claim 1, The protective layer is a fuse forming method of a semiconductor device, characterized in that made of a material having a modulus smaller than the passivation layer. The method of claim 1, The protective layer is a fuse forming method of a semiconductor device, characterized in that the polyimide layer. The method of claim 1, The protective layer is a fuse forming method of the semiconductor device, characterized in that the photosensitive or non-photosensitive.

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