KR20060107349A - Process for producing substrate with copper wiring or bump formed thereon - Google Patents

Process for producing substrate with copper wiring or bump formed thereon Download PDF

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Publication number
KR20060107349A
KR20060107349A KR1020060031037A KR20060031037A KR20060107349A KR 20060107349 A KR20060107349 A KR 20060107349A KR 1020060031037 A KR1020060031037 A KR 1020060031037A KR 20060031037 A KR20060031037 A KR 20060031037A KR 20060107349 A KR20060107349 A KR 20060107349A
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South Korea
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weight
copper
etching
substrate
hydrogen peroxide
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KR1020060031037A
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Korean (ko)
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켄이치 다카하시
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미츠비시 가스 가가쿠 가부시키가이샤
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Publication of KR20060107349A publication Critical patent/KR20060107349A/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/16Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation by cathodic sputtering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

에칭액으로 과산화수소 0.1~10 중량% 와 인산 0.5~50 중량% 를 함유하는 한편 과산화수소/인산의 중량비가 0.02~0.3 인 에칭액을 사용함으로써, 스퍼터링법에 의해 형성된 금속 박막층을 가지는 기판을 이용한 세미애디티브법에서의 세선 구리 배선 형성 및 범프 (BUMP) 형성에서, 시드층의 금속, 특히 스퍼터 구리 또는 스퍼터 니켈을 신속히 에칭 제거하고, 구리 배선의 배선폭 감소를 억제하여, 단선, 단락 등의 단점을 없애고, 범프 구성 금속을 침식하는 일이 없이, 신뢰성 높은 기판을 제조하는 방법을 제공한다.Semi-additive method using a substrate having a metal thin film layer formed by sputtering by using an etching solution containing 0.1 to 10% by weight of hydrogen peroxide and 0.5 to 50% by weight of phosphoric acid as the etching solution and a weight ratio of hydrogen peroxide / phosphate to 0.02 to 0.3 In forming thin wire copper wiring and bump (BUMP) in, the metal of the seed layer, in particular sputter copper or sputter nickel, is etched away quickly and the reduction in wiring width of the copper wiring is suppressed, eliminating shortcomings such as disconnection and short circuit, Provided is a method of manufacturing a highly reliable substrate without eroding the bump constituent metal.

Description

구리 배선 또는 범프가 형성된 기판의 제조 방법{PROCESS FOR PRODUCING SUBSTRATE WITH COPPER WIRING OR BUMP FORMED THEREON}A manufacturing method of a board | substrate with copper wiring or bumps {PROCESS FOR PRODUCING SUBSTRATE WITH COPPER WIRING OR BUMP FORMED THEREON}

본 발명은 세미애디티브법으로 구리 배선 또는 범프가 형성된 기판의 제조 방법에 관한 것이다.This invention relates to the manufacturing method of the board | substrate with which copper wiring or bump was formed by the semiadditive process.

근래 전자기기용 배선 기판의 분야에서, 고밀도 실장화에 수반해 구리 배선의 세선화가 급속히 진행되어 배선폭 및 배선 간격이 현저히 좁아지고 있다. 또한, 웨이퍼 레벨 칩 사이즈 패키지 (Wafer-level Chip Size Package) 의 분야에서는 세미애디티브법에 의한 세선 구리 배선의 형성이나, 범프 [BUMP: 기판과 패키지 접속하기 위해서 마련한 작은 혹 형상의 도체 돌기] 형성이 주류이다. BACKGROUND ART In recent years, in the field of wiring boards for electronic devices, thinning of copper wiring has rapidly progressed with high-density mounting, and the wiring width and wiring spacing are significantly narrowed. Further, in the field of wafer-level chip size packages, the formation of thin copper wiring by the semi-additive method and the formation of bumps [BUMP: small hump-shaped conductor protrusions provided for connecting the substrate and the package] are formed. This is mainstream.

세미애디티브법에서는 기판 상에 금속 박막층 (이하 「시드층」이라고 한다) 을 무전해 도금 또는 스퍼터링법 등의 물리적인 방법으로 마련하고, 그 위에 포토리소그래피에 의해 배선 형성용 또는 범프 형성용 레지스트 패턴을 형성한다. 나아가 구리 배선 형성의 경우, 전기 구리 도금을 실시하고 마지막에 레지스트를 박리한 후 불필요해진 시드층을 에칭 제거해 구리 배선이 형성된다. 범프 형성의 경우에는 범프가 되는 금속, 예를 들면 납땜 도금을 실시하고, 마지막에 레지스트를 박리한 후 불필요해진 시드층을 에칭 제거해 범프가 형성된다.In the semiadditive process, a metal thin film layer (hereinafter referred to as a "seed layer") is formed on a substrate by a physical method such as electroless plating or sputtering, and a resist pattern for wiring formation or bump formation by photolithography thereon. To form. Further, in the case of copper wiring formation, the copper wiring is formed by performing electrocopper plating and finally removing the resist and etching away the unnecessary seed layer. In the case of bump formation, bump metal is formed, for example, solder plating is performed, and after removing the resist at last, the unnecessary seed layer is etched away to form bumps.

본 발명자들은 이 세미애디티브법에서 시드층의 구리 에칭액으로, 과산화수소-황산에 아졸류를 첨가한 계를 제안하고 있다 (일본 특개 2005-5341 호 공보 참조). 상기 에칭액은 시드층이 무전해 구리 도금인 경우는 양호한 에칭을 할 수 있지만, 시드층이 스퍼터링법으로 형성된 구리 (스퍼터 구리) 인 경우는 완전하게 에칭 제거할 수 없다. 스퍼터 구리는 절연층 상에 미립자 상태로 조밀하게 물리적으로 형성되기 때문에, 무전해 구리 도금보다도 에칭 제거하는 것이 곤란하다. 그 때문에, 완전하게 에칭 제거시키기 위해 오버에칭하면, 구리 배선폭이 감소한다. 또, 구리 배선 측면 또는 표면에 구리 이외의 금속 피막을 형성해 시드층의 구리를 에칭하는 방법도 제안되어 있지만, 상술한 약액과 마찬가지로 시드층이 스퍼터 구리인 경우는 완전하게 에칭 제거를 할 수 없다 (일본 특개평 9-162523 호 공보, 특개 2003-78234 호 공보 참조).The present inventors have proposed a system in which azoles are added to hydrogen peroxide-sulfuric acid as a copper etching solution of a seed layer in this semiadditive process (see Japanese Patent Laid-Open No. 2005-5341). When the seed layer is electroless copper plating, the etching solution can be etched well, but when the seed layer is copper (sputtered copper) formed by the sputtering method, etching cannot be completely removed. Since sputtered copper is physically formed densely in a particulate state on the insulating layer, it is more difficult to etch away than electroless copper plating. For this reason, overetching to completely etch away reduces the copper wiring width. Moreover, although the method of etching metal of a seed layer by forming a metal film other than copper on the copper wiring side or surface is also proposed, when a seed layer is sputter copper like the above-mentioned chemical | medical solution, etching removal cannot be performed completely ( See Japanese Patent Application Laid-open No. Hei 9-162523 and No. 2003-78234).

세미애디티브법에서 시드층의 니켈 에칭액에 관해서는 과산화물-질산-황산계가 제안되어 있지만, 시드층이 스퍼터링법으로 형성된 니켈 (스퍼터 니켈) 인 경우는 에칭 제거가 완전하게 될 수 없다 (일본 특개 2001-140084 호 공보 참조). 따라서, 세미애디티브법에서의 세선 구리 배선 형성에서, 구리 배선의 배선폭 감소를 억제하고, 시드층의 스퍼터 구리 또는 스퍼터 니켈을 에칭 제거하는 방법의 실용화가 요구되고 있다.Although the peroxide-nitrate-sulfuric acid system has been proposed for the nickel etching solution of the seed layer in the semi-additive process, the etching removal cannot be completed when the seed layer is nickel (sputter nickel) formed by the sputtering method. -140084 publication). Therefore, in forming thin wire copper wiring in the semi-additive method, it is required to put practical use of the method of suppressing the reduction in the wiring width of the copper wiring and etching away the sputtered copper or sputter nickel of the seed layer.

본 발명은 스퍼터링법에 의해 형성된 금속 박막층을 가지는 기판을 이용한 세미애디티브법에서의 세선 구리 배선 형성 및 범프 형성에서, 시드층의 금속, 특히 스퍼터 구리 또는 스퍼터 니켈을 신속히 에칭 제거하고, 구리 배선의 배선폭 감소를 억제하여, 단선, 단락 등의 단점을 없애고, 범프 구성 금속을 침식하는 일이 없이, 신뢰성 높은 기판을 제조하는 방법을 제공하는 것이다.The present invention is to quickly etch away and remove metal of the seed layer, in particular sputter copper or sputter nickel, in the thin-wire copper wiring formation and bump formation in the semiadditive process using a substrate having a metal thin film layer formed by sputtering. It is possible to provide a method of manufacturing a highly reliable substrate by suppressing a reduction in wiring width, eliminating shortcomings such as disconnection and short circuit, and not corroding the bump constituent metal.

본 발명자들은 상기 과제를 해결하기 위해 열심히 연구 조사를 거듭한 결과, 스퍼터링법에 의해 형성된 금속 박막층을 가지는 기판을 이용한 세미애디티브법에서의 금속 박막층의 에칭액으로 과산화수소 및 인산을 특정 농도 및 비율로 함유하는 에칭액을 사용함으로써 상기 과제를 해결할 수 있는 것을 발견하여, 본 발명을 완성시키기에 이르렀다.MEANS TO SOLVE THE PROBLEM As a result of earnestly researching in order to solve the said subject, as a result, the etching solution of the metal thin film layer in the semiadditive process using the board | substrate which has the metal thin film layer formed by the sputtering method contains hydrogen peroxide and phosphoric acid in a specific concentration and ratio. By using the etchant to make it possible to solve the above problems, the present invention has been completed.

즉, 본 발명은 스퍼터링법에 의해 형성된 금속 박막층을 가지는 기판을 이용해, 상기 금속 박막층 상에 레지스트 패턴을 형성한 후 전해 구리 도금을 실시하거나 또는 범프용 금속의 도금을 실시하고, 다음에 레지스트의 제거 및 에칭에 의한 금속 박막층의 제거를 수행하는 세미애디티브법에 의해, 구리 배선 또는 범프가 형성된 기판을 제조하는 방법에서, 에칭액으로 과산화수소 0.1~10 중량% 와 인산 0.5~50 중량% 를 함유하는 한편 과산화수소/인산의 중량비가 0.02~0.3 인 에칭액을 사용하는 구리 배선 또는 범프가 형성된 기판의 제조 방법에 관한 것이다.That is, in the present invention, a resist pattern is formed on the metal thin film layer by using a substrate having a metal thin film layer formed by sputtering, followed by electrolytic copper plating or plating of bump metal, followed by removal of the resist. And 0.1 to 10% by weight of hydrogen peroxide and 0.5 to 50% by weight of phosphoric acid as an etching solution in the method for producing a substrate having copper wiring or bumps by a semiadditive process for removing the metal thin film layer by etching. The manufacturing method of the board | substrate with a copper wiring or bump formed using the etching liquid whose weight ratio of hydrogen peroxide / phosphoric acid is 0.02-0.3.

발명을 실시하기 위한 최선의 형태Best Mode for Carrying Out the Invention

본 발명의 기판의 제조 방법의 에칭액에 사용하는 과산화수소 농도는 0.1~10 중량% 이며, 바람직하게는 0.5~5 중량% 이다. 과산화수소 농도가 0.1 중량% 미만 에서는 충분한 에칭 속도가 얻어지지 않고, 10 중량% 를 넘으면 구리 배선의 배선폭 감소가 현저해지기 때문에 바람직하지 않다.The hydrogen peroxide concentration used for the etching liquid of the manufacturing method of the board | substrate of this invention is 0.1-10 weight%, Preferably it is 0.5-5 weight%. If the hydrogen peroxide concentration is less than 0.1% by weight, a sufficient etching rate cannot be obtained, and if it exceeds 10% by weight, the reduction in the wiring width of the copper wiring becomes significant.

본 발명의 기판의 제조 방법의 에칭액에 사용하는 인산 농도는 0.5~50 중량% 이며, 바람직하게는 2.5~25 중량% 이다. 인산 농도가 0.5 중량% 미만에서는 충분한 에칭 속도가 얻어지지 않고, 50 중량% 를 넘어도 그 이상의 효과를 얻을 수 없기 때문에 경제상 바람직하지 않다.The phosphoric acid concentration used for the etching liquid of the manufacturing method of the board | substrate of this invention is 0.5-50 weight%, Preferably it is 2.5-25 weight%. If the phosphoric acid concentration is less than 0.5% by weight, a sufficient etching rate cannot be obtained, and even if it exceeds 50% by weight, no further effect can be obtained.

또, 에칭액에 있어서의 과산화수소와 인산의 중량비 (과산화수소/인산) 는 0.02~0.3 이다. 과산화수소와 인산의 중량비가 0.02 미만 및 0.3 을 넘으면 시드층의 에칭 제거성이 충분하지 않고, 0.3 을 넘으면 특히 구리 배선 형성시에 구리 배선의 배선폭 감소가 현저해지기 때문에 바람직하지 않다.Moreover, the weight ratio (hydrogen peroxide / phosphate) of hydrogen peroxide and phosphoric acid in etching liquid is 0.02-0.3. If the weight ratio of hydrogen peroxide and phosphoric acid is less than 0.02 and more than 0.3, the etching removal property of the seed layer is not sufficient, and if it exceeds 0.3, the wiring width of the copper wiring becomes particularly remarkable when forming the copper wiring, which is not preferable.

기판으로는 Ti, Si, Sn, Cr 및 그 합금이, Ti, TiN, TiW, Si, SiO2, SiN, Sn, SnPb, SnAg, Cr, CrNi 등의 금속으로 이루어지며, 주로 웨이퍼 레벨 칩 사이즈 패키지에 사용되는 기판이나 폴리이미드를 베이스로 하는 플렉시블 기판 등을 들 수 있다.As the substrate, Ti, Si, Sn, Cr, and alloys thereof are made of metals such as Ti, TiN, TiW, Si, SiO 2 , SiN, Sn, SnPb, SnAg, Cr, CrNi, and mainly wafer-level chip size packages. The flexible board | substrate etc. which are based on the board | substrate and polyimide used for this etc. are mentioned.

본 발명에 있어서 에칭의 대상이 되는 시드층을 형성하는 금속은 스퍼터링법에 의해 형성된 구리, 니켈 등의 금속이다.In the present invention, the metal for forming the seed layer to be etched is a metal such as copper or nickel formed by the sputtering method.

본 발명에 있어서 에칭액과 대상물과의 접촉 방법은 특별히 제한은 없고, 침지 처리, 스프레이 처리 등으로 수행할 수 있다. 에칭 처리 온도는 20~60℃ 가 바람직하다. 처리 온도가 60℃ 를 넘으면 과산화수소의 분해가 촉진되기 때문에 바 람직하지 않다. 에칭 처리 시간에 관해서는 대상물의 표면 상태나 형상에 맞추어 최적인 시간을 선택하지만, 실용적으로는 30 초~120 초가 바람직하다. 에칭 처리 후에 에칭액이 대상물에 부착된 채로 방치하면 구리 표면이 산화 변색해 얼룩지게 되므로, 에칭 처리 후에는 신속하게 물 세정을 수행하는 것이 바람직하다.In this invention, the contact method of an etching liquid and an object does not have a restriction | limiting in particular, It can carry out by an immersion process, a spray process, etc. As for etching process temperature, 20-60 degreeC is preferable. If the treatment temperature exceeds 60 ° C., decomposition of hydrogen peroxide is promoted, which is not preferable. As for the etching treatment time, an optimum time is selected in accordance with the surface state and shape of the object, but practically, 30 seconds to 120 seconds are preferable. If the etching solution is left attached to the object after the etching treatment, the copper surface is oxidized and discolored and stained. Therefore, it is preferable to perform the water washing promptly after the etching treatment.

본 발명에서 사용되는 에칭액의 관리는, 금속의 용해에 수반해 각 성분 농도가 저하하므로 각 성분 농도를 분석에 의해 산출해 부족분을 보충한다. 또, 금속 용해량이 증가하는 것에 따라 에칭 속도가 저하하므로, 금속 용해량이 15 g/ℓ 를 넘은 단계에서 액을 갱신하는 것이 바람직하다.In the management of the etching solution used in the present invention, the concentration of each component decreases with dissolution of the metal, so that each component concentration is calculated by analysis to compensate for the shortage. In addition, since the etching rate decreases as the amount of dissolved metal increases, it is preferable to update the liquid at a stage where the amount of dissolved metal exceeds 15 g / L.

실시예Example

이하에 실시예 및 비교예에 의해 본 발명을 구체적으로 설명하지만, 본 발명은 이하의 실시예로 한정되는 것이 아니다.Although an Example and a comparative example demonstrate this invention concretely below, this invention is not limited to a following example.

실시예 1Example 1

과산화수소 1 중량%, 인산 10 중량% (과산화수소/인산 중량비 = 0.10) 를 함유하는 에칭액을 조합했다. 다음에, 실리콘 웨이퍼 기판 상에 0.5 ㎛ 두께의 스퍼터 구리막을 형성하고, 그 위에 포토리소그래피에 의해 레지스트 패턴을 형성하고, 6 ㎛ 두께의 전기 구리 도금을 실시하고, 마지막에 레지스트를 박리하여, 구리 배선폭/배선 스페이스가 15 ㎛/10 ㎛ 인 시험 기판을 작성했다.The etching liquid containing 1 weight% hydrogen peroxide and 10 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.10) was combined. Next, a 0.5 micrometer-thick sputtered copper film is formed on a silicon wafer substrate, a resist pattern is formed by photolithography, electro-copper plating of 6 micrometers thick, and finally, a resist is peeled off and copper wiring The test board | substrate whose width / wiring space is 15 micrometers / 10 micrometers was created.

상기 기판을 30℃의 에칭액으로 침지 처리하여, 배선 스페이스 부분인 시드층의 스퍼터 구리가 완전하게 에칭 제거될 때까지의 시간을 측정했다. 또한, 에칭 처리 전후의 구리 배선폭을 광학 현미경을 이용해 측정해, 배선폭 감소량을 산출했 다. 결과를 표 1 에 나타낸다.The said board | substrate was immersed in 30 degreeC etching liquid, and time until the sputter | spatter copper of the seed layer which is a wiring space part was completely etched away was measured. In addition, the copper wiring width before and after the etching process was measured using the optical microscope, and the wiring width reduction amount was calculated. The results are shown in Table 1.

실시예 2Example 2

실시예 1 에서 에칭액으로 과산화수소 0.5 중량%, 인산 8 중량% (과산화수소/인산 중량비 = 0.06) 를 함유하는 에칭액을 이용하는 것 이외에는 실시예 1 과 같게 수행해, 제거 시간과 배선폭 감소량을 측정 산출했다. 결과를 표 1 에 나타낸다.Except having used the etching liquid containing 0.5 weight% hydrogen peroxide and 8 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.06) as an etching liquid in Example 1, it carried out similarly to Example 1, and removed and calculated the amount of removal time and wiring width reduction. The results are shown in Table 1.

비교예 1Comparative Example 1

실시예 1 에서 에칭액으로 과산화수소 1 중량%, 황산 4 중량%, 1H-테트라졸 0.01 중량% 를 함유하는 에칭액을 이용하는 것 이외에는 실시예 1 과 같게 수행해, 제거 시간과 배선폭 감소량을 측정 산출했다. 결과를 표 1 에 나타낸다.In Example 1, it carried out similarly to Example 1 except using the etching liquid containing 1 weight% of hydrogen peroxide, 4 weight% of sulfuric acid, and 0.01 weight% of 1H- tetrazole, and the removal time and the wiring width reduction amount were measured and calculated. The results are shown in Table 1.

비교예 2Comparative Example 2

실시예 1 에서 에칭액으로 과산화수소 3 중량%, 인산 3 중량% (과산화수소/인산 중량비 = 1.00) 를 함유하는 에칭액을 이용하는 것 이외에는 실시예 1 과 같게 수행해, 제거 시간과 배선폭 감소량을 측정 산출했다. 결과를 표 1 에 나타낸다.Except having used the etching liquid containing 3 weight% of hydrogen peroxide and 3 weight% of phosphoric acid (hydrogen peroxide / phosphate weight ratio = 1.00) as an etching liquid in Example 1, it carried out similarly to Example 1, and measured the removal time and the wiring width reduction amount. The results are shown in Table 1.

실시예 3Example 3

과산화수소 1.5 중량%, 인산 15 중량% (과산화수소/인산 중량비 = 0.10) 를 함유하는 에칭액을 조합했다. 다음에, 폴리이미드 기판 상에 0.3 ㎛ 두께의 스퍼터 니켈막을 형성하고, 그 위에 포토리소그래피에 의해 패턴 레지스트를 형성하고, 6 ㎛ 두께의 전기 구리 도금을 실시하고, 마지막에 레지스트를 박리하여, 구리 배 선폭/배선 스페이스가 15 ㎛/10 ㎛ 인 시험 기판을 작성했다. The etching liquid containing 1.5 weight% hydrogen peroxide and 15 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.10) was combined. Next, a 0.3 micrometer-thick sputtered nickel film was formed on a polyimide substrate, a pattern resist was formed by photolithography, electroplating copper plating of 6 micrometers thick, and finally, the resist was peeled off and copper doubled. A test substrate having a line width / wiring space of 15 μm / 10 μm was created.

상기 기판을 30℃ 의 에칭액으로 스프레이 처리 (스프레이압 0.03 MPa) 하여, 배선 스페이스 부분인 시드층의 스퍼터 니켈이 완전하게 에칭 제거될 때까지의 시간을 측정했다. 또한, 에칭 처리 전후의 구리 배선폭을 광학 현미경을 이용해 측정하여, 배선폭 감소량을 산출했다. 결과를 표 1 에 나타낸다.The said board | substrate was spray-processed by 30 degreeC etching liquid (spray pressure 0.03 Mpa), and time until the sputter nickel of the seed layer which is a wiring space part was completely etched away was measured. In addition, the copper wiring width before and behind an etching process was measured using the optical microscope, and the wiring width reduction amount was computed. The results are shown in Table 1.

비교예 3Comparative Example 3

실시예 3 에서 에칭액으로 과산화수소 0.3 중량%, 질산 30 중량%, 황산 6 중량%, 염화나트륨 0.01 중량%, 2-클로로-피리딘 1 중량% 를 함유하는 에칭액을 이용하는 것 이외에는 실시예 3 과 같게 수행해, 제거 시간과 배선폭 감소량을 측정 산출했다. 결과를 표 1 에 나타낸다.Except for using the etching solution containing 0.3% by weight of hydrogen peroxide, 30% by weight of nitric acid, 6% by weight of sulfuric acid, 0.01% by weight of sodium chloride, 1% by weight of 2-chloro-pyridine as an etching solution in Example 3, removal was performed. The amount of time and wiring width reduction were measured and calculated. The results are shown in Table 1.

비교예 4Comparative Example 4

실시예 1 에서 에칭액으로 과산화수소 1.5 중량%, 인산 15 중량%, 염소 이온 2 ppm 을 함유하는 에칭액을 이용하는 것 이외에는 실시예 3 과 같게 수행해, 제거 시간과 배선폭 감소량을 측정 산출했다. 결과를 표 1 에 나타낸다.In Example 1, it carried out similarly to Example 3 except having used the etching liquid containing 1.5 weight% of hydrogen peroxide, 15 weight% of phosphoric acid, and 2 ppm of chlorine ion as an etching liquid, and the removal time and the wiring width reduction amount were measured and calculated. The results are shown in Table 1.

제거 시간 (초)Removal time (seconds) 배선폭 감소량 (㎛)Reduced wiring width (㎛) 실시예 1Example 1 4040 <1<1 실시예 2Example 2 5050 <1<1 실시예 3Example 3 4545 <1<1 비교예 1Comparative Example 1 300300 55 비교예 2Comparative Example 2 180180 88 비교예 3Comparative Example 3 600600 88 비교예 4Comparative Example 4 600600 88

표 1 에 나타내듯이, 본 발명의 에칭 방법에 의해 세미애디티브법에서의 세선 구리 배선 형성에서, 구리 배선의 배선폭 감소를 억제하고, 시드층의 스퍼터 구리 또는 스퍼터 니켈을 에칭 제거할 수 있다.As shown in Table 1, in the thin-wire copper wiring formation by the semiadditive process by the etching method of this invention, reduction of the wiring width of a copper wiring can be suppressed and the sputter | spatter copper or sputter nickel of a seed layer can be etched away.

실시예 4Example 4

과산화수소 1 중량%, 인산 12 중량% (과산화수소/인산 중량비 = 0.08) 를 함유하는 에칭액을 조합했다. The etching liquid containing 1 weight% hydrogen peroxide and 12 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.08) was combined.

스퍼터 구리를 적용한 기판 및 전기 구리 도금을 실시한 기판을 이용하여 각 기판을 30℃ 에서 요동 처리로 60 초 처리해, 각각의 구리에서의 에칭 속도를 산출했다. 에칭 속도의 산출은, 스퍼터 구리는 형광 X 선을 이용해 처리 전후의 막 두께를 측정하고 전기 구리 도금은 처리 전후의 중량 차이를 측정해, 각각의 구리의 에칭량을 산출했다.Each board | substrate was processed for 60 second by the shaking process at 30 degreeC using the board | substrate to which sputtered copper was applied, and the board | substrate which electroplated with copper, and the etching rate in each copper was computed. As for the calculation of the etching rate, sputter | spatter copper measured the film thickness before and behind a process using the fluorescent X-ray, and electrocopper plating measured the weight difference before and behind a process, and computed the etching amount of each copper.

실시예 5Example 5

과산화수소 1 중량%, 인산 4 중량% (과산화수소/인산 중량비 0.25) 를 함유하는 에칭액을 이용하는 것 이외에는 실시예 4 와 같게 수행해, 에칭량을 산출했다.It carried out similarly to Example 4 except having used the etching liquid containing 1 weight% of hydrogen peroxide and 4 weight% of phosphoric acid (hydrogen peroxide / phosphate weight ratio 0.25), and the etching amount was computed.

비교예 5Comparative Example 5

과산화수소 1 중량%, 인산 2 중량% (과산화수소/인산 중량비 = 0.5) 를 함유하는 에칭액을 조합했다. 스퍼터 구리를 적용한 기판 및 전기 구리 도금을 실시한 기판을 이용하여 각 기판을 30℃ 에서 요동 처리로 60 초 처리해, 각각의 구리에서의 에칭 속도를 산출했다. 에칭 속도의 산출은, 스퍼터 구리는 형광 X 선을 이용해 처리 전후의 막 두께를 측정하고 전기 구리 도금은 처리 전후의 중량 차이를 측정해, 각각의 구리의 에칭량을 산출했다.The etching liquid containing 1 weight% hydrogen peroxide and 2 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.5) was combined. Each board | substrate was processed for 60 second by the shaking process at 30 degreeC using the board | substrate to which sputtered copper was applied, and the board | substrate which electroplated with copper, and the etching rate in each copper was computed. As for the calculation of the etching rate, sputter | spatter copper measured the film thickness before and behind a process using the fluorescent X-ray, and electrocopper plating measured the weight difference before and behind a process, and computed the etching amount of each copper.

비교예 6Comparative Example 6

과산화수소 5 중량%, 인산 1 중량% (과산화수소/인산 중량비 5.0) 를 함유하는 에칭액을 이용하는 것 이외에는 비교예 5 와 같게 수행해, 에칭량을 산출했다.The etching amount was calculated in the same manner as in Comparative Example 5 except that an etching solution containing 5% by weight of hydrogen peroxide and 1% by weight of phosphoric acid (hydrogen peroxide / phosphate weight ratio 5.0) was used.

비교예 7Comparative Example 7

과산화수소, 황산을 주성분으로 하는 미츠비시 가스 가가쿠 가부시키가이샤제 에칭액 CPE-700 을 과산화수소 1 중량% 가 되도록 조정한 에칭액을 이용하는 것 이외에는 비교예 5 와 같게 수행해, 에칭량을 산출했다. The etching amount was computed similarly to the comparative example 5 except having used the etching liquid which adjusted the etching liquid CPE-700 by Mitsubishi Gas Chemical Co., Ltd. which mainly contains hydrogen peroxide and sulfuric acid to 1 weight% of hydrogen peroxide.

결과를 표 2 에 나타낸다The results are shown in Table 2.

에칭 속도 스퍼터 구리 (㎛/분)Etch Rate Sputtered Copper (μm / min) 에칭 속도 전기 도금 구리 (㎛/분)Etching Rate Electroplated Copper (μm / min) 에칭 속도비 스퍼터 구리/전기 도금 구리Etching Rate Ratio Sputter Copper / Electroplating Copper 실시예 4Example 4 0.700.70 0.600.60 1.171.17 실시예 5Example 5 0.600.60 0.580.58 1.031.03 비교예 5Comparative Example 5 0.540.54 0.710.71 0.760.76 비교예 6Comparative Example 6 0.330.33 0.700.70 0.470.47 비교예 7Comparative Example 7 0.500.50 1.401.40 0.360.36

실시예 6Example 6

과산화수소 0.9 중량%, 인산 10 중량% (과산화수소/인산 중량비 = 0.09) 를 함유하는 에칭액을 조합했다. SnAg 납땜 도금을 실시한 시험편을 이용하여 30℃ 에서 침지하여 10 분 처리를 수행했다. 처리 전후의 중량을 측정해, 에칭 속도를 산출했다. 또, 표면 상태를 관찰했다.The etching liquid containing 0.9 weight% hydrogen peroxide and 10 weight% phosphoric acid (hydrogen peroxide / phosphate weight ratio = 0.09) was combined. The test piece which performed SnAg solder plating was immersed at 30 degreeC, and the process was performed for 10 minutes. The weight before and after the treatment was measured, and the etching rate was calculated. Moreover, the surface state was observed.

비교예 8Comparative Example 8

과산화수소 1 중량%, 황산 5 중량% 를 함유하는 에칭액을 조합했다. The etching liquid containing 1 weight% hydrogen peroxide and 5 weight% sulfuric acid was combined.

SnAg 납땜 도금을 실시한 시험편을 이용하여 30℃ 에서 침지하여 10 분 처리를 수행했다. 처리 전후의 중량을 측정해, 에칭 속도를 산출했다. 또, 표면 상태를 관찰했다.The test piece which performed SnAg solder plating was immersed at 30 degreeC, and the process was performed for 10 minutes. The weight before and after the treatment was measured, and the etching rate was calculated. Moreover, the surface state was observed.

결과를 표 3 에 나타낸다.The results are shown in Table 3.

금속 종류Metal type 에칭 속도 Å/분Etch Rate Å / min 표면 관찰Surface observation 실시예 6Example 6 SnAgSnAg <10<10 변화 없음No change 비교예 8Comparative Example 8 SnAgSnAg 560560 희게 흐려짐Blurring

본 발명의 에칭 방법에 의해, 세미애디티브법에서 세선 구리 배선 형성시 구리 배선의 배선폭 감소를 억제하고, 또 범프 구성 금속을 침식하는 일 없이 시드층의 금속, 특히 스퍼터 구리 또는 스퍼터 니켈을 신속히 에칭 제거하는 것이 가능해져, 반도체 제품, 프린트 배선 기판 등의 전자 부품의 제조에 유용하다.According to the etching method of the present invention, the metal of the seed layer, particularly sputter copper or sputter nickel, can be quickly suppressed in the semi-additive process by suppressing the reduction in the wiring width of the copper wiring when forming the thin copper wiring and eroding the bump constituent metal. It becomes possible to remove an etching and is useful for manufacture of electronic components, such as a semiconductor product and a printed wiring board.

Claims (3)

스퍼터링법에 의해 형성된 금속 박막층을 가지는 기판을 이용해 상기 금속 박막층 상에 레지스트 패턴을 형성한 후, 전해 구리 도금을 실시하거나 또는 범프용 금속의 도금을 실시하고, 다음에 레지스트의 제거 및 에칭에 의한 금속 박막층의 제거를 수행하는 세미애디티브법에 의해 구리 배선 또는 범프가 형성된 기판을 제조하는 방법에 있어서, 에칭액으로 과산화수소 0.1~10 중량% 와 인산 0.5~50 중량% 를 함유하는 한편 과산화수소/인산의 중량비가 0.02~0.3 인 에칭액을 사용하는 구리 배선 또는 범프가 형성된 기판의 제조 방법.After forming a resist pattern on the metal thin film layer using a substrate having a metal thin film layer formed by sputtering, electrolytic copper plating or metal plating for bumps is performed, and then the metal is removed by etching and etching. In the method of manufacturing a substrate having a copper wiring or bump formed by the semi-additive method of removing the thin film layer, the etching solution contains 0.1 to 10% by weight of hydrogen peroxide and 0.5 to 50% by weight of phosphoric acid while the weight ratio of hydrogen peroxide / phosphoric acid The manufacturing method of the board | substrate with a copper wiring or bump which uses the etching liquid whose is 0.02-0.3. 제 1 항에 있어서, The method of claim 1, 스퍼터링법에 의해 형성된 금속 박막층이 구리인 것을 특징으로 하는 기판의 제조 방법.The metal thin film layer formed by the sputtering method is copper, The manufacturing method of the board | substrate characterized by the above-mentioned. 제 1 항에 있어서, The method of claim 1, 스퍼터링법에 의해 형성된 금속 박막층이 니켈인 것을 특징으로 하는 기판의 제조 방법.The metal thin film layer formed by sputtering method is nickel, The manufacturing method of the board | substrate characterized by the above-mentioned.
KR1020060031037A 2005-04-08 2006-04-05 Process for producing substrate with copper wiring or bump formed thereon KR20060107349A (en)

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