KR20060096548A - Method for storing image data in memory - Google Patents

Abstract

The present invention relates to a method of storing image data in a memory. In the image data storage method according to the present invention, image lines constituting a frame to be stored in a memory are divided into image line groups including one or more image lines, and image data corresponding to a predetermined image line group is stored in one bank. After that, the image data corresponding to the next image line group is stored in the next bank. According to the present invention, each image line group consisting of one or more image lines is alternately stored in each bank in turn, and an access command is made to a specific line of a next bank while an access to a specific line of one bank is made, thereby operating frequency. Can lower the power consumption.

Description

How to store image data in memory {Method for Storing Image Data in Memory}

1A and 1B illustrate a conventional method of storing image data in a memory.

FIG. 2 shows an address map in the method for storing image data as shown in FIG. 1A.

3 illustrates image data corresponding to the image block of FIG. 1A.

4 is a command and address input timing diagram for accessing the image data of FIG. 3 in the manner as shown in FIG. 1A.

5 is for explaining a concept of a method for storing image data according to the present invention.

6 illustrates an address map for accessing stored image data in accordance with the present invention.

7 is a schematic representation of image data stored in a memory in accordance with the present invention.

FIG. 8 illustrates image data corresponding to the image block of FIG. 7.

9 is a command and address input timing diagram for accessing the image data of FIG. 8.

The present invention relates to a method for storing image data, and more particularly, to a method for storing image data in a memory.

Recently produced mobile communication devices are capable of processing data at high speed due to the remarkable development of electronic engineering and information communication engineering. These mobile communication devices can provide various services because they can transmit and receive image data or voice data through a mobile communication network such as a CDMA network or a GSM network. In particular, a digital multimedia broadcasting (DMB) receiver supports a broadcast service for digitally processing various multimedia signals transmitted from the ground or satellite.

Many such devices compress image data in order to quickly process image data corresponding to a frame constituting a video. Compression of the image data is performed through detection of motion information of the images constituting each frame.

In other words, a video composed of consecutive frames has redundancy within one frame, but since there is more temporal redundancy between frames, the previous frame can be used to easily recover the current frame with a small amount of information. . Therefore, the accurate detection of the motion information of the images on the screen between the frames is an important factor in determining the efficiency of compression.

As described above, a general method of compressing image data using motion information of images is performed as follows.

First, a difference component between each of the reference image blocks included in the current frame and each of the comparison image blocks of the region to be searched from the previous frame is calculated, and a comparison image block having a minimum absolute value of the calculated difference components is selected. The motion vector is determined based on the distance of the distance difference between the selected comparison block and the reference block.

Subsequently, a difference component of a block in which the basic block of the current frame and the block in the search area of the previous frame are moved by a motion vector is obtained, and an error signal for compensating the current frame is output to the previous frame. When compression is performed using such an error signal, the compression rate is increased because a specific frame can be recovered using the error signal during decoding.

In this process, image data corresponding to the current frame, the previous frame, the reference image block, and the comparison image block are stored in a memory such as a synchronous dynamic random access memory (SDRAM).

1A and 1B illustrate a conventional method of storing image data in a memory. Conventional image data storage methods include a method of specifying a start address in accordance with an image line as shown in FIG. 1A and a method of increasing an address in order as shown in FIG. 1B.

In the method of designating a start address in accordance with an image line as shown in FIG. 1A, the position of the start address of each image line of image data constituting one frame is equalized. That is, the image data constituting the first image line is stored in an area of 0x0000 to 0x00CC of the first bank BANK0 constituting the memory. Image data constituting the second image line is stored in an area of 0x0100 to 0x01CC of the first bank BANK0. In this way, the image data constituting the 16th image line is stored in the area of 0xFF00 to 0xFFCC of the first bank BANK0. The image data constituting the 17th image line is stored in the memory in the region of 0x0000 to 0x00CC of the second bank BANK1. As described above, the image data starting each image line is stored in an area corresponding to the start address (0x0000, 0x0100, ..., 0xFF00) of each row line of the memory.

This method has the advantage that the amount of computation of the memory controller is reduced because image data corresponding to each image line is stored in the area corresponding to each row address of the memory. There is a drawback of poor use efficiency.

In the method of increasing the address in order as shown in FIG. 1B, image data constituting one frame is sequentially stored in a memory. That is, image data corresponding to the first image line constituting the frame is stored in an area of 0x0000 to 0x00CC of the first bank and first row lines BANK0 and RAS1 constituting the memory. In this case, in order to utilize the unused area of the memory as shown in FIG. 1A, image data corresponding to the second image line constituting the frame is 0x00D0 to the first bank, BANK0, RAS1 of the first bank constituting the memory. It is stored in the area of 0x00FC. Next, image data corresponding to the second image line constituting the frame is stored from an area of 0x0100 of the first bank and second row lines BANK0 and RAS2 constituting the memory.

The method of storing image data by increasing addresses in this order can maximize the use efficiency of the memory, but the image data corresponding to each image line is not stored in the region corresponding to each row address of the memory, but instead of one image. Since image data corresponding to a line is stored in an area corresponding to two or more row addresses of the memory, a calculation amount of the memory controller increases. In particular, an address calculation scheme is complicated when accessing image data corresponding to a specific image block.

Therefore, in general, a method of storing image data in a memory is mainly used as shown in FIG. 1A. In order to use such a storage method, as shown in FIG. 2, image data is stored on a specific row line of the memory as the column address strobe (CAS) address is increased, and then image data is stored on the next row line as the row address strobe (RAS) address is increased. It begins. Through this process, when image data is stored in one bank, the bank address is changed.

3 illustrates image data corresponding to the image block of FIG. 1A, and FIG. 4 is a command and address input timing diagram for accessing the image data of FIG. 3 stored by the method illustrated in FIG. 1A.

Memory access, such as SDRAM, is accessed to the memory by a command method. For example, when a read command is input, data is continuously output in accordance with the read access command, which is always enabled for the same row address. In order to perform a read command for another row address, a read command for a row line corresponding to a new row address must be input after the previously opened row line is precharged.

For example, this process is described below. When a general image block as shown in FIG. 1A is formed of image data as shown in FIG. 3, the address of the image data is not continuous. That is, DATA00 to DATA03, DATA10 to DATA13, DATA20 to DATA23, and DATA30 to DATA33 exist in the same bank BANK0, but the row addresses RAS0, RAS1, RAS2, and RAS3 are different.

As described above, a read command is performed on the image data of FIG. 3 existing in the non-contiguous address area according to the timing diagram of FIG. 4.

First, a RAS signal 400 for specifying the first row address RAS0 of the first bank BANK0 is input for access to DATA00 to DATA03. When a read command and a CAS signal 410 are input after a clock corresponding to tRCD (time of RAS to CAS), access to DATA00 to DATA03 is stopped after a clock corresponding to time of CAS Latency (tCL). Is done.

As such, while the accesses to DATA00 to DATA03 are made, a precharge 420 is performed to access DATA10 to DATA13 on the second low line, and the first bank (t after the clock corresponding to the time of precharge (tRP) is performed. The RAS signal 430 for inputting the second row address RAS1 of BANK0 is input. When a read command and a CAS signal 440 are input after a clock corresponding to tRCD (time of RAS to CAS), access to DATA10 to DATA13 is stopped after a clock corresponding to time of CAS Latency (tCL). Is done. In the same manner, access is made to DATA20 to DATA23 and DATA30 to DATA33.

In the conventional method of accessing image data constituting an image block that is not composed of consecutive addresses, a preliminary charging process and an input of a RAS signal must be performed whenever a row address is changed. A problem arises in that the access time is long.

In particular, as the demand for an efficient compression method increases, the size of an image block becomes smaller and smaller. Since a compression method such as H.264 uses 2 × 2 image blocks, conventional image data is used. In the method of storing and accessing the data, the number of clocks for the preliminary charging and the RAS signal is greatly increased compared to the number of clocks for the actual image data, and thus the time for storing the image data or accessing the stored image data becomes longer.

In addition, when operations such as RAS signals and precharges increase, the operating frequency of the memory access increases, which causes difficulty in manufacturing a board and causes many problems such as power consumption.

The present invention is to solve the above problems, and to provide an image data storage method that can reduce unnecessary clock when storing and accessing the image data.

In order to achieve the above object, a method of storing image data in a memory consisting of a plurality of banks, the image data storage method according to the present invention is the image line constituting a frame to be stored in the memory image line consisting of one or more image lines The image data is divided into groups, image data corresponding to a predetermined image line group is stored in one bank, and image data corresponding to the next image line group is stored in a next bank.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

As described above with reference to FIGS. 3 and 4, in a memory such as an SDRAM, a precharge and a RAS signal must be preceded to access image data corresponding to different row addresses of the same bank.

However, since the addresses of different banks can be accessed independently from each other, if image data corresponding to each image line constituting a frame is stored in different banks, the current address and the other banks in advance during the waiting clock such as tRCD can be preset. You can give commands to reduce unnecessary clocks.

5 is for explaining a concept of a method for storing image data according to the present invention. Shown on the left of FIG. 5 is an image of one frame to be stored. Shown in the center of FIG. 5 is a schematic representation of the state of image data stored in a memory in accordance with the storage method of the present invention. 5 is a diagram showing the result of reading image data stored in a memory according to the present invention.

As shown in the right side of FIG. 5, image data corresponding to each image line constituting a frame is stored in different banks as shown in the center of FIG. 5. That is, image data corresponding to the first image line of the frame is stored in an area corresponding to the first row address RAS0 of the first bank BANK0. Image data corresponding to the second image line of the frame is stored in an area corresponding to the first row address RAS0 of the second bank BANK1. Image data corresponding to the third image line of the frame is stored in an area corresponding to the first row address RAS0 of the third bank BANK2. Image data corresponding to the fourth image line of the frame is stored in an area corresponding to the first row address RAS0 of the fourth bank BANK3. The image data corresponding to the fifth image line is again stored in an area corresponding to the second row address RAS1 of the first bank BANK0. After this, the process is repeated.

In this process, one image line is sequentially stored in one bank, but when the memory is composed of a plurality of banks, each of the image line groups including one or more image lines may be alternately stored in each bank.

For example, a process of alternately storing an image line group consisting of two image lines in one bank is as follows. Image data corresponding to the first and second image lines of the frame are stored in the first bank BANK0. Image data corresponding to the third and fourth lines of the frame are stored in the second bank BANK1. Image data corresponding to the fifth and sixth lines of the frame are stored in the third bank BANK2. Image data corresponding to the seventh and eighth lines of the frame are stored in the fourth bank BANK3. Image data corresponding to the ninth and tenth lines of the frame are stored in the first bank BANK0 again, and the process is repeated as described above.

In order to access the image data stored in the memory in this manner, an address map as shown in FIG. 6 is required. The address map of FIG. 6 differs from the conventional address map of FIG. 2 in that the bank address is assigned to the lower bits than the row address.

As a result, when the column address is increased and image data is stored in a region of a specific bank and a specific row line of the memory, the bank address is increased and the row address is maintained, so that the image data is stored in a specific row line of the next bank.

7 schematically illustrates image data stored in a memory through the above process. As shown in FIG. 7, image data is stored while the column address is increased from 0x0000 to 0x00CC in the region of the specific bank BANK0 and the specific row line RAS0. After that, the bank address is increased to designate the next bank BANK1 and the row address is maintained. Accordingly, the column address increases from 0x0000 to 0x00CC in the areas corresponding to BANK1 and RAS1, and image data is stored. Thereafter, the above process is repeated, and image data corresponding to one frame is stored.

If the bank address is preferentially increased over the row address after the column address is increased, the memory can be operated more efficiently.

FIG. 8 is a diagram illustrating image data corresponding to the image block of FIG. 7, and FIG. 9 is a command and address input timing diagram for accessing the image data of FIG. 8.

First, when the RAS signal 910 for specifying the first row address RAS0 of the first bank BANK0 is input for access to DATA00 to DATA03, a read command (Read command1) after a clock corresponding to tRCD is input. And the CAS signal 920 are input.

At this time, during the tRCD between the RAS signal 910 and the CAS signal 920, the RAS signal 930 for designating the first row address RAS0 of the second bank BANK1 for access to DATA10 to DATA13 is generated. Is entered.

Such a signal input is possible because in general, individual control of each bank constituting the memory is possible. Thus, when one image line is stored in each of the alternating banks as in the present invention, the input of the RAS signal for accessing a specific image line stored in the next bank during tRCD for accessing a specific image line stored in one bank This is possible.

As such, since the row is already open at the time when a read command (read command2) for accessing the data 10 to the data 13 stored in the second bank BANK1 is to be sent, the access can be started without additional clock consumption.

Similarly, the precharge 940 for the first bank BANK0 can be performed on an empty clock during the read operation for the second bank BANK1, so that the clock for precharging does not actually need to be consumed.

In this manner, the process is the same for the second bank BANK1 to the fourth bank BANK3. That is, a RAS signal for accessing image data corresponding to a specific line of a next bank is input between a RAS signal for accessing image data corresponding to a specific line of one bank and a CAS signal. In addition, preliminary charging for one bank occurs during a read operation for the next bank.

In summary, the process of accessing image data corresponding to a specific line of one bank is performed while accessing image data corresponding to a specific line of one bank is performed.

According to this process, the time required for accessing the image data can be seen to be shorter than the conventional access time. That is, as shown in the timing diagram of FIG. 4, there is a time when the image data is not accessed until access to DATA00 to DATA03 and then to DATA10 to DATA13. On the other hand, as shown in FIG. 9, in the access according to the present invention, since access to DATA00 to DATA03 and access to DATA10 to DATA13 occur continuously, the total access time is shortened.

As described above, according to the present invention, each of the image line groups consisting of one or more image lines are alternately stored in each bank, and an access command for a specific line of the next bank is generated while accessing a specific line of one bank is performed. This reduces the operating frequency and reduces power consumption.

Claims (6)

In the method for storing image data in a memory consisting of a plurality of banks, The image lines constituting the frame to be stored in the memory are divided into image line groups consisting of one or more image lines, And storing the image data corresponding to the predetermined image line group in one bank and then storing the image data corresponding to the next image line group in the next bank. The method of claim 1, And a bank address is allocated to a lower bit than a row address when the image data is stored in the memory. The method of claim 1, When the memory consists of the first to mth banks and the frame consists of the first to nth image line groups, and the image data corresponding to the t th (t is a natural number between 1 and n) image lines are stored in a bank of a sequence corresponding to the remainder of t / m. The method of claim 1, And an access command for accessing the image data corresponding to the specific image line group in the next bank is performed while the access to the image data corresponding to the specific image line group in the predetermined bank is performed. The method of claim 4, wherein A RAS signal for accessing image data corresponding to a specific image line group of the next bank is input between a RAS signal and an CAS signal for accessing image data corresponding to a specific image line group of the predetermined bank. How to save image data. The method of claim 4, wherein Precharging the predetermined bank during a read operation to the next bank.

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