KR20060092689A - Structure for radiating heat of semiconductor package - Google Patents

Structure for radiating heat of semiconductor package Download PDF

Info

Publication number
KR20060092689A
KR20060092689A KR1020050013766A KR20050013766A KR20060092689A KR 20060092689 A KR20060092689 A KR 20060092689A KR 1020050013766 A KR1020050013766 A KR 1020050013766A KR 20050013766 A KR20050013766 A KR 20050013766A KR 20060092689 A KR20060092689 A KR 20060092689A
Authority
KR
South Korea
Prior art keywords
substrate
heat dissipation
semiconductor package
semiconductor chip
dissipation structure
Prior art date
Application number
KR1020050013766A
Other languages
Korean (ko)
Inventor
문준권
Original Assignee
엘지전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지전자 주식회사 filed Critical 엘지전자 주식회사
Priority to KR1020050013766A priority Critical patent/KR20060092689A/en
Publication of KR20060092689A publication Critical patent/KR20060092689A/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

본 발명은 반도체 패키지의 방열구조에 관한 것이다. 밀봉부재 자체가 열전도성이 낮은 재료로 되어 있기 때문에 방열효과가 저하되는 문제점이 있다. 본 발명은 기판과; 상기 기판 상에 탑재되는 반도체 칩과; 상기 기판의 외부에 형성되어 반도체 칩과 전기적으로 연결되는 외부리드 및; 상기 반도체 칩을 포함하여 상기 기판 상에 형성되는 다공질 보호부재를 포함하여 구성되는 반도체 패키지의 방열구조를 제공하여 기판과 반도체 칩 및 금속와이어를 효과적으로 보호하면서도 기판과 반도체 칩 및 금속와이어 등에서 발생한 열이 효과적으로 방열되므로 반도체 패키지의 오동작을 방지할 수 있게 한 것이다.The present invention relates to a heat dissipation structure of a semiconductor package. Since the sealing member itself is made of a material having low thermal conductivity, there is a problem that the heat radiation effect is lowered. The present invention is a substrate; A semiconductor chip mounted on the substrate; An external lead formed outside the substrate and electrically connected to the semiconductor chip; By providing a heat dissipation structure of a semiconductor package including a porous protective member formed on the substrate including the semiconductor chip to effectively protect the substrate, the semiconductor chip and the metal wire, heat generated from the substrate, the semiconductor chip and the metal wire, etc. Since the heat dissipation effectively, it is possible to prevent the malfunction of the semiconductor package.

Description

반도체 패키지의 방열구조{STRUCTURE FOR RADIATING HEAT OF SEMICONDUCTOR PACKAGE}Heat dissipation structure of semiconductor package {STRUCTURE FOR RADIATING HEAT OF SEMICONDUCTOR PACKAGE}

도 1은 종래 반도체 패키지의 단면도,1 is a cross-sectional view of a conventional semiconductor package,

도 2는 본 발명에 의한 방열구조가 적용된 반도체 패키지의 단면도,2 is a cross-sectional view of a semiconductor package to which a heat dissipation structure according to the present invention is applied;

도 3은 본 발명에 의한 방열구조가 적용된 반도체 패키지의 방열작용을 보인 도 2의 "A"부 확대도.Figure 3 is an enlarged view "A" of Figure 2 showing the heat dissipation action of the semiconductor package to which the heat dissipation structure according to the present invention.

** 도면의 주요 부분에 대한 부호의 설명 **** Description of symbols for the main parts of the drawing **

1 : 기판 2 : 반도체 칩1 substrate 2 semiconductor chip

3 : 금속와이어 4 : 외부리드3: metal wire 4: outer lead

5 : 비아홀 6 : 다공질 보호부재5: via hole 6: porous protective member

본 발명은 반도체 패키지에 관한 것으로, 별도의 방열의 위한 부품을 사용하지 않고서도 반도체 패키지에서 발생하는 열을 효과적으로 방열할 수 있는 반도체 패키지의 방열구조에 관한 것이다.The present invention relates to a semiconductor package, and more particularly, to a heat dissipation structure of a semiconductor package capable of effectively dissipating heat generated in a semiconductor package without using a separate heat dissipation component.

일반적으로 반도체 패키지는 기판과, 이 기판 상에 탑재되는 반도체 칩과, 반도체 칩에 전기적으로 연결되어 인쇄회로기판에 실장하기 위한 외부리드 및, 상기 기판과 반도체 칩을 보호하기 위한 밀봉부재를 포함하여 구성된다.Generally, a semiconductor package includes a substrate, a semiconductor chip mounted on the substrate, an external lead electrically connected to the semiconductor chip for mounting on a printed circuit board, and a sealing member for protecting the substrate and the semiconductor chip. It is composed.

도 1에 도시한 바와 같은, 볼 그리드 어레이 반도체 패키지(Ball Grid Array Semiconductor Package)를 예로 들어 설명하면, 기판(11)과, 상기 기판(11) 상에 탑재되는 반도체 칩(12)과, 상기 기판(11)의 배선패턴(미도시)과 상기 반도체 칩(12) 상의 패드(미도시)를 전기적으로 연결하는 금속와이어(13)와, 상기 기판(11)에 관통 형성되어 그 상단이 상기 기판(11)의 배선패턴에 전기적으로 연결되는 비아홀(14)과, 상기 비아홀(14)의 하단에 전기적으로 연결되어 인쇄회로기판(17)에 실장하기 위한 외부리드로서의 솔더볼(15) 및, 상기 반도체 칩(12)과 금속와이어(13)를 포함하여 기판(11)의 상면을 보호하기 위한 밀봉부재(16)를 포함하여 구성된다.A ball grid array semiconductor package as shown in FIG. 1 will be described as an example. The substrate 11, the semiconductor chip 12 mounted on the substrate 11, and the substrate A metal wire 13 electrically connecting a wiring pattern (not shown) of FIG. 11 to a pad (not shown) on the semiconductor chip 12; and an upper end thereof formed through the substrate 11; A via hole 14 electrically connected to the wiring pattern 11, a solder ball 15 as an external lead electrically connected to a lower end of the via hole 14, and mounted on a printed circuit board 17, and the semiconductor chip. It comprises a sealing member 16 for protecting the upper surface of the substrate 11, including the 12 and the metal wire (13).

이러한 종래의 반도체 패키지에서는 작동시 발생하는 열에 의한 오동작 등을 방지하기 위하여 방열수단을 필요로 한다.In such a conventional semiconductor package, a heat dissipation means is required to prevent a malfunction due to heat generated during operation.

종래 반도체 패키지에 사용되는 방열수단으로서는 공랭식 방열수단과 수랭식 방열수단이 사용되고 있다.As the heat dissipation means used in the conventional semiconductor package, air-cooled heat dissipation means and water-cooled heat dissipation means are used.

공랭식 방열수단으로서는 히트싱크(heat sink)를 사용하는 것과, 히트싱크와 냉각팬(cooling fan)을 함께 사용하는 것이 있으며, 수랭식 방열수단으로서는 히트싱크와 이 히트싱크에 냉각수(cooling water)를 접촉시키는 것이 있다.The air-cooled heat dissipation means uses a heat sink and the use of a heat sink and a cooling fan together. The water-cooled heat dissipation means connects the heat sink and cooling water to the heat sink. There is.

그러나 이러한 종래의 공랭식 방열수단 중 히트싱크만을 사용하는 방열수단 의 경우에는 열전도성이 낮은 통상적인 에폭시 수지로 된 밀봉부재에 히트싱크를 접촉시키고 있는 것이고 밀봉부재가 외부공기와 접촉하지 않는 것이기 때문에 방열효과가 저하되는 문제점이 있다.However, in the case of the heat dissipation means using only the heat sink among the conventional air-cooled heat dissipation means, the heat sink is contacted with a sealing member made of a conventional epoxy resin having low thermal conductivity, and the heat dissipation means does not come into contact with external air. There is a problem that the effect is reduced.

또한 공랭식 방열수단 중 히트싱크와 냉각팬을 사용하는 방열수단의 경우에는 냉각팬을 사용하는 만큼 히트싱크만을 사용한 것에 비하여 방열효과는 향상되나, 이 역시 열전도성이 낮은 에폭시 수지로 된 밀봉부재에 히트싱크가 접촉되어 있는 것이고 밀봉부재가 외부공기와 접촉하지 않는 것이기 때문에 방열효과가 저하되는 문제점이 있다.In addition, the heat dissipation means using the heat sink and cooling fan among the air-cooled heat dissipation means improves the heat dissipation effect as compared to using only the heat sink as much as the cooling fan is used, but it also heats the sealing member made of epoxy resin having low thermal conductivity Since the sink is in contact and the sealing member is not in contact with external air, there is a problem that the heat dissipation effect is lowered.

또한 수랭식 방열수단으로서 히트싱크와 냉각수를 사용하는 방열수단의 경우에는 히트싱크에 냉각수를 접촉시키는 만큼 히트싱크만을 사용한 것에 비하여 방열교화는 향상되나, 이 역시 열전도성이 낮은 에폭시 수지로 된 밀봉부재에 히트싱크가 접촉되어 있는 것이고 밀봉부재가 외부공기와 접촉하지 않는 것이기 때문에 방열효과가 저하되는 문제점이 있다.In addition, in the case of heat dissipation means using a heat sink and cooling water as the water-cooling heat dissipation means, heat dissipation correction is improved as compared with using only the heat sink as much as contacting the cooling water to the heat sink. Since the heat sink is in contact and the sealing member is not in contact with external air, there is a problem that the heat radiation effect is lowered.

더욱이 이러한 종래의 방열수단은 반도체 패키지를 구성하는 구성요소 외에 별도의 부품을 추가하여야 하므로 구조가 복잡해지고 반도체 패키지 전체의 크기가 커지게 되며 생산성이 저하되고 원가상승을 초래하게 되는 문제점이 있다.In addition, such a conventional heat dissipation means has to add a separate component in addition to the components constituting the semiconductor package, there is a problem that the structure is complicated, the overall size of the semiconductor package is increased, productivity is lowered, and cost increases.

또한 설령 밀봉부재가 외부공기와 접촉한다고 하더라도 밀봉부재 자체가 열전도성이 낮은 재료로 되어 있기 때문에 방열효과가 저하되는 문제점이 있다.In addition, even if the sealing member is in contact with the outside air, since the sealing member itself is made of a material having low thermal conductivity, there is a problem that the heat dissipation effect is lowered.

한편, 이러한 반도체 패키지에서 방열효과만을 고려한다면 밀봉부재를 제거하는 것에 가장 바람직하지만 기판과 반도체 칩 및 금속와이어 등의 보호를 무시할 수 없기 때문에 필연적으로 상술한 바와 같은 문제가 발생하게 되는 것이다.On the other hand, if only the heat dissipation effect is considered in such a semiconductor package, it is most preferable to remove the sealing member. However, since the protection of the substrate, the semiconductor chip, the metal wire, and the like cannot be ignored, the above-mentioned problems inevitably occur.

따라서 본 발명은 별도의 방열수단을 구비하지 않고서도 반도체 패키지에서 발생하는 열을 효과적으로 방열시킬 수 있도록 한 반도체 패키지의 방열구조를 제공하려는 것이다.Therefore, the present invention is to provide a heat dissipation structure of the semiconductor package to effectively dissipate heat generated in the semiconductor package without providing a separate heat dissipation means.

본 발명은 상술한 목적을 달성하기 위하여 기판과; 상기 기판 상에 탑재되는 반도체 칩과; 상기 기판의 외부에 형성되어 반도체 칩과 전기적으로 연결되는 외부리드 및; 상기 반도체 칩을 포함하여 상기 기판 상에 형성되는 다공질 보호부재를 포함하여 구성되는 반도체 패키지의 방열구조를 제공한다.The present invention is a substrate for achieving the above object; A semiconductor chip mounted on the substrate; An external lead formed outside the substrate and electrically connected to the semiconductor chip; It provides a heat dissipation structure of a semiconductor package including a porous protective member formed on the substrate including the semiconductor chip.

또한 상기 외부리드는 상기 기판의 하면에 형성되어 상기 기판에 형성된 비아홀을 통하여 상기 기판의 배선패턴에 전기적으로 연결되는 솔더볼로 구성된다.In addition, the outer lead is formed of a solder ball formed on a lower surface of the substrate and electrically connected to a wiring pattern of the substrate through a via hole formed in the substrate.

상기 다공질 보호부재는 많은 수의 미세공을 가지는 것이 사용된다.The porous protective member is used having a large number of micropores.

상기 다공질 보호부재는 많은 수의 그물눈을 가지는 것이 사용된다.The porous protective member is used having a large number of meshes.

이하, 본 발명에 의한 반도체 패키지의 방열구조를 첨부도면에 도시한 실시례에 따라서 상세히 설명한다.Hereinafter, the heat dissipation structure of the semiconductor package according to the present invention will be described in detail according to the embodiment shown in the accompanying drawings.

도 2는 본 발명에 의한 방열구조가 적용된 반도체 패키지의 단면도이고, 도 3은 본 발명에 의한 방열구조가 적용된 반도체 패키지의 방열작용을 보인 도 2의 "A"부 확대도이다.2 is a cross-sectional view of a semiconductor package to which a heat dissipation structure according to the present invention is applied, and FIG. 3 is an enlarged view of part “A” of FIG. 2 showing a heat dissipation action of the semiconductor package to which the heat dissipation structure according to the present invention is applied.

도 2에서, 1은 기판이고, 2는 상기 기판(1) 상에 탑재되는 반도체 칩이며, 4 는 상기 기판(1)의 외부에 형성되어 상기 반도체 칩(2)에 전기적으로 연결되는 외부리드이다.In FIG. 2, 1 is a substrate, 2 is a semiconductor chip mounted on the substrate 1, and 4 is an external lead formed outside the substrate 1 and electrically connected to the semiconductor chip 2. .

상기 기판(1) 상에는 배선패턴(미도시)이 형성되고, 상기 반도체 칩(2)에는 복수개의 패드(미도시)가 형성되며, 상기 기판(1)의 배선패턴과 반도체 칩(2)의 패드는 금속와이어(3)에 의해 전기적으로 연결된다.A wiring pattern (not shown) is formed on the substrate 1, and a plurality of pads (not shown) are formed on the semiconductor chip 2, the wiring pattern of the substrate 1 and the pad of the semiconductor chip 2. Is electrically connected by a metal wire (3).

도 2에서는 본 발명을 볼 그리드 어레이 반도체 패키지를 예로 든 것으로, 상기 외부리드(4)가 비아홀(5)을 통해 기판(1)의 배선패턴에 전기적으로 연결되는 솔더볼로 구성되어 있으나, 반드시 이로서 국한되는 것은 아니며, 리드프레임을 이용한 반도체 패키지에도 적용할 수 있는 것이다.In FIG. 2, a ball grid array semiconductor package according to the present invention is illustrated, and the outer lead 4 is composed of solder balls electrically connected to the wiring pattern of the substrate 1 through the via holes 5, but is not limited thereto. The present invention is also applicable to semiconductor packages using lead frames.

상기 기판(1) 상에는 상기 기판(1)과 반도체 칩(2) 및 금속와이어(3)를 보호하기 위한 보호부재(6)가 형성된다.A protective member 6 is formed on the substrate 1 to protect the substrate 1, the semiconductor chip 2, and the metal wire 3.

상기 보호부재(6)는 많은 수의 미세공을 가지는 다공질 재료 또는 많은 수의 그물눈을 가지는 그물망조직의 다공질 재료를 사용하는 것이 바람직하다.The protective member 6 is preferably made of a porous material having a large number of micropores or a porous material of a mesh structure having a large number of mesh eyes.

상기 보호부재(6)는 다공질 재료를 통상적인 몰딩방법에 의하여 몰딩하는 것에 의해 형성된다.The protective member 6 is formed by molding the porous material by a conventional molding method.

즉, 반도체 패키지의 크기와 종류에 따라 몰드(mold)를 이용한 몰딩방법과 포팅(potting)에 의한 몰딩방법 등을 사용할 수 있다.That is, a molding method using a mold and a molding method by potting may be used according to the size and type of the semiconductor package.

도 2에서 7은 본 발명에 의한 반도체 패키지가 실장되는 인쇄회로기판이다.2 to 7 are printed circuit boards on which the semiconductor package according to the present invention is mounted.

이하, 본 발명에 의한 반도체 패키지의 방열구조의 작용을 설명한다.Hereinafter, the operation of the heat radiation structure of the semiconductor package according to the present invention will be described.

본 발명에 의한 방열구조가 적용된 반도체 패키지를 구성하는 기판(1)과 반 도체 칩(2) 및 금속와이어(3) 등에서 발생하여 반도체 칩(2)과 금속와이어(3)를 포함하여 기판(1)의 상면에 형성된 다공질 보호부재(6)로 전달된 열은 이 다공질 보호부재(6)에는 많은 수의 미세공 또는 그물눈을 통하여 외부로 방출된다.The substrate 1 including the semiconductor chip 2 and the metal wire 3 generated from the substrate 1, the semiconductor chip 2, the metal wire 3, and the like constituting the semiconductor package to which the heat dissipation structure according to the present invention is applied, the substrate 1 The heat transferred to the porous protective member 6 formed on the upper surface of the) is discharged to the outside through a large number of micropores or meshes in the porous protective member 6.

즉, 상기 기판(1)과 반도체 칩(2) 및 금속와이어(3)는 다공질 보호부재(6)에 존재하는 미세공 또는 그물눈을 통하여 외부공기와 직접 접촉하는 상태로 되므로 별도의 방열수단을 구비하지 않고서도 기판(1)과 반도체 칩(2) 및 금속와이어(3) 등에서 발생하는 열이 효과적으로 방출되는 것이다.That is, the substrate 1, the semiconductor chip 2, and the metal wire 3 are in direct contact with external air through micropores or meshes existing in the porous protective member 6, and thus have separate heat dissipation means. Without this, heat generated from the substrate 1, the semiconductor chip 2, the metal wire 3, and the like is effectively released.

이상과 같이 본 발명의 반도체 패키지의 방열구조에 의하면 다공질 보호부재에 의하여 기판과 반도체 칩 및 금속와이어를 효과적으로 보호하면서도 기판과 반도체 칩 및 금속와이어 등에서 발생한 열이 효과적으로 방열되므로 반도체 패키지의 오동작을 방지할 수 있게 되는 효과가 있다.As described above, according to the heat dissipation structure of the semiconductor package of the present invention, since the heat generated from the substrate, the semiconductor chip, and the metal wire is effectively radiated by the porous protective member, the semiconductor package can be prevented from malfunctioning. There is an effect that becomes possible.

Claims (4)

기판과; 상기 기판 상에 탑재되는 반도체 칩과; 상기 기판의 외부에 형성되어 반도체 칩과 전기적으로 연결되는 외부리드 및; 상기 반도체 칩을 포함하여 상기 기판 상에 형성되는 다공질 보호부재를 포함하여 구성되는 반도체 패키지의 방열구조.A substrate; A semiconductor chip mounted on the substrate; An external lead formed outside the substrate and electrically connected to the semiconductor chip; A heat dissipation structure of a semiconductor package comprising a porous protective member formed on the substrate including the semiconductor chip. 제 1항에 있어서, 상기 외부리드는 상기 기판의 하면에 형성되어 상기 기판에 형성된 비아홀을 통하여 상기 기판의 배선패턴에 전기적으로 연결되는 솔더볼인 것을 특징으로 하는 반도체 패키지의 방열구조.The heat dissipation structure of claim 1, wherein the outer lead is a solder ball formed on a lower surface of the substrate and electrically connected to a wiring pattern of the substrate through a via hole formed in the substrate. 제 1항에 있어서, 상기 다공질 보호부재는 많은 수의 미세공을 가지는 것임을 특징으로 하는 반도체 패키지의 방열구조.The heat dissipation structure of a semiconductor package according to claim 1, wherein the porous protective member has a large number of micropores. 제 1항에 있어서, 상기 다공질 보호부재는 많은 수의 그물눈을 가지는 것임을 특징으로 하는 반도체 패키지의 방열구조.The heat dissipation structure of a semiconductor package according to claim 1, wherein said porous protective member has a large number of meshes.
KR1020050013766A 2005-02-18 2005-02-18 Structure for radiating heat of semiconductor package KR20060092689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020050013766A KR20060092689A (en) 2005-02-18 2005-02-18 Structure for radiating heat of semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050013766A KR20060092689A (en) 2005-02-18 2005-02-18 Structure for radiating heat of semiconductor package

Publications (1)

Publication Number Publication Date
KR20060092689A true KR20060092689A (en) 2006-08-23

Family

ID=37594036

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050013766A KR20060092689A (en) 2005-02-18 2005-02-18 Structure for radiating heat of semiconductor package

Country Status (1)

Country Link
KR (1) KR20060092689A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200085101A (en) 2019-01-04 2020-07-14 강병혁 Heat dissipation structure of semiconductor package for power conversion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200085101A (en) 2019-01-04 2020-07-14 강병혁 Heat dissipation structure of semiconductor package for power conversion

Similar Documents

Publication Publication Date Title
JP2991172B2 (en) Semiconductor device
KR0121438B1 (en) Semiconductor device
JP4593616B2 (en) Semiconductor device
KR100955936B1 (en) Heat dissipation device for semiconductor package module and semiconductor package module having the same
JP2009105297A (en) Resin-encapsulated semiconductor device
US6933602B1 (en) Semiconductor package having a thermally and electrically connected heatspreader
US7554194B2 (en) Thermally enhanced semiconductor package
US20060197219A1 (en) Heat sink and package structure
KR20060092689A (en) Structure for radiating heat of semiconductor package
JP2007036035A (en) Semiconductor device
US7606034B2 (en) Thermally enhanced memory module
KR20060092692A (en) Semiconductor package and manufacturing method thereof
US7521780B2 (en) Integrated circuit package system with heat dissipation enclosure
KR200325122Y1 (en) heat sink in semiconductor package
JPH09331004A (en) Semiconductor device
US6067228A (en) Heat sink
KR20120031817A (en) Circuit board having semiconductor chip and stacked semiconductor package having thereof
KR101049508B1 (en) Vigie package containing heat dissipation method and heat dissipation rod
JP2006140203A (en) Sip heat dissipation package
KR20080111618A (en) Semiconductor package with heat emission structure and method of packaging the same
JP4632199B2 (en) Semiconductor device, method for manufacturing the same, and method for mounting semiconductor chip
JP2007043011A (en) Heat dissipation structure of electronic apparatus
KR20080004734A (en) Radiating structure in exothermic element
JP2003218565A (en) Electronic device
KR20020088300A (en) Semiconductor package with heat spreader using cooling material

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination