KR20060074945A - Liquid crystal display device and method for fabricating the same - Google Patents

Abstract

The present invention is directed to a liquid crystal display device and a method of manufacturing the same in which the image quality of a panel is improved by solving a problem in which aperture ratios between left and right pixels are caused by upper and lower substrate bonding misalignment in left and right pixels sharing one data line. A gate wiring and a data wiring defining a block vertically intersecting on a first substrate, a thin film transistor formed at a point where the two wirings intersect, a pixel electrode connected to the thin film transistor, and inside the block. A capacitor electrode formed between the pixel electrode and the pixel electrode and dividing a block into two pixels, and a second substrate facing the first substrate and having a liquid crystal layer therebetween. .

Data Wiring Sharing, Storage Capacitors, Aperture Rate

Description

Liquid crystal display device and manufacturing method thereof {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME}

1 is a plan view of a liquid crystal display device according to the prior art.

FIG. 2 is a cross-sectional view of the liquid crystal display device on the line II ′ of FIG. 1. FIG.

3 is a plan view of a liquid crystal display device according to a first embodiment of the present invention.

4A and 4B are cross-sectional views of the liquid crystal display device on the II-II 'line in FIG.

5 is a plan view of a liquid crystal display device according to a second embodiment of the present invention.

6A and 6B are cross-sectional views of the liquid crystal display device on the III-III 'line of FIG.

7A to 7D are cross-sectional views of a liquid crystal display device taken along the line IV-IV 'of FIG. 5;

8A to 8D are cross-sectional views of a liquid crystal display device taken along the line VV ′ of FIG. 5.

9 is a plan view of a liquid crystal display device according to a third embodiment of the present invention.

* Explanation of symbols on the main parts of the drawings

511 TFT array substrate 512 gate wiring

512a: gate electrode 513: gate insulating film

514: semiconductor layer 515: data wiring

515a: source electrode 515b: data electrode

516: protective film 517: pixel electrode                 

518: contact hole 522: capacitor electrode

551: color filter array substrate 552: black matrix

553: color filter layer 554: common electrode

560 liquid crystal layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device (LCD), and more particularly, to a liquid crystal display device and a method of manufacturing the same, which are intended to prevent variation in aperture ratio due to misalignment.

BACKGROUND ART Liquid crystal display devices, which have recently been spotlighted as flat panel display devices, have been actively researched due to their high contrast ratio, suitable for gradation display or moving picture display, and low power consumption.

In particular, it can be manufactured with a thin thickness so that it can be used as an ultra-thin display device such as a wall-mounted TV in the future, and is light in weight and consumes significantly less power than a CRT CRT. It is being used as a next generation display device.

Such liquid crystal display devices generally include a thin film transistor array substrate having a thin film transistor (TFT) and a pixel electrode formed in each pixel region defined by gate wiring and data wiring, and a color filter layer array substrate having a color filter layer. Arranged so as to face each other, a liquid crystal having dielectric anisotropy is formed therebetween, and a voltage is applied to the pixel by switching a thin film transistor added to hundreds of thousands of pixels through a pixel selection address wiring. It is driven in a way.

Hereinafter, a liquid crystal display according to the related art will be described with reference to the accompanying drawings.

First, as shown in FIGS. 1 and 2, the thin film array substrate 11 of the liquid crystal display device has the gate lines 12 arranged in a line and the data lines 15 vertically intersecting the gate lines 12. The unit pixel is defined by (), and the gate electrode 12a, the gate insulating layer 13, the semiconductor layer 14, the ohmic contact layer 14a, and the intersection point of the gate line 12 and the data line 15 are defined. A thin film transistor (TFT) stacked on the source / drain electrodes 15a and 15b to control the turn-on or turn-off of the voltage, and contact the drain electrode 15b through the first contact hole 18 A pixel electrode 17 for transmitting the signal and applying a signal voltage to the liquid crystal layer, and a storage capacitor for reducing the level shift voltage and maintaining the pixel information during the non-selection period are provided.

In this case, a gate insulating layer 13, which is an insulating layer, is further provided between the gate line 12 and the data line 15, and a passivation layer 16 is further provided between the thin film transistor and the pixel electrode.

The storage capacitor Cst is formed on the same layer as the gate line 12 and is formed on the same layer as the data line 15 and the capacitor lower electrode 12c parallel to the gate line. A capacitor upper electrode 15c contacted to the pixel electrode 17 through the gate electrode 28, and a gate insulating film 13 interposed between the capacitor lower electrode 12c and the capacitor upper electrode 15c. The charge charged in the liquid crystal is maintained during the turn-off period of.

As illustrated in FIG. 1, the storage capacitor Cst may be formed in the middle of a unit pixel, but may be formed in the gate wiring using a predetermined region of the gate wiring as a capacitor electrode.

However, the liquid crystal display device according to the related art has a large number of data wires, which leads to a complicated pattern and a limitation in thinning the liquid crystal display device. To overcome this problem, adjacent left and right pixels share a single data wire. Was proposed.

As a result, the number of data wires can be reduced by half, and the number of data drive ICs can be reduced.

However, when the liquid crystal display device is formed in the same structure as the conventional device in the data line sharing, an undesired coupling phenomenon occurs between the pixel electrode and the pixel electrode in the region where the data line is not arranged. This caused poor image quality.

The present invention provides a liquid crystal display device and a method of manufacturing the same to improve the poor image quality by shielding the coupling phenomenon by providing a capacitor electrode between the pixel electrode and the pixel electrode where the data line is not formed to solve the above problems The purpose is to provide.

In particular, it is an object of the present invention to provide a liquid crystal display device and a method for manufacturing the same, which solve the problem of difference in aperture ratio between left and right pixels due to upper and lower substrate bonding alignment errors.

The liquid crystal display device of the present invention for achieving the above object is a gate wiring and data wiring defining a block by vertically crossing the first substrate, a thin film transistor formed at the point where the two wiring intersects, the thin film A pixel electrode connected to the transistor, a capacitor electrode formed between the pixel electrode inside the block and the pixel electrode and dividing one block into two pixels, and a liquid crystal layer facing and facing the first substrate; It is characterized by including a second substrate.

According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including: forming a gate wiring and a gate electrode on a first substrate; forming a capacitor electrode between the gate wiring; Forming a gate insulating film on the entire surface including the gate insulating film, forming a semiconductor layer on the gate insulating film on the gate electrode, and defining a block including pixels of two regions perpendicular to the gate wiring; Forming a source / drain electrode branched from the wiring, forming a protective film on the entire surface including the data wiring, forming a pixel electrode to overlap the capacitor electrode on each pixel above the protective film; Opposing the second substrate provided with the black matrix on the first substrate and the liquid therebetween It characterized in that comprises a step of forming a layer.

Hereinafter, a liquid crystal display and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view of the liquid crystal display device according to the first embodiment of the present invention, and FIGS. 4A and 4B are cross-sectional views of the liquid crystal display device on the II-II 'line of FIG.

FIG. 5 is a plan view of a liquid crystal display device according to a second exemplary embodiment of the present invention. FIGS. 6A and 6B are cross-sectional views of the liquid crystal display device on the line III-III ′ of FIG. 5, and FIGS. 7A to 7D are FIG. 5. Fig. 8A through 8D are cross-sectional views of the liquid crystal display device on the V-V 'line of Fig. 5, respectively.

9 is a plan view of a liquid crystal display device according to a third embodiment of the present invention.

As shown in FIG. 3, the TFT array substrate (111 in FIG. 4) of the liquid crystal display device according to the first embodiment of the present invention is divided into two regions by the vertically crossing gate wiring 112 and data wiring 115. As shown in FIG. The pixel of is defined as one block, the left and right pixels centered on one data line share the data line 115, and two pixel electrodes and a thin film transistor are formed on each side in one block. .

At this time, each block defined by the two wirings is divided into unit pixels by the storage capacitor, and the parasitic capacitance between the pixel electrodes of each pixel is shielded by the storage capacitor lower electrode 122 to which the Vcom signal is applied. That is, the coupling phenomenon generated by the AC signal flowing through the pixel electrode 117 is further provided to shield the common electrode through which the DC signal flows.

In detail, the storage capacitor includes a capacitor lower electrode 122 parallel to the data line 115 between the pixel electrode and the pixel electrode, and overlaps the upper portion of the capacitor lower electrode to contact the pixel electrode 117 through the contact hole 118. And a capacitor upper electrode 125 contacted with the insulating film interposed therebetween.

The capacitor lower electrode 122 is provided on the same layer as the gate line 112, and the capacitor upper electrode 125 is provided on the same layer as the data line 115. A gate insulating film (113 in FIG. 4A) interposed between the wiring and the data wiring is used.

The capacitor lower electrode 122 is formed in the middle of the pixel to receive the Vcom signal from the outside of the active region and is connected to the adjacent capacitor lower electrode. Accordingly, the shape of the capacitor lower electrode based on each block becomes a cross shape, and the shape of the capacitor lower electrode based on each unit pixel becomes a T-shape rotated by ± 90 °.

Two capacitor upper electrodes 125 are formed in each block, one to provide storage capacitance to the left pixel and the other to provide storage capacitance to the right pixel. The capacitor upper electrode 125 is connected to the pixel electrode 117 through a contact hole 118 formed by removing the passivation layer 116 of FIG. 4A to receive a signal.

Such a TFT array substrate is bonded to the color filter array substrate on which the black matrix 152 is formed, as shown in Figs. 4A and 4B. The black matrix 152 is formed in the remaining areas except for the opening area to prevent light leakage from occurring. In general, the black matrix 152 prevents light leakage from occurring in the pixel electrode corner, the gate wiring 112, the data wiring 115, and the thin film transistor TFT. Overlaps.

However, when the color filter array substrate 151 and the TFT array substrate 111 are misaligned, the aperture ratios of the left and right pixels around the storage capacitor are different.

That is, as shown in FIG. 4A, when the color filter array substrate 151 is shifted to the left and aligned, the black matrix 152 that shields light is shifted to the left as well. As a reference, the opening area of the left pixel increases from L to L 'and the opening area of the right pixel decreases from R to R' (R '<L').

As shown in FIG. 4B, when the color filter array substrate 151 is shifted to the right and aligned, the black matrix 152 that shields light is shifted to the right as well. As a reference, the opening area of the left pixel decreases from L to L "and the opening area of the right pixel increases from R to R" (R "> L").

In general, the process margin for the bonding of the upper and lower substrates is at most 5 µm, and there is a difference in opening area of 5 µm x (length of the pixel) due to the bonding misalignment.

As described above, although the opening area widths of the left and right pixels must be the same (L = R), there is a problem in that the left and right pixel opening areas are not the same according to the bonding misalignment of the upper and lower substrates. Display quality is reduced.

Hereinafter, a structure of a liquid crystal display device in which left and right pixel opening regions do not change in accordance with misalignment of upper and lower substrates is proposed.

That is, in the TFT array substrate of the liquid crystal display device according to the second embodiment, as shown in FIG. 5, the gate wiring 512 and the data wiring 515 which define the pixels of two regions as one block by vertically crossing each other. And a thin film formed by stacking the gate electrode 512a, the gate insulating film 513 of FIG. 6A, the semiconductor layer 514, and the source / drain electrodes 515a and 515b based on each pixel. A transistor and a pixel electrode 517 connected to the drain electrode 515b of each thin film transistor through the contact hole 518 are provided. Thus, two thin film transistors and a pixel electrode are formed on the basis of the block.

At this time, the left and right pixels share one data line around the data line 515, and the source / drain electrodes 515a and 515b of the thin film transistor of each pixel are also branched from the shared data line.

Further, a capacitor electrode 522 through which a DC signal flows is further provided between the pixel electrode and the pixel electrode in the block to prevent a coupling phenomenon between the pixel electrodes, and one block is divided into two unit pixels by the capacitor electrode. Divided into.

The storage capacitor according to the second embodiment of the present invention is configured by overlapping the capacitor electrode 522 at the edge of the pixel electrode. The storage capacitor is formed between the pixel electrode and the pixel electrode and overlaps the edge of the pixel electrode. A capacitor electrode 522 parallel to 515, a pixel electrode 517 overlapping the capacitor electrode and serving as a capacitor upper electrode, and an insulating film interposed therebetween.

Here, the capacitor electrode 522 is provided on the same layer as the gate wiring 512. The insulating film of the storage capacitor includes a gate insulating film 513 of FIG. 6A and a protective film interposed between the gate wiring and the pixel electrode. 516).

The capacitor electrode 522 extends from the edge of the pixel to receive the Vcom signal from the outside of the active region and is integrally connected. An extended capacitor electrode also overlaps the edge of the pixel electrode to form a storage capacitor.

Accordingly, the shape of the capacitor electrode on the basis of each block becomes a U-shape rotated by ± 90 °, and the shape of the capacitor electrode on the basis of each unit pixel is a r-shape rotated by ± 90 °.

At this time, in order to prevent the parasitic capacitance from being formed between the data wiring 515 and the capacitor electrode 522, the capacitor electrodes 522 are formed on both sides of the data wiring edges without overlapping the data wiring 515. It is then extended in the middle of the pixel and integrally connected. The capacitor electrode 522 in the block is formed in a cylindrical shape in the middle of dividing the pixel.

However, as shown in FIG. 9, the capacitor electrode 522 between the pixel electrode 517 and the pixel electrode is not formed in a cylindrical shape, but is formed at intervals between the pixels, and is formed integrally by extending from the middle of the pixel. It can also be formed in a structure to connect. However, this third embodiment also has the same effect as the capacitor electrode structure according to the second embodiment.                     

6A and 6B, the TFT array substrate 511 is oppositely bonded to the color filter array substrate 551. The color filter array substrate 551 has a pixel electrode (B) to shield light leakage. The black matrix 552 overlaps the corner, the gate wiring 512, the data wiring 515, and the thin film transistor TFT.

In this case, the width of the opening region between the black matrix 552 is designed to be the same as the width of the opening region between the capacitor electrodes 522, so that the upper and lower substrates are not misaligned, the edge of the black matrix and the edge of the capacitor electrode. Should be on the same line.

 In the liquid crystal display according to the second embodiment, when the color filter array substrate 551 and the TFT array substrate 511 are misaligned, the aperture ratios of the left and right pixels around the capacitor electrode 522 are changed to be the same. It is characterized by.

That is, as shown in FIG. 6A, when the color filter array substrate 551 is shifted to the left and aligned, the black matrix 552 that shields light is shifted to the left as well, based on the capacitor electrode 522. Therefore, the opening area of the left pixel decreases from L to L ', and the opening area of the right pixel also decreases from R to R'. However, since the reduction rate of the opening area of the left and right pixels is the same (L '= R'), it is possible to overcome the poor image quality due to the opening area unevenness.

In addition, as shown in FIG. 6B, when the color filter array substrate 551 is shifted to the right and aligned, the black matrix 552 that shields light is shifted to the right as well, based on the capacitor electrode 522. Therefore, the opening area of the left pixel decreases from L to L ", and the opening area of the right pixel also decreases from R to R". In this case as well, since the reduction ratio of the opening area of the left and right pixels is the same (L '= R'), it is possible to overcome the poor image quality due to the opening area unevenness.

As described above, since the left and right pixel opening regions are uniformly changed at the same reduction rate according to the bonding misalignment of the upper and lower substrates, it is possible to prevent display quality deterioration due to uneven opening regions of the left and right pixels.

In addition, as a result of performing simulation by designing the pixel using the design rule in the first embodiment, it was confirmed that the opening ratio increased by 3 to 5%.

Hereinafter, the manufacturing method of the liquid crystal display device according to the second embodiment of the present invention will be described.

First, as shown in FIGS. 7A and 8A, copper (Cu) and aluminum (Al) having a low specific resistance of 15 μΩcm ⁻¹ or less for preventing signal delay on the transparent and heat resistant TFT array substrate 511. And depositing and patterning a first low resistance metal layer such as aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum-tungsten (MoW) Thus, the gate wiring 512, the gate electrode 512a, and the capacitor electrode 522 are formed.

The gate wiring 512 is formed in parallel in a row, the gate electrode 512a is formed integrally with the gate wiring, and the capacitor electrode 522 is rotated by ± 90 ° between the gate wiring and the gate wiring. After forming in form, it is connected to each other integrally.

Next, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface including the gate electrode 512a by PECVD to form a gate insulating film 513.

Subsequently, a semiconductor layer 514 is formed by sequentially depositing amorphous silicon (a-Si) and an ohmic contact layer (n + a-Si) ion-implanted with impurities into the amorphous silicon on the entire surface of the gate insulating layer 513. do.

As shown in FIGS. 7B and 8B, the second low resistance metal layer, which is a material for data wiring, is deposited and patterned on the entire surface including the semiconductor layer 514 to vertically cross the gate wiring. Source / drain electrodes 515a and 515b are formed on the semiconductor layer 514.

In this case, a block is defined by the gate line 512 and the data line 515, and the capacitor electrode 522 having a letter-shaped rotated by ± 90 ° is disposed in the block. The center edge side of the capacitor electrode 522 is positioned at the center of the block so that the block can be divided into two unit pixels, and the end edge side of the capacitor electrode 522 is positioned at the edge of the data line.

For reference, the center edge of the capacitor electrode may be divided into two parts at intervals between pixels and connected to each other (see FIG. 9).

Meanwhile, the thin film transistor TFT formed by stacking the gate electrode 512a, the gate insulating layer 513, the semiconductor layer 514, and the source / drain electrodes 515a and 515b includes a gate wiring 512 and a data wiring ( 515, the left and right pixels share one data line around one data line, and the thin film transistors of the left and right pixels also receive pixel signals from one data line.

Next, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface including the data line 515 to form a protective film 516. The protective layer may be formed by applying an organic insulating material such as BCB (Benzocyclobutene), acrylic resin (acryl resin).

In this case, the protective layer 516 is removed to expose the drain electrode 515b to form a contact hole 518.

Subsequently, as shown in FIGS. 7C and 8C, a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited on the entire surface including the passivation layer 516 by a sputtering method. The pixel electrode 517 is patterned by a photolithography process and connected to the drain electrode 515b through the contact hole 518.

The pixel electrode 517 is formed for each pixel, and is formed to overlap the capacitor electrode 522 to form a storage capacitor. At this time, a capacitor electrode (particularly, a center edge of the capacitor electrode) is disposed between the pixel electrode and the pixel electrode in the block to shield the coupling phenomenon between the pixel electrodes.

The TFT array substrate 511 having such a structure is opposed to the color filter array substrate 551 with the liquid crystal layer 560 interposed therebetween, as shown in FIGS. 7D and 8D. ), A black matrix 552 for preventing light leakage, a color filter layer 553 in which R, G, and B color resists are formed in a predetermined order between the black matrix, and a TFT formed on the entire surface including the color filter layer. A common electrode 554 is formed to form an electric field together with the pixel electrodes of the array substrate.

In this case, the black matrix 552 is formed to overlap the edge of each pixel, such as a gate wiring, a data wiring, a corner of the pixel electrode, and a thin film transistor.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

The liquid crystal display device and its manufacturing method according to the present invention as described above has the following effects.

First, in a liquid crystal display device having a structure in which two pixels share one data line, the capacitor electrode is changed from a T-shaped rotated by 90 ° to a C-shaped rotated by ± 90 ° or a L-shaped rotated by ± 90 °. In addition, the problem of unevenly changing the left and right pixel opening regions due to the bonding misalignment of the upper and lower substrates is prevented, thereby preventing display quality deterioration.

Second, by providing a capacitor electrode between the pixel electrode on which the data wiring is arranged and the pixel electrode, the coupling phenomenon occurring between the pixel electrodes is shielded to improve image quality.

Claims (15)

A gate wiring and a data wiring defining a block by vertically crossing the first substrate; A thin film transistor formed at a point where the two wires cross each other; A pixel electrode connected to the thin film transistor; A capacitor electrode formed between the pixel electrode and the pixel electrode in the block and dividing one block into two pixels; And a second substrate facing the first substrate and having a liquid crystal layer interposed therebetween. The method of claim 1, C capacitor method of the liquid crystal display device, characterized in that the capacitor electrode is rotated ± 90 ° in each block is integrally connected to each other. The liquid crystal display of claim 1, wherein the capacitor electrodes of the respective pixels have a U-shape rotated by ± 90 ° and are integrally connected to each other. The method of claim 1, The capacitor electrode overlaps an edge of the pixel electrode to form a storage capacitor. The method of claim 1, And the capacitor electrode is provided on the same layer as the gate line. The method of claim 1, And two thin film transistors and a pixel electrode are formed in the block, respectively. The method of claim 1, And left and right pixels centering on the data line share one data line. The method of claim 1, In the black matrix further provided on the second substrate, And the width of the opening region between the black matrix electrodes is equal to the width of the opening region between the capacitor electrodes. Forming a gate wiring and a gate electrode on the first substrate; Forming a capacitor electrode between the gate lines; Forming a gate insulating film on the entire surface including the gate wiring; Forming a semiconductor layer on the gate insulating film on the gate electrode; Forming a data line defining a block consisting of pixels of two regions perpendicular to the gate line and a source / drain electrode branched from the data line; Forming a protective film on the entire surface including the data line; Forming a pixel electrode on each pixel on the passivation layer so as to overlap the capacitor electrode; And opposingly bonding a second substrate having a black matrix to the first substrate and forming a liquid crystal layer therebetween. The method of claim 9, And forming one corner side of the capacitor electrode between the pixel electrode and the pixel electrode in the block. The method of claim 9, The capacitor electrode is a liquid crystal display device, characterized in that to form a letter-shaped rotated ± 90 ° in each block connected to each other. The method of claim 9, The capacitor electrode is a method of manufacturing a liquid crystal display device, characterized in that formed in the form of the U-shaped rotated ± 90 ° in each pixel and connected to each other. The method of claim 9, And a source electrode of the left and right pixels based on the data line is branched from the reference data line. The method of claim 9, And the black matrix is formed to overlap the edge of each pixel including the gate line, the data line, the edge of the pixel electrode, and the thin film transistor. The method of claim 9, And the capacitor electrode is formed simultaneously with the gate wiring.

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