KR101352113B1 - Liquid Crystal Display Panel Of Horizontal Electronic Fileld Applying Type and Method of Fabricating the same - Google Patents

Liquid Crystal Display Panel Of Horizontal Electronic Fileld Applying Type and Method of Fabricating the same Download PDF

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Publication number
KR101352113B1
KR101352113B1 KR1020070048352A KR20070048352A KR101352113B1 KR 101352113 B1 KR101352113 B1 KR 101352113B1 KR 1020070048352 A KR1020070048352 A KR 1020070048352A KR 20070048352 A KR20070048352 A KR 20070048352A KR 101352113 B1 KR101352113 B1 KR 101352113B1
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South Korea
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common
line
electrode
pixel
gate
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KR1020070048352A
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Korean (ko)
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KR20080102045A (en
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오재영
오금미
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엘지디스플레이 주식회사
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Priority to KR1020070048352A priority Critical patent/KR101352113B1/en
Priority claimed from US12/121,441 external-priority patent/US8125603B2/en
Publication of KR20080102045A publication Critical patent/KR20080102045A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13458Terminal pads
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Abstract

The present invention relates to a horizontal field application type liquid crystal display panel capable of increasing the aperture ratio and improving color reproducibility and a method of manufacturing the same.
The present invention relates to a horizontal field application type liquid crystal display panel in which pixels defined by first to third pixel regions that implement different colors are arranged in a matrix form, wherein data lines and gate lines are formed to cross each other on a substrate. and; A thin film transistor positioned at an intersection of the gate line and the data line and a pixel electrode connected to the thin film transistor; A common electrode forming a horizontal electric field with the pixel electrode; A first common line parallel to the gate line and a second common line partially overlapping the data electrode; and a second common line parallel to the data line, and between neighboring first and second pixel regions of the first to third pixel regions. Two second common lines are positioned, and two data lines are positioned between the two second common lines. The common electrode is parallel to the gate line and is in contact with the second common line, and the first common electrode is formed of a transparent electrode material. ; A second common electrode extending from the first common electrode and parallel to the data line, wherein the first common electrode is in contact with the second common line through a contact hole formed to expose a second common line parallel to the data line; The second common line and the data line may not be positioned between the second and third pixel areas.

Description

Liquid Crystal Display Panel Of Horizontal Electronic Fileld Applying Type and Method of Fabricating the same}

1 is a cross-sectional view showing a conventional horizontal field application liquid crystal display panel.

2 is a plan view illustrating a thin film transistor array substrate of a horizontal field applied liquid crystal display panel according to a first embodiment of the present invention.

3 is a cross-sectional view illustrating a liquid crystal display panel taken along the line II ′ in FIG. 2.

4 is a cross-sectional view illustrating a liquid crystal display panel taken along the line II-II ′ of FIG. 2.

5A through 5D are cross-sectional views for explaining a method of manufacturing a horizontal field thin film transistor array substrate in accordance with a first embodiment of the present invention.

6 is a plan view showing still another embodiment of a thin film transistor array substrate of a horizontal field application type liquid crystal display panel according to a first embodiment of the present invention;

FIG. 7 is a cross-sectional view schematically illustrating only pixel regions in one pixel of FIG. 2.

8 is a plan view illustrating a thin film transistor array substrate of a horizontal field applied liquid crystal display panel according to a second exemplary embodiment of the present invention.

9 is a plan view showing still another embodiment of the thin film transistor array substrate of the horizontal field application type liquid crystal display panel according to the first embodiment of the present invention.

10 is a plan view illustrating a thin film transistor array substrate of a horizontal field application type liquid crystal display panel according to a third exemplary embodiment of the present invention.

FIG. 11 is a view directly comparing the liquid crystal display panel of FIG. 1 and the liquid crystal display panel of FIG. 4 of the present invention. FIG.

<Explanation of symbols for the main parts of the drawings>

2, 102: gate line 4, 104: data line

6, 106 thin film transistor 8, 108 gate electrode

10 source electrode 12, 112 drain electrode

14, 114: pixel electrode 14a, 114a: first pixel electrode

14b and 114b: second pixel electrode 16 and 116: common line

16a, 116a: first common line 14b, 114b: second common line

18, 118: common electrode 18a, 118a: first common electrode

18b and 118b: second common electrode 50 and 150: protective film

44,144 gate insulating film 5,105 pixel region

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel, and more particularly, to a horizontal field application type liquid crystal display panel capable of improving aperture ratio and preventing display quality deterioration and a method of manufacturing the same.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such liquid crystal display devices are classified into vertical electric field types and horizontal electric field types according to the direction of the electric field for driving the liquid crystal.

In the vertical field applying liquid crystal display, the common electrode formed on the upper substrate and the pixel electrode formed on the lower substrate are disposed to face each other, and drive the liquid crystal of TN (Twisted Nemastic) mode by a vertical electric field formed therebetween. . Such a vertical electric field type liquid crystal display device has a disadvantage that the aperture ratio is large, but the viewing angle is as narrow as 90 degrees.

In the horizontal field application type liquid crystal display, a liquid crystal in an in-plane switch (hereinafter referred to as IPS) mode is driven by a horizontal electric field between a pixel electrode and a common electrode arranged side by side on a lower substrate. Such a horizontal field application liquid crystal display device has an advantage that a viewing angle is about 160 degrees. Hereinafter, the horizontal field application liquid crystal display will be described in detail.

The horizontal field application type liquid crystal display includes a thin film transistor array substrate (lower substrate) and a color filter array substrate (upper substrate) bonded to each other, a spacer for maintaining a constant cell gap between the two substrates, and a spacer. A liquid crystal filled in the prepared liquid crystal space is provided.

The thin film transistor array substrate is composed of a plurality of signal lines and thin film transistors for forming a horizontal electric field in pixels, and an alignment film coated thereon for liquid crystal alignment. The color filter array substrate is composed of a color filter for color implementation, a black matrix for preventing light leakage, and an alignment film coated thereon for liquid crystal alignment.

The thin film transistor array substrate may include a gate line and a data line intersecting a gate insulating layer on a lower substrate, a thin film transistor formed at each crossing portion thereof, a pixel electrode formed to form a horizontal electric field in a pixel region having the cross structure; A common electrode and a common line to which the common electrodes are connected in common are provided.

The common line is located at the lower end of the pixel area, and the first common line is parallel to the gate line, the second common line is parallel to the data line, and the third common line is located at the upper end of the pixel area. Include. The common line supplies a reference voltage for driving the liquid crystal to the common electrode.

Meanwhile, in the conventional horizontal field application type liquid crystal display panel illustrated in FIG. 1, the second common line 16b positioned at both sides of the data line 4 is formed between the data line 4 and the second common electrode 18b. It serves to minimize the coupling phenomenon caused by the parasitic capacitor. However, as the second common line 16b is formed of the same opaque metal as the gate line 2, the black matrix 66 is positioned in the region overlapping the second common line 16b as shown in FIG. 3. do. As a result, there arises a problem that the aperture ratio is lowered.

Accordingly, it is an object of the present invention to provide a horizontal field application type liquid crystal display panel and a method for manufacturing the same, which can improve the aperture ratio and prevent the degradation of display quality.

In order to achieve the above object, the present invention provides a horizontal field application type liquid crystal display panel in which pixels defined by first to third pixel regions that implement different colors are arranged in a matrix so that they cross each other on a substrate. A data line and a gate line formed; A thin film transistor positioned at an intersection of the gate line and the data line, and a pixel electrode connected to the thin film transistor; A common electrode forming a horizontal electric field with the pixel electrode; A first common line parallel to the gate line and partially overlapping the pixel electrode, and a second common line parallel to the data line, and adjacent to the first and third pixel areas; Two second common lines are positioned between the pixel regions, two data lines are positioned between the two second common lines, and the common electrode is parallel to the gate line and is in contact with the second common line and is transparent. A first common electrode formed of an electrode material; A second common electrode extending from the first common electrode and parallel to the data line, wherein the first common electrode includes a second common line through a contact hole formed to expose a second common line parallel to the data line; The second common line and the data line are not disposed between the second and third pixel areas.

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The common electrode is parallel to a gate line and is in contact with the second common line; And a second common electrode extending from the first common electrode and parallel to the data line.

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The first pixel region implements red color, the second pixel region implements green color, and the third pixel region implements blue color.

The present invention is a horizontal field application type liquid crystal display panel in which pixels defined by first to fourth pixel regions arranged in two rows and two columns are arranged in a matrix form, wherein data lines and gate lines are formed to cross each other on a substrate. and; A thin film transistor positioned at an intersection of the gate line and the data line, and a pixel electrode connected to the thin film transistor; A common electrode forming a horizontal electric field with the pixel electrode; And a second common line parallel to the gate line and partially overlapping the pixel electrode, and a second common line parallel to the data line, wherein the two common lines are positioned between neighboring pixels. Two first data lines between the two second common lines, the common electrode being parallel to a gate line and in contact with the second common line and formed of a transparent electrode material; A second common electrode extending from the first common electrode and parallel to the data line, wherein the first common electrode includes a second common line through a contact hole formed to expose a second common line parallel to the data line; It is characterized in that the contact.

The second common line and the data line are not positioned between the first to fourth pixel areas in the one pixel.

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The first pixel region implements red color, the second pixel region implements green color, the third pixel region implements blue color, and the fourth pixel region implements white color.

The present invention provides a method of manufacturing a horizontal field application liquid crystal display panel in which pixels forming one pixel are arranged in a matrix form, wherein a gate line and a gate connected to the gate line are formed on a substrate. Forming a gate pattern including an electrode, a first common line parallel to the gate line, and a second common line extending from the first common line; Forming a gate insulating film on the gate pattern; Forming a data line crossing the gate line and a thin film transistor connected to the data line on the gate insulating layer; Forming a passivation layer having a first contact hole exposing a drain electrode of the thin film transistor; Forming a pixel electrode in contact with the drain electrode through the first contact hole and a common electrode forming a horizontal electric field with the pixel electrode, wherein the first and second neighboring ones of the first to third pixel areas are formed; Two second common lines are positioned between the pixel regions, two data lines are positioned between the two second common lines, and the forming of the common electrode is parallel to the gate line and is performed on the second common line. A first common electrode in contact with a common line and formed of a transparent electrode material, and a second common electrode extending from the first common electrode and parallel to the data line, wherein the first common electrode is a second common electrode parallel to the data line Contact with the second common line through a contact hole formed to expose the line.

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The present invention provides a method of manufacturing a horizontal field application type liquid crystal display panel in which pixels defined by first to fourth pixel regions arranged in two rows and two columns are arranged in a matrix. Forming a gate pattern including a connected gate electrode, a first common line parallel to the gate line, and a second common line extending from the first common line; Forming a gate insulating film on the gate pattern; Forming a data line crossing the gate line and a thin film transistor connected to the data line on the gate insulating layer; Forming a passivation layer having a first contact hole exposing a drain electrode of the thin film transistor; Forming a pixel electrode in contact with the drain electrode through the first contact hole and a common electrode forming a horizontal electric field with the pixel electrode, wherein the two common lines are positioned between neighboring pixels; Two data lines are positioned between the two second common lines, and the forming of the common electrode includes: a first common electrode parallel to the gate line and in contact with the second common line and formed of a transparent electrode material; And a second common electrode extending from the first common electrode and parallel to the data line, wherein the first common electrode is formed through the contact hole formed to expose a second common line parallel to the data line. And in contact with.

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Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 2 to 11.

2 is a plan view illustrating a horizontal field application type liquid crystal display panel according to a first exemplary embodiment of the present invention, and FIGS. 3 and 4 are thin film transistor arrays taken along lines II ′ and II-II ′ of FIG. 3. Cross-sectional views showing substrates. In FIG. 4, only the thin film transistor array substrate of the liquid crystal display panel is shown for convenience of expression.

First, one pixel in the liquid crystal display panel shown in FIGS. 2 to 4 is composed of three R, G, and B subpixels, and each subpixel includes a pixel region in which an image is implemented. Therefore, one pixel includes three pixel areas for implementing different colors.

Two data lines 104 are positioned adjacent to each other between two pixel areas adjacent to each other among the three pixel areas. The data line 104 is not positioned between the other pixel region and the pixel region adjacent to the other pixel region. In FIG. 4, the data line 104 is not positioned between the pixel region 105 of the R subpixel and the pixel region 105 of the G subpixel, and the pixel region 105 of the G subpixel and the pixel region of the B subpixel ( Two data lines 104 and two second common lines 116b are positioned between the lines 105. The G subpixels and the B subpixels have a structure that is symmetrical with respect to the data line 104.

Each of the RGB subpixels includes a gate line 102 and a data line 104 formed to intersect on a lower substrate 145 with a gate insulating layer 144 therebetween, a thin film transistor 106 formed at each intersection thereof, The pixel electrode 114 and the common electrode 118 formed to form a horizontal electric field in the pixel region 105 provided in the cross structure are provided, and the common line 116 to which the common electrodes 118 are commonly connected is provided.

The gate line 102 supplies a gate signal to the gate electrode 108 of the thin film transistor 106. The data line 104 supplies a pixel signal to the pixel electrode 114 through the drain electrode 112 of the thin film transistor 106. The gate line 102 and the data line 104 are formed in an intersecting structure to define the pixel region 105.

The thin film transistor 106 keeps the pixel signal of the data line 104 charged and held in the pixel electrode 114 in response to the gate signal of the gate line 102. To this end, the thin film transistor 106 includes a gate electrode 108 connected to the gate line 102, a source electrode 110 connected to the data line 104, and a drain electrode connected to the pixel electrode 114. 112 is provided.

In addition, the thin film transistor 106 may further include a semiconductor pattern 149 disposed under the source electrode 110 and the drain electrode 112. The semiconductor pattern 148 includes an active layer 115 and an ohmic contact layer 149. The active layer 115 is exposed between the source electrode 110 and the drain electrode 112 to serve as a channel. The ohmic contact layer 149 is positioned between the source electrode 110 and the active layer 115 and is located between the drain electrode 112 and the active layer 114. The ohmic contact layer 149 causes the source electrode 110 and the drain electrode 112 to make ohmic contact with the active layer 115. The thin film transistor 106 having the above configuration is protected by the passivation layer 150.

The common line 116 is positioned at the lower end of the pixel area 105 and parallel to the gate line 102, the first common line 116a, the second common line 116b parallel to the data line 104, and The third common line 116c is disposed at an upper end of the pixel region 105 in parallel with the gate line 102. That is, the first common line 116a and the third common line 116c have a symmetrical structure with the pixel region 105 interposed therebetween.

 The common line 116 supplies a reference voltage for driving the liquid crystal to the common electrode 118.

The pixel electrode 114 is connected to the drain electrode 112 of the thin film transistor 106 through the contact hole 117 and is formed in the pixel region 105. In particular, the pixel electrode 114 is connected to the drain electrode 112 and is formed in parallel with the adjacent gate line 102 and the second pixel electrode parallel to the second common line 116b. 114b).

The common electrode 118 partially overlaps the first common line 116a and is parallel to the first common electrode 118a parallel to the gate line 102 and parallel to the second pixel electrode 114b in the pixel region 105. The second common electrode 118b is included. The common electrode 118 is contacted through the third common line 116c and the second contact hole 119 to receive a reference voltage from the common line 116.

The common line 116 is formed of the same metal as the gate line 102 and the gate electrode 108, whereas the common electrode 118 is formed of the same metal as the pixel electrode 114.

The data line 104, the second common electrode 118b, and the second common line 116b are all formed in a zig-zag shape (or have a bent structure in one subpixel) or a stripe. Can be.

In the horizontal field application type liquid crystal display panel according to the first exemplary embodiment of the present invention, only two second common lines 118b may be positioned in two neighboring subpixels. As a result, the aperture ratio can be increased as compared with the conventional liquid crystal display panel shown in FIG. 1 in which four second common lines 118b are located in two sub-pixels.

In more detail, in the conventional liquid crystal display panel, as shown in FIG. 3, two second common lines 18b are adjacent to one data line 104. Therefore, two second common lines 18b are located between the R pixel region 5 and the G pixel region 105, and two second common lines 18b are also located between the G pixel region 5 and the B pixel region 5. The common line 18b is located.

In contrast, in the liquid crystal display panel according to the present invention, as shown in FIGS. 2 and 4, a second common line 18b is formed between the pixel region 105 of the R subpixel and the pixel region 105 of the G subpixel. The second common line 18b is positioned only between the pixel region 105 of the G subpixel and the pixel region 105 of the B subpixel. Accordingly, the aperture ratio of each pixel including the RGB subpixels can be improved by an area occupied by two second common lines 18b. Therefore, by employing the structure according to the first embodiment of the present invention, the opening ratio can be improved by about 4% or more as compared with the related art.

5A through 5D are cross-sectional views illustrating a method of manufacturing a thin film transistor array substrate of a horizontal field applied liquid crystal display panel according to a first embodiment of the present invention.

Referring to FIG. 5A, a gate pattern is formed on a lower substrate.

Specifically, the gate metal layer is deposited on the lower substrate 145 through a deposition method such as sputtering, and then the gate metal layer is patterned by a photolithography process and an etching process, thereby forming the gate electrode 108, the gate line 102, and the common line. A gate pattern including 116 is formed.

The common line 116 is positioned at the lower end of the pixel area 105 and parallel to the gate line 102, the first common line 116a, the second common line 116b parallel to the data line 104, and The third common line 116c is disposed at an upper end of the pixel region 105 and is parallel to the gate line 102.

Here, aluminum neodium (AlNd), aluminum (Al), or the like is used as the gate pattern metal layer.

The gate insulating layer 144 is formed by depositing an inorganic insulating material on the lower substrate 145 on which the gate pattern is formed by a deposition method such as PECVD. Here, as the material of the gate insulating film 144, silicon nitride (SiNx), silicon oxide (SiOx), or the like, which is an inorganic insulating material, is used.

Referring to FIG. 5B, a data line 104, a thin film transistor 106, and a storage capacitor Cst are formed on the gate insulating layer 144.

In detail, an amorphous silicon layer, an n + amorphous silicon layer, and a source / drain metal layer are sequentially formed on the lower substrate 142 on which the gate insulating layer 144 is formed through a deposition method such as PECVD or sputtering.

A photoresist pattern is formed by a photolithography process using a mask on the source / drain metal layer. In this case, the photoresist pattern of the channel portion has a lower height than the other source / drain pattern portions by using a diffraction exposure mask or a halftone mask having a diffraction exposure portion in the channel portion of the thin film transistor 106 as the mask.

Subsequently, the source / drain metal layer is patterned by a wet etching process using a photoresist pattern, so that the data line 104, the source electrode 110, the drain electrode 112 integrated with the source electrode 110, and the storage electrode 122 are formed. Source / drain patterns including are formed.

Subsequently, the n + amorphous silicon layer and the amorphous silicon layer are simultaneously patterned by a dry etching process using the same photoresist pattern, thereby forming a semiconductor pattern 148 in which the ohmic contact layer 149 and the active layer 115 are stacked.

The photoresist pattern having a relatively low height in the channel portion is removed by an ashing process, and then the source / drain pattern and the ohmic contact layer 149 of the channel portion are etched by a dry etching process. Accordingly, the active layer 115 of the channel portion is exposed to separate the source electrode 110 and the drain electrode 112. Then, the photoresist pattern remaining on the source / drain pattern portion in the strip process is removed.

As a result, the data line 104, the thin film transistor 106 connected with the data line 104, and the storage capacitor Cst are formed.

Here, the two data lines 104 are positioned adjacent to each other, and the thin film transistor 106 is positioned to face each other with respect to the two data lines 104. As the source / drain metal, molybdenum (Mo), titanium, tantalum, molybdenum alloy (Mo alloy) and the like are used.

Referring to FIG. 5C, a protective film 150 is formed by depositing an inorganic insulating material on the lower substrate 145 on which the thin film transistor 106 is formed. Here, as the material of the protective film 150, silicon nitride (SiNx), silicon oxide (SiOx), or the like, which is an inorganic insulating material, is used. Thereafter, the passivation layer 150 is patterned by a photolithography process and an etching process to form a first contact hole 117 and a second contact hole 119 (not shown). The first contact hole 117 penetrates the passivation layer 150 to expose the drain electrode 112 of the thin film transistor 106, and the second contact hole 119 penetrates the gate insulating layer 144 and the passivation layer 150. To expose the third common line 116c.

Referring to FIG. 5D, the transparent electrode material is sequentially deposited on the passivation layer 150 having the first and second contact holes 117 and 119 by sputtering or the like, followed by a photolithography process and an etching process. The electrode 114 and the common electrode 118 are formed.

The pixel electrode 114 is connected to the drain electrode 112 through the first contact hole 117 and is formed in parallel with the adjacent gate line 102 and the first pixel electrode 114a. The extended second pixel electrode 114b is included.

The common electrode 118 partially overlaps the third common line 116c, and is in contact with the third common line 116c through the second contact hole 119, and the pixel region ( The second common electrode 118b parallel to the second pixel electrode 114b is disposed at 105.

The material of the transparent electrode pattern is indium tin oxide (hereinafter referred to as "ITO"), tin oxide (hereinafter referred to as "TO"), and indium zinc oxide (hereinafter referred to as "IZO"). Or indium tin zinc oxide (hereinafter referred to as "ITZO").

6 is a plan view illustrating a structure of still another embodiment of a liquid crystal display panel according to the first embodiment of the present invention.

In FIG. 6, the third common line 116c positioned at the upper end of the subpixel among the common lines 116 is removed, and the common electrode 118 is removed through the second common line 116b and the third contact hole 129. Contact. Accordingly, the opening ratio may be further improved by the area where the third common line 116c is located. Except for this, the structure of the horizontal field application type liquid crystal display panel shown in FIG. 6 has the same structure as that of FIG.

On the other hand, the horizontal field-applied liquid crystal display panel according to the first embodiment of the present invention has an advantage that the aperture ratio can be improved as compared with the prior art, but two data lines 104 between neighboring pixel regions 105 are provided. And as the second common line 116b is located, the distance between neighboring pixel regions 105 is increased, which may reduce color reproducibility.

That is, as shown in FIG. 7, the distance between the G pixel region 105 and the B pixel region 105 is relatively far from each other, while the R pixel region 105 and the G pixel region 105 are adjacent to each other. . As a result, the color reproducibility is deteriorated and there is a possibility that the image quality is lowered.

Therefore, the second embodiment of the present invention proposes a structure that can improve aperture ratio and improve color reproducibility.

8 is a plan view illustrating a horizontal field applied liquid crystal display panel according to a second exemplary embodiment of the present invention. In the liquid crystal display panel according to the second embodiment of the present invention illustrated in FIG. 8, unlike the liquid crystal display panel according to the first embodiment of the present invention illustrated in FIGS. 2 to 4, four sub-pixels constitute one pixel. The structure shown is shown. Except for this, the liquid crystal display panel according to the second exemplary embodiment of the present invention has the same components as those of the liquid crystal display panel in FIGS. 2 to 4, and therefore the same components as in FIGS. Detailed description will be omitted.

Referring to FIG. 8, in the horizontal field applied liquid crystal display panel according to the second exemplary embodiment of the present invention, one pixel is divided into R (red), G (green), B (blue), and W (white) subpixels. do. Accordingly, one pixel can realize one specific color by mixing colors in the R (red), G (green), B (blue), and W (white) pixel regions 105.

That is, one pixel is defined as a pixel area of two rows by two columns, and the second common line 118b and the data line 104 are not located between neighboring pixel areas within one pixel, and are located between neighboring pixels. Two second common lines 118b and two data lines 104 are positioned.

As a result, the aperture ratio can be improved and the distance between neighboring pixel regions can be minimized, thereby improving color reproducibility.

In the manufacturing method of the horizontal field application type liquid crystal display panel according to the second embodiment of the present invention, one pixel includes four sub-pixels that implement different colors, and two second common lines 116b between neighboring pixels. ) And two data lines 104 are formed to be positioned by the same process as the manufacturing process of the thin film transistor array substrate according to the first embodiment of the present invention.

That is, in the method of manufacturing the horizontal field application type liquid crystal display panel according to the second embodiment of the present invention, the gate pattern is formed by the first mask process and the second mask process is performed in the same manner as the first embodiment of the present invention. The data line 104, the thin film transistor 106, and the like are formed, the protective film 150 is formed by the third mask process, and the common electrode 118, the pixel electrode 114, etc. are formed by the fourth mask process. .

However, in the second embodiment of the present invention, unlike the first embodiment, two second common lines 116b are positioned between neighboring pixels, and two data lines 104 are disposed between two second common lines 116b. ) Is formed, and the data line 104 and the second common line 116b are not formed between the adjacent pixel regions 105 in one pixel.

Other specific manufacturing process is duplicated with the description of Figures 5a to 5d and the description thereof will be omitted below.

9 is a plan view showing a structure of still another embodiment of a horizontal field application type liquid crystal display panel according to a second embodiment of the present invention.

In FIG. 9, the third common line 116c positioned at the upper end of the subpixel among the common lines 116 is removed, and the common electrode 118 is removed through the second common line 116b and the third contact hole 129. Contact. Accordingly, the opening ratio may be larger as much as the region where the third common line 116c is located. Except for this, the structure of the liquid crystal display panel illustrated in FIG. 11 has the same structure as that of FIG. 2.

10 is a plan view illustrating a horizontal field application type liquid crystal display panel according to a third exemplary embodiment of the present invention. The horizontal field application type liquid crystal display panel according to the third embodiment of the present invention shown in FIG. 10 is a subpixel of 2 rows x 2 columns as compared to the liquid crystal display panel according to the second embodiment of the present invention shown in FIG. Vertically adjacent subpixels among one defined pixel have a symmetric structure with each other. In addition, the vertically adjacent subpixels are formed to share one third common line 118c. In addition, the third common line 118c is in contact with the first common electrode 118a through the second contact hole 119. Accordingly, the vertically adjacent western pixels (or pixel regions) have a structure in which the first common electrode 118a is also shared.

As a result, the third embodiment of the present invention has a spacing between vertically neighboring pixel regions of pixel regions constituting one pixel as compared to the liquid crystal display panel according to the second embodiment of the present invention shown in FIG. This gets closer. As a result, the horizontal field application type liquid crystal display panel according to the third embodiment of the present invention can further improve color reproducibility as compared with the second embodiment of the present invention.

Except for this difference, the horizontal field-applied liquid crystal display panel according to the third exemplary embodiment of the present invention has the same components as those of the liquid crystal display panel of FIGS. 2 to 4, and thus the same components as those of FIGS. Since the same effect is shown with the following detailed description will be omitted.

FIG. 11 is a view for numerically indicating that the aperture ratio is increased by employing the structure proposed in the present invention in direct contrast with FIG. 1 and FIG. 4 of the present invention.

X1 in FIG. 11 is an area including all of the thin film patterns that reduce the aperture ratio, such as the data line 4 and the second common line 16b around it (hereinafter, X1 is referred to as a "conventional data line bundle"). . In contrast, X2 refers to an area including both thin data patterns for reducing aperture ratio, such as two adjacent data lines 104 and a second common line 116b around the present invention (hereinafter referred to as “X2”). Of data lines).

Table 1 below shows the line widths of the thin film patterns constituting the conventional data line bundle (X1).

Data line width 5.7 μm 2nd common line width x 2 8.0 μm × 2 = 16.0 μm Spacing between the second common line and the data line 4.0 μm × 2 = 8.0 μm Margin with Common Electrode 3.5 μm × 2 = 7.0 μm

According to Table 1, the line width occupied by one conventional data line bundle X1 is about 36.7 μm.

However, in the related art, as the data line bundle X1 is positioned between each subpixel, two data line bundles X1 are positioned in two horizontally parallel subpixels. As a result, the total line width occupied by the data line bundle X1 in the two sub-pixels is about 76.4 mu m.

Table 2 below shows the line widths of the thin film patterns forming the data line bundle (X2) of the present invention.

Data line line width × 2 5.7 μm × 2 = 11.4 μm 2nd common line width x 2 8.0 μm × 2 = 16.0 μm Spacing between the second common line and the data line 4.0 μm × 2 = 8.0 μm Margin with Common Electrode 3.5 μm × 2 = 7.0 μm Spacing between data lines 9.5 ㎛

According to Table 2, the line width occupied by the data line bundle X2 of the present invention is about 52 μm.

Comparing the conventional and the present invention based on two sub-pixels arranged in a horizontal direction, the total line width occupied by the total 2 data line bundles X1 is about 76.4, whereas the data line bundles X1 are located in each sub-pixel. Although it is about 탆, in the present invention, as one data line bundle X2 is located, it can be seen that the line width of about 21.4 탆 can be reduced as compared with the conventional art.

As a result, the total aperture ratio can be increased by about 4 to 10%.

As described above, the horizontal field-applied liquid crystal display panel and the method of manufacturing the same according to the present invention have a structure in which three pixel regions that implement different colors define one pixel, and any two adjacent ones of the three pixel regions are adjacent to each other. Only two data lines are positioned adjacent to each other. Alternatively, when a pixel area of two rows by two columns defines one pixel, two data lines are positioned adjacent to each other only between neighboring pixels, and one common line is shared in vertically adjacent pixel areas.

As a result, the aperture ratio can be increased and the spacing between neighboring pixel regions can be minimized, thereby improving color reproducibility.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (18)

  1. In a horizontal field application type liquid crystal display panel in which pixels defined by first to third pixel regions that implement different colors are arranged in a matrix form,
    A data line and a gate line formed to cross each other on the substrate;
    A thin film transistor positioned at an intersection of the gate line and the data line, and a pixel electrode connected to the thin film transistor;
    A common electrode forming a horizontal electric field with the pixel electrode;
    A first common line parallel to the gate line and partially overlapping the pixel electrode, and a second common line parallel to the data line;
    Two second common lines are positioned between adjacent first and second pixel regions among the first to third pixel regions, and two data lines are positioned between the two second common lines.
    The common electrode being parallel to the gate line and in contact with the second common line and formed of a transparent electrode material;
    A second common electrode extending from the first common electrode and parallel to the data line;
    The first common electrode contacts the second common line through a contact hole formed to expose a second common line parallel to the data line,
    And wherein the second common line and the data line are not positioned between the second and third pixel regions.
  2. delete
  3. delete
  4. delete
  5. The method of claim 1,
    The first pixel region implements red color,
    The second pixel region implements green color,
    And wherein the third pixel area is blue.
  6. In a horizontal field application type liquid crystal display panel in which pixels defined by first to fourth pixel regions arranged in two rows and two columns are arranged in a matrix form,
    A data line and a gate line formed to cross each other on the substrate;
    A thin film transistor positioned at an intersection of the gate line and the data line, and a pixel electrode connected to the thin film transistor;
    A common electrode forming a horizontal electric field with the pixel electrode;
    A first common line parallel to the gate line and partially overlapping the pixel electrode, and a second common line parallel to the data line;
    Two second common lines are located between the neighboring pixels, and two data lines are located between the two second common lines.
    The common electrode being parallel to the gate line and in contact with the second common line and formed of a transparent electrode material;
    A second common electrode extending from the first common electrode and parallel to the data line;
    The first common electrode contacts the second common line through a contact hole formed to expose a second common line parallel to the data line,
    And the second common line and the data line are not positioned between the first to fourth pixel areas in the one pixel.
  7. delete
  8. delete
  9. delete
  10. delete
  11. delete
  12. The method of claim 6,
    The first pixel region implements red color,
    The second pixel region implements green color,
    The third pixel region implements blue color,
    And wherein the fourth pixel area is white.
  13. In the method of manufacturing a horizontal field application type liquid crystal display panel in which the pixels of the first to third pixel regions constituting one pixel are arranged in a matrix form,
    Forming a gate pattern on the substrate, the gate pattern including a gate line, a gate electrode connected to the gate line, a first common line parallel to the gate line, and a second common line extending from the first common line;
    Forming a gate insulating film on the gate pattern;
    Forming a data line crossing the gate line and a thin film transistor connected to the data line on the gate insulating layer;
    Forming a passivation layer having a first contact hole exposing a drain electrode of the thin film transistor;
    Forming a pixel electrode in contact with the drain electrode through the first contact hole and a common electrode forming a horizontal electric field with the pixel electrode;
    Two second common lines are positioned between adjacent first and second pixel regions among the first to third pixel regions, and two data lines are positioned between the two second common lines.
    Forming the common electrode,
    A first common electrode parallel to the gate line and in contact with the second common line and formed of a transparent electrode material, and a second common electrode extending from the first common electrode and parallel to the data line;
    The first common electrode contacts the second common line through a contact hole formed to expose a second common line parallel to the data line,
    And wherein the second common line and the data line are not positioned between the second and third pixel regions.
  14. delete
  15. delete
  16. A method of manufacturing a horizontal field application type liquid crystal display panel in which pixels defined by arranging first to fourth pixel regions in two rows and two columns are arranged in a matrix form,
    Forming a gate pattern on the substrate, the gate pattern including a gate line, a gate electrode connected to the gate line, a first common line parallel to the gate line, and a second common line extending from the first common line;
    Forming a gate insulating film on the gate pattern;
    Forming a data line crossing the gate line and a thin film transistor connected to the data line on the gate insulating layer;
    Forming a passivation layer having a first contact hole exposing a drain electrode of the thin film transistor;
    Forming a pixel electrode in contact with the drain electrode through the first contact hole and a common electrode forming a horizontal electric field with the pixel electrode;
    Two second common lines are located between the neighboring pixels, and two data lines are located between the two second common lines.
    Forming the common electrode,
    A first common electrode parallel to the gate line and in contact with the second common line and formed of a transparent electrode material, and a second common electrode extending from the first common electrode and parallel to the data line;
    The first common electrode contacts the second common line through a contact hole formed to expose a second common line parallel to the data line,
    And the second common line and the data line are not positioned between the first to fourth pixel areas in the one pixel.
  17. delete
  18. delete
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US12/121,441 US8125603B2 (en) 2007-05-17 2008-05-15 In-plane switching mode liquid crystal display device and method for fabricating the same
CN200810098855.7A CN101308294B (en) 2007-05-17 2008-05-19 In-plane switching mode liquid crystal display device and manufacture method thereof
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