KR20060071994A - Manufacturing method for capacitor in semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a capacitor of a semiconductor device using Chemical Vapor Deposition (CVD) TiN as a capacitor material. The method for forming a capacitor of a semiconductor device includes forming an SN etch resistant nitride film on a semiconductor substrate on which an SNC plug poly is formed, forming a first and a second SN oxide film on the SN etch resistant nitride film, and depositing a hard mask poly Forming an elliptical photoresist, etching the hard mask poly using an elliptic photoresist, dry etching the first and second SN oxide films using the patterned SN hard mask poly as a mask, and hard etching Removing the mask poly and the SN etch resistant nitride film and then performing a cleaning process.

Capacitor, SNC, SN

Description

Manufacturing method for capacitor in semiconductor device             

1A to 1G are cross-sectional views for explaining a conventional SN forming process.

2 is a view for explaining the superposition of an elliptical SN and an SNC in a conventional semiconductor device.

3A and 3B are photographs and cross-sectional views for explaining the loss of an SNC spacer nitride film generated in an SN etching process in a conventional semiconductor device.

4A and 4B are wafer maps in which a TEM image and CAP leakage have occurred after SN TiN deposition in a conventional semiconductor device.

5 is a graph for comparing the etching amount in the phosphoric acid solution.

6A to 6G are cross-sectional views illustrating a SN forming process according to a preferred embodiment of the present invention.

7a to 7c is a SEM photograph for explaining the progress of the process according to a preferred embodiment of the present invention.

-Explanation of symbols for the main parts of the drawing-

102: bit line 104: SN stop nitride film                 

106: SNC spacer nitride film 108: SNC poly

110: SN first oxide film 112: SN second oxide film

114: SN hard mask poly 116: photoresist

The present invention relates to a semiconductor device, and more particularly, to a method of forming a capacitor in a semiconductor device using Chemical Vapor Deposition (CVD) TiN as a capacitor material.

In general, a capacitor of a conventional DRAM device uses a concave Silicon-Insulator-Silicon (SIS) capacitor using polysilicon as an electrode.However, the capacitance is reduced due to the reduction of the capacitor area and the increase in height due to the reduction in cell size. Is becoming difficult to introduce new dielectric materials with large dielectric constants. However, the introduction of such a new dielectric material has a problem of increasing leakage current, thereby changing the electrode into a metal electrode having a large work function.

1A to 1G show cross-sectional views for explaining a conventional SN forming process.

First, as shown in FIG. 1A, the SNC poly 18 etch and the SN etch preventing nitride film 16 are deposited.

Then, as shown in FIG. 1B, the first SN oxide film 20 and the second SN oxide film 22 are formed on the SN etch stop nitride film 16.

Next, as shown in FIG. 1C, after the hard mask poly 25 is deposited, the photoresist 24 is applied. Subsequently, an exposure process is performed on the applied photoresist 24 to form an elliptical SN.

Next, as shown in FIG. 1D, the SN hard mask poly 25 is patterned using the elliptically exposed photoresist 24, and then the photoresist 24 is removed.

Then, the first SN oxide film 20 and the second SN oxide film 22 are dry etched using the patterned SN hard mask poly 25 as a mask.

Next, as shown in FIG. 1F, the hard mask poly 25 is removed and a cleaning process is performed using BOE.

In this case, as shown in FIG. 1G, as the SN etch preventing nitride film 14 is etched, a loss occurs in the lower SNC spacer nitride film 16.

On the other hand, in order to form a cell as large as possible in the concave structure in order to overcome the problem that the size of the SN hole for forming the structure is limited to increase the height of the capacitor as shown in Figure 2 storage node contact (SNC; Storage) Storage Nodes (SN) are arranged in a zigzag form in a node contact, and SNs are formed in an elliptical shape.

In addition, in the formation of a MIM capacitor structure using a metal as an electrode, when TiCl 4 and TiN are used as electrodes, as shown in FIGS. 3A and 3B, the SNC spacer nitride layer is deeply etched to a depth of several hundred microseconds in the SN oxide layer etching process. Occurs.

In addition, as shown in FIGS. 4A and 4B, a cap due to an increase in leakage current due to a problem in which only about 70 to 80 mA is deposited or rarely deposited at a site where the SNC spacer nitride film is lost during subsequent TiCl4 TiN 300 kV deposition is performed. There is a problem that causes a poor leakage current. These cap leakage current failures must be controlled to less than 10 bits per die, and beyond that, repair is impossible and has a fatal effect on yield.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of forming a capacitor of a semiconductor device using Chemical Vapor Deposition (CVD) TiN as a capacitor material in order to solve the above problems.

In order to achieve the object of the present invention, forming an SN etch-resistant nitride film on the SNC plug poly-type semiconductor substrate, forming a first and a second SN oxide film on the SN etch-resistant nitride film, depositing a hard mask poly And then forming an elliptical photoresist, etching the hard mask poly using an elliptic photoresist, and dry etching the first and second SN oxide films using the patterned SN hard mask poly as a mask. And removing the hard mask poly and the SN etch preventing nitride film and then performing a cleaning process.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification.

Figure 5 is a graph for comparing the etching amount in the phosphoric acid solution, Figures 6a to 6g is a cross-sectional view for explaining the SN forming process according to a preferred embodiment of the present invention, Figures 7a to 7c is a preferred embodiment of the present invention SEM picture for explaining the results of the process progress.

First, as shown in FIG. 6A, the SNC poly 108 is etched and the SN etch preventing nitride film 104 is deposited. In this case, according to the preferred embodiment of the present invention, the SN etch preventing nitride film 104 is deposited to a thickness of about 700 to 900 kW in a furnace using N2, NH3, DCS gas at a temperature of about 650 to 760 ° C. do.

6B, the first SN oxide film 110 and the second SN oxide film 112 are formed on the SN etch stop nitride film 104.

Subsequently, as shown in FIG. 6C, the photoresist 116 is applied after the hard mask poly 114 is deposited. Subsequently, an exposure process for forming an elliptical SN is performed.

Next, as shown in FIG. 6D, the SN hard mask poly 114 is etched using the elliptically exposed photoresist 116 and then the photoresist 116 is removed. At this time, in accordance with a preferred embodiment of the present invention, the SN hard mask poly 114 is etched using HBr / Cl 2 / O 2 gas.

Then, as shown in FIG. 6E, the first SN oxide film 110 and the second SN oxide film 112 are dry etched using the patterned SN hard mask poly 114 as a mask. At this time, according to a preferred embodiment of the present invention, the first SN oxide layer 110 and the second SN oxide layer 112 are etched using C4F6 / O2 / CF4 gas.

Next, as shown in FIG. 6F, the hard mask poly 114 and the SN etch preventing nitride film 104 are removed, and then a cleaning process is performed using BOE. In this case, according to the preferred embodiment of the present invention, the removal process of the hard mask poly is performed using conventional C2F6 / Cl2 / HBr gas, and the etching prevention nitride film etching is not performed using CHF3 / O2 gas, respectively. The hard mask poly 114 and the SN etch preventing nitride film 104 are etched using the O 2 gas.

In this case, as shown in FIG. 6G, the etching amount of the hard mask poly 114 and the SN etching preventing nitride film 104 is small, indicating that the lower CD is small.

According to a preferred embodiment of the present invention by washing for about 3 minutes in a high temperature phosphoric acid solution of about 160 ~ 165 ℃ to extend the SN oxide film and the SN etching preventing nitride film as shown in Figure 7a.

As shown in FIGS. 7B and 7C, in the case of 3-minute cleaning with phosphoric acid, the portion of the SN etch preventing nitride film is widened, the SN lower CD is increased, and the loss of the SNC spacer nitride film is hardly generated. In addition, the portion of the first SN oxide film is also widened to maintain Cs equally.

According to a preferred embodiment of the present invention, the nitride film and the silicon oxide film in the phosphoric acid solution proceed by the following chemical reaction formula.

Nitride etch _{reaction: Si 3 N 4 + 4H 3} PO 4 + 12H 2 O↔3Si (OH) 4 + 4NH 4 · H 2 PO 4

Oxide etching reaction: SiO ₂ + 2H ₂ O↔Si (OH) ₄

In the phosphoric acid solution, the first SN oxide film, the second SN oxide film, and the SN etch preventing nitride film may be selectively etched, as shown in Table 1 and FIG. This is because the PSG / PETEOS / nitride etching selectivity is very large, with 63 GPa, PE-TEOS = 5 GPa, SN etching prevention nitride film = 144 GPa, and SNC spacer nitride film = 21 GPa.

PSG PETEOS SN etching prevention nitride film SNC spacer nitride film Etch Amount (Å / min)  21 yen  1.7 Å  48Å  7Å

The reason why the etching of the SNC spacer nitride film can be minimized while etching the SN nitride film in the phosphoric acid solution is because the thickness of the SNC spacer nitride film is about 150 to 250Å thin, so the viscosity of the phosphoric acid is large during the etching of the anti-etch nitride film. This is because the spacer nitride film cannot be etched.

Table 1 shows the etching per hour in phosphoric acid, and the graph of FIG. 5 shows the etching amount of each substance in the phosphoric acid solution over time.

According to a preferred embodiment of the present invention, the solution used in the cleaning process is characterized in that the washing proceeds for about 10sec ~ 10min as phosphoric acid of about 150 ~ 160 ℃.

In addition, the SN etching prevention nitride film is a low pressure (LP) furnace nitride film or a CVD PE (Plasma Enhanced) nitride film, the thickness of the SN etching prevention nitride film is characterized in that the thickness of about 400 to 1000Å.

Further, the first SN oxide film is formed of a PSG, BPSG or USG film, and the thickness of the first SN oxide film is 50% or less of the total SN oxide film thickness.

In addition, the second SN oxide film is formed of a TEOS film formed by a plasma CVD method, and the hard mask poly and SN nitride films are simultaneously etched using C2F6 / O2 gas.

In addition, the hard mask poly and SN nitride films are simultaneously etched using C2F6 / O2 gas, and the etching selectivity of the phosphoric acid solution in the subsequent phosphoric acid cleaning is 2 to 3 with respect to the SN etch stop film nitride / PSG, and the SNC spacer nitride film Silver furnace (furnace) LP nitride film is characterized in that the thickness of about 50 ~ 250Å.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of right.

According to a preferred embodiment of the present invention, in the case of adopting a structure in which the SN is zigzag-aligned and elliptical in the SNC in the MIM capacitor, the SN oxide film is used when TiCl 4 TiN is used as the electrode in forming the MIM capacitor structure using the metal electrode. In the etching process, the hard mask poly removal process and the etching prevention nitride film etching process are not performed, but the hard mask poly and SN etching prevention nitride films are simultaneously etched using C2F6 / O2 gas, and the high temperature (160 ~ 165 ° C) phosphoric acid solution is used. By performing the cleaning process, the SN oxide film portion is also widened, and the SN etching prevention nitride film portion is widened while the Cs is kept equal, thereby increasing the SN lower CD.

In addition, since the SNC spacer nitride film loss rarely occurs, there is an effect that the yield of the device can be increased by improving the cap leak defect caused by the TiN deposition failure during TiN deposition that occurs when the SNC spacer nitride film loss occurs.

Claims (10)

Forming an SN etch preventing nitride film on the semiconductor substrate on which the SNC plug poly is formed; Forming first and second SN oxide layers on the SN etch resistant nitride layer; Depositing a hard mask poly and then forming an elliptical photoresist; Etching the hard mask poly using the elliptical photoresist; Dry etching first and second SN oxide layers using the patterned SN hard mask poly as a mask; And Removing the hard mask poly and the SN etch preventing nitride film and then performing a cleaning process Capacitor forming method of a semiconductor device comprising a. The method of claim 1, The solution used in the cleaning step is a process for forming a capacitor of a semiconductor device, characterized in that the cleaning is carried out for a time of about 10sec ~ 10min as phosphoric acid of about 150 ~ 160 ℃. The method of claim 1, The SN etch preventing nitride film is a low pressure (LP) furnace nitride film or a CVD PE (Plasma Enhanced) nitride film. The method of claim 1, The thickness of the SN etching prevention nitride film is a capacitor forming method of a semiconductor device, characterized in that the thickness of about 400 ~ 1000Å. The method of claim 1, And the first SN oxide film is formed of a PSG, BPSG or USG film. The method of claim 5, And the thickness of the first SN oxide film is 50% or less of the total SN oxide film thickness. The method of claim 1, And the second SN oxide film is formed of a TEOS film formed by a plasma CVD method. The method of claim 1, And simultaneously etching the hard mask poly and SN nitride films using C2F6 / O2 gas. The method of claim 1, Forming the capacitor of the semiconductor device, wherein the hard mask poly and SN nitride films are simultaneously etched using C2F6 / O2 gas and the etching selectivity of the phosphate solution is 2 to 3 with respect to the SN etch stop film nitride film / PSG during subsequent phosphoric acid cleaning. Way. The method of claim 1, The SNC spacer nitride film is a method of forming a capacitor of the semiconductor device, characterized in that the use of the furnace (furnace) LP nitride film has a thickness of about 50 ~ 250Å.

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