KR20060065468A - Reference current generator operating - Google Patents

Abstract

An object of the present invention is to implement a circuit that applies two feedback loops, to have a structure that can operate at a low voltage, to have a high power supply rejection ratio (PSRR) characteristics to suppress power supply noise, and the conventional general It is to provide a low reference current generator having a structure that does not require a voltage-to-current converter appearing in the reference voltage generator.

 The present invention generates a first voltage by receiving a predetermined current, wherein the first voltage generates a first voltage unit and a second voltage whose voltage level decreases in response to a temperature, wherein the second voltage corresponds to a temperature. A second voltage generator for increasing a voltage level, a first current generator for generating a first current corresponding to the first voltage, a second current generator for generating a second current corresponding to the second voltage, and the first voltage generator; The present invention provides a reference current generator including a reference current generator configured to receive a first current and a second current to generate a reference current obtained by adding the first and second currents together.

Description

Reference Current Generator {REFERENCE CURRENT GENERATOR OPERATING}

1 is a circuit diagram illustrating a reference voltage generator according to the prior art.

2 is a circuit diagram showing a first embodiment of a reference current generator according to the present invention.

3 is a circuit diagram showing a second embodiment of the reference current generator according to the present invention.

4 is a circuit diagram illustrating an initial driving circuit employed in the reference current generator shown in FIG. 3.

FIG. 5 is a circuit diagram illustrating an example of each amplifier illustrated in FIGS. 2 and 3.

*** Explanation of Signs of Major Parts of Drawing ***

100: first current generator 200: second current generator

300: first reference voltage generator 400: third current generator

500: fourth current generator 600: second reference voltage generator

The present invention relates to a reference current generator, and more particularly, to a reference current generator for generating a reference current by combining current sources having different temperature characteristics into one node.

In the integrated circuit, the reference voltage and the reference current are not only used during the analog operation process such as the analog-to-digital converter, but also for the purpose of reducing the variation of the circuit from the change of the process, or for the stable operation of the circuit even in a wide temperature range. Is one of. In order to carry out this purpose it utilizes the voltage to the voltage V _T (Thermal voltage) generator of a representative of the conventional reference voltage generation method to be used to bias at a constant current diode (or only one junction of the transistor used).

1 is a circuit diagram illustrating a reference voltage generator according to the prior art. Referring to FIG. 1, the reference voltage generator generates a constant voltage level using a voltage generator 10 composed of a voltage source proportional to a temperature and a voltage source inversely proportional to temperature, and a voltage generated by the voltage generator 10. And a voltage output unit 30 connected to the voltage forming unit 20 and the voltage forming unit 20 to output a voltage corresponding to the voltage formed in the voltage forming unit 20.

The voltage generator 10 receives the first power source Vcc and the second power source Vss, and the first to fourth transistors T1 to T4 are disposed between the first power source Vcc and the second power source Vss. A first line connected in series and a second line connected in a mirror form between the first power supply and the second power supply, and having fifth to eighth transistors T5 to T8 connected in series. Form. The first line is connected through the second power supply Vss and the first bipolar junction transistor Q1, and the second line connects the second power supply Vss, the resistor R, and the second bipolar junction transistor Q2. Connected through. The first and second bipolar junction transistors Q1 and Q2 are diode connected. In addition, the first and second transistors T1 and T2 and the fifth and sixth transistors T5 and T6 are implemented with P MOS transistors, and the third and fourth transistors T3 and T4 and the seventh and eighth transistors. T7 and T8 are implemented with N MOS transistors.

Gates of the first and second transistors T1 and T2 are connected in the form of mirrors connected to gates of the fifth and sixth transistors T5 and T6, respectively, and gates of the third and fourth transistors T3 and T4 are connected to each other. The mirrors are connected to the gates of the seventh and eighth transistors T7 and T8, respectively. The third and fourth transistors T3 and T4 and the fifth and sixth transistors T5 and T6 are diode-connected.

When the fifth and sixth transistors T5 and T6 are turned on and current flows, the first and second transistors T1 and T2 are connected to the fifth and sixth transistors T5 and T6 in a mirror form, and thus the first And when the second transistors T1 and T2 have the same magnitude of current as those flowing through the fifth and sixth transistors T5 and T6, and the first and second transistors T1 and T2 are turned on to flow the current. The third and fourth transistors T3 and T4 are conducted so that currents having the same magnitude as those flowing through the third and fourth transistors T3 and T4 flow through the seventh and eighth transistors T7 and T8. Therefore, the first current I1 and the second current I2 having the same magnitudes flow through the mutual current radiation.

At this time, when the first current I1 flows through the first anode transistor Q1 to the second power supply Vss, the first cathode transistor Q1 has a first current (when the ambient temperature rises). The voltage formed by I1) is lowered.

When the second current I2 flows to the second power source Vss through the first resistor R11 and the second anode transistor Q2, a predetermined voltage is formed in the first resistor R11.

Looking at the voltage formed in the first resistor (R11), since the voltage level of the source of the fourth transistor (T4) and the eighth transistor (T8) is the same, the first bipolar junction transistor (Q1), the second bipolar junction transistor ( Q2) and the voltage applied to the first resistor R11 correspond to Equation 1 below according to Kirchhoff's voltage law.

 Here, Vq1 refers to the voltage formed on the first bipolar junction transistor Q1, Vq2 refers to the voltage formed on the second bipolar junction transistor Q2, and Vr11 refers to the voltage formed on the first resistor R11.

In addition, since the bipolar junction transistor is connected to the diode, the voltage formed on the bipolar junction transistor is a voltage corresponding to Equation 2 below.

Where Is is a constant constant as saturation current and Id corresponds to the current flowing through the bipolar junction transistor.

When Equation 2 is substituted into Equation 1 above, a voltage corresponding to Equation 3 below is formed in the first resistor R11.

Where V _R11 Is the voltage of the first resistor (R11) and V _T is the temperature voltage (Thermal Voltage, kT / q) has a voltage value proportional to the temperature, has a value of about 25.6 mV at room temperature. N represents the ratio of the size of the first bipolar junction transistor Q and the second bipolar junction transistor Q2.

Referring to Equation 3, the voltage applied to the first resistor R11 is controlled by the second current I2 by adjusting the ratio of the size of the first bipolar junction transistor Q1 and the second bipolar junction transistor Q2. The magnitude of the voltage of the first resistor R11 may be adjusted. However, as can be seen from Equation 3, the voltage of the first resistor R11 is constantly increased according to temperature, and thus increases as the temperature increases.

The voltage generator 20 includes a third line that receives the first power source Vcc and the second power source Vss and includes a ninth transistor T9 and a tenth transistor T10 connected in series. The third line is connected between the third bipolar junction transistor Q3 and the second resistor R12 between the tenth transistor T10 and the second power supply Vss. The third bipolar junction transistor Q3 is diode-connected. In addition, a first node N1 connected to the voltage output unit 30 is formed between the tenth transistor T10 and the diode.

The ninth and tenth transistors T9 and T10 are implemented as P MOS transistors, and the gates of the ninth and tenth transistors T9 and T10 are mirror-type connected to the gates of the fifth and sixth transistors T5 and T6, respectively. The third current I3 having the same magnitude as the current flowing through the fifth and sixth transistors T5 and T6 flows through the ninth and tenth transistors T9 and T10.

At this time, the third current I3 flows into the second power supply Vss through the third bipolar junction transistor Q3 diode-connected with the second resistor R12, and the second resistor R12 is in the second line. The voltage of the first resistor is copied, and the third bipolar junction transistor Q3 approximately copies the voltage applied to the first bipolar junction transistor Q1 on the first line.

Therefore, the voltage formed on the second resistor R12 is increased by the ambient temperature as shown in Equation 1 above, and the voltage formed on the third positive junction transistor Q3 is the first positive transistor Q1. As the voltage is lowered by the ambient temperature as described above, the voltage decreases and increases according to the ambient temperature, so that the voltage change due to the temperature can be reduced by offsetting each other.

The scheme configured as described above has been widely used and recognized as an efficient way to reduce the deviation of the reference voltage and the reference current source generated by the temperature and the process deviation in the integrated circuit. When the reference voltage of this type is designed such that the temperature characteristics of the general PN junction and the deviation of the temperature of V _T are offset each other, the result is a value of 1.26 V corresponding to the band gap of silicon, and thus the band gap reference. It is called a voltage reference.

On the other hand, in the integrated circuit device, the MOSFET device scaling is continuously reduced to improve the operation speed. Accordingly, the gate length of the MOSFET device reaches 130um. As a result, the characteristics of the device are greatly improved, and the power supply voltage drops to 1.2V, thereby reducing the power consumption. However, the supply voltage of 1.2V is smaller than the conventional reference voltage of 1.26V. In general, when the operating point margin of the transistor for outputting the reference voltage is considered, it is essential that the reference voltage falls below 1.0V. . However, the bandgap reference voltage, which is a conventional reference voltage generator, has a limited method of reducing such a voltage.

In addition, the reduction in operating power due to the scaling of the device has contributed to the reduction of the signal to signal ratio (SNR) of the signal in addition to reducing the reference voltage. Compared to the reduced operating signal width due to the decrease in the supply voltage, the noise was not significantly reduced, but the noise was increased due to the fast operation speed. Due to this effect, a larger noise source exists in the power supply line supplying the circuit, and as a result, the noise of the output of the reference power generator also increases.

Accordingly, the present invention was created to solve the problems of the prior art, and an object of the present invention is to implement a circuit in which two feedback loops are applied, so that a reference current generator can operate even at a low voltage, and power supply noise In order to suppress it, it has high PSRR (Power Supply Rejection Ratio) characteristic, and it is possible to simply form a voltage to provide a reference current generator having a structure that does not require a voltage-to-current converter, which appears in conventional reference current generators. It is.

In order to achieve the above object, the first aspect of the present invention provides a first voltage generator for generating a first voltage by receiving a predetermined current, wherein the first voltage generates a first voltage and a second voltage corresponding to a decrease in voltage level. A second voltage generator for generating a voltage level corresponding to a temperature, a first current generator for generating a first current corresponding to the first voltage, and a second current corresponding to the second voltage It is to provide a reference current generator including a second current generator for generating a and a reference current generator for receiving the first and second currents to generate a reference current sum of the first and second currents.

According to a second aspect of the present invention, a first current is generated by receiving a predetermined current to generate a first current, wherein the first current is generated by increasing a current amount corresponding to a temperature, and receives a predetermined current to generate a second current. The second current is to provide a reference current generator including a second current generator for reducing the amount of current corresponding to temperature and a reference current generator for generating a third current by adding the first current and the second current. .

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

2 is a circuit diagram illustrating the concept of a reference current generator according to the present invention. Referring to FIG. 2, the reference current generator includes a first current generator 100 which decreases current according to a temperature rise and a second current generator 200 which increases current according to a temperature rise. And generating a constant current by summing the currents formed by the second voltage generators 100 and 200, and generating a predetermined voltage by using the sum of the currents formed by the first and second current generators 100 and 200. The first reference voltage generator 300 is included.

The first current generator 100 includes a first diode D1, a current source ID, a first amplifier 131, and first and second transistors M1 and M2. When the forward current flows through the current source ID, the first diode D1 is formed with a predetermined voltage on the first diode D1 regardless of the constant current flowing through the first diode D1. At this time, the predetermined voltage formed in the first diode D1 changes in response to the temperature, and if the ambient temperature is high, the voltage level is lowered.

The first amplifier 131 receives two input voltages so that the voltage level of one output voltage is adjusted, and a first resistor (D1) is connected to one input and a predetermined current flows through the other input. R1) is connected. Therefore, the voltage formed by the first diode D1 is applied to one input and the voltage level of the first resistor R is applied to the other input. Therefore, the voltage formed by the first diode D1 is lowered as the temperature increases, so that the voltage level output from the first amplifier 131 is lowered. The first amplifier 131 is configured as an inverting amplifier to have a negative voltage level. As a result, the voltage added to the first resistor R1 by the feedback becomes equal to the voltage of the first diode D1.

Gates of the first transistor M1 and the second transistor M2 are connected to each other to form a mirror coupling. In addition, a current is connected to the output terminal of the first amplifier 131 so that a predetermined current flows in the first transistor M1 and the second transistor M2 according to the output voltage of the first amplifier 131. M2 flows a current corresponding to the ratio of the first transistor M1 to the second transistor M2. At this time, the current flowing through the first transistor M1 flows through the first resistor R1 of the first amplifier 131 so that a predetermined voltage is applied to the first amplifier 131. In addition, the amount of current flowing through the first transistor M1 and the second transistor M2 is determined according to the output voltage of the first amplifier 131, and the first amplifier 131 is controlled by the first diode D1. As is increased, the current flowing through the first transistor M1 by outputting a low voltage level decreases as the temperature increases. Therefore, the current flowing through the second transistor M2 also decreases as the temperature increases. The current flowing in the second transistor M2 flows to the second node N2.

The second current generator 200 includes a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a second amplifier 231, and a third amplifier 232. And a second resistor R2, a first bipolar junction transistor Q12, and a second bipolar junction transistor Q22. The third and fourth transistors M3 and M4 are coupled in a mirror form, and the gates of the third and fourth transistors M3 and M4 are connected to the output terminal of the second amplifier 231. Therefore, the current flowing through the third and fourth transistors M3 and M4 is determined according to the output voltage of the second amplifier 231. In addition, the first and second bipolar junction transistors Q12 and Q22 perform diode coupling.

The second amplifier 231 has an output terminal connected to the gates of the third and fourth transistors M3 and M4, and one input terminal of the second amplifier 231 and the first bipolar junction transistor Q12 are connected in parallel. The other input terminal is connected to the fourth transistor M4, the second resistor R2 and the second bipolar junction transistor Q22 connected in series. Accordingly, one input terminal receives a voltage formed in the second bipolar junction transistor Q12 by a current flowing in the third transistor M3, and the second resistor R2 and the second bipolar junction transistor The voltage formed in Q22) is received. At this time, the voltage formed on the second resistor R2 and the second bipolar junction transistor Q22 is a voltage corresponding to Equation 3, and the voltage level increases as the temperature increases.

The fifth and sixth transistors M5 and M6 are coupled to each other in a mirror form, and gates thereof are connected to each other. The gates of the fifth and sixth transistors M5 and M6 are connected to the output terminals of the third amplifier 232 and connected to the fifth and sixth transistors M5 and M6 according to the output voltage of the third amplifier 232. Flowing current flows and a ratio of the current flowing through the fifth transistor M5 and the current flowing through the sixth transistor M6 is determined according to the sizes of the fifth and sixth transistors M5 and M6. Since the third amplifier 232 is connected to the second resistor R2 at one input terminal and the voltage input to the third amplifier 232 increases in temperature, the third amplifier 232 is increased. The output voltage of increases as the voltage level increases. Therefore, the current flowing through the fifth transistor M5 becomes a larger current as the temperature increases, and therefore, the current flowing through the sixth transistor M6 also becomes a larger current as the temperature increases. The current flowing through the sixth transistor M6 is transferred to the second node N2 and summed with the current flowing through the second transistor M2.

At this time, the size of the current flowing through the second transistor M2 and the sixth transistor M6 by adjusting the size of the first and second transistors M1 and M2 and the size of the fifth and sixth transistors M5 and M6. The current summed at the second node N2 is adjusted to have a constant magnitude regardless of the change in the constant temperature.

The first reference voltage generator 300 uses a current flowing in the second node N2 as a current source using the current flowing in the second node N2 including the reference resistor Rref to generate a temperature. Supply constant voltage regardless of change of.

3 is a circuit diagram showing a second embodiment of the reference current generator according to the present invention. Referring to FIG. 3, the reference current generator includes a third current generator 400 for decreasing the current according to the temperature rise and a fourth current generator 500 for increasing the current according to the temperature rise. And forming a constant current by summing the currents formed by the fourth current generators 400 and 500, and generating a predetermined voltage by using the sum of the currents formed by the third and fourth current generators 400 and 500. And a second reference voltage generator 600.

The third current generator 400 may include first to sixth transistors M11 to M16, a first amplifier 431, a first bipolar junction transistor Q13, first and third resistors Ra and Rc, and a capacitor. (Cc), and the fourth current generator 500 includes seventh to twelfth transistors M21 to M26, first and second amplifiers 431 and 531, and second and third bipolar junction transistors Q23. And Q33) and a second resistor Rb.

The first and second transistors M11 and M12, the fifth transistor M15, the third and fourth transistors M13 and M14, the sixth transistor M16, the seventh and eighth transistors M21 and M22 The eleventh transistor M25, the ninth and tenth transistors M23 and M24, and the twelfth transistor M26 are coupled in a mirror form, respectively. The first to third bipolar junction transistors Q13 to Q33 perform diode coupling.

The first bipolar junction transistor Q13 is connected to the drain of the third transistor M13 through the first node N1 and the first resistor (the second node N2 is connected to the drain of the fourth transistor M4). Ra) is connected, and the second resistor Rb and the second bipolar junction transistor Q23 are connected in series to the drain of the ninth transistor M23 through the third node N3. The third bipolar junction transistor Q33 is connected to the drain through the fourth node N4.

The first amplifier 431 is connected to the gates of the first and second transistors M11 and M12 and the fifth transistor M15 at an output terminal, and the voltage of the first node N1 is transferred to one input terminal and the other The input terminal receives the voltage of the second node N2.

The second amplifier 531 has the gates of the seventh and eighth transistors M21 and M22 and the eleventh transistor M25 connected to the output terminal, and receives the voltage of the third node N3 at one input terminal and receives the voltage of the other node. The node receives the voltage of the fourth node N4.

The fifth transistor M15 is connected to the gates of the first and second transistors M11 and M12 to transmit a current corresponding to the current flowing in the second transistor M12 to the sixth transistor M16 and the sixth transistor ( M16 is connected to the gates of the third and fourth transistors M13 and M14 and is connected to the reference resistor through the fifth node N5.

The eleventh transistor M25 is connected to the gates of the seventh and eighth transistors M21 and M22 and transmits a current corresponding to the current flowing in the seventh transistor M21 to the twelfth transistor M26 and the twelfth transistor ( M26 is connected to the gates of the ninth and tenth transistors M23 and M24 and is connected to the reference resistor Rref through the fifth node N5.

And. Referring to the operation, first and second transistors M11 and M12 and fifth transistor M15 generate a predetermined current by the voltage delivered to the gate by the output terminal of the first amplifier 431, And the fourth transistors M13 and M14 and the sixth transistor M16 are brought into a conductive state by a voltage applied to the gate, and the currents formed in the first and second transistors M11 and M12 and the fifth transistor M15 are transferred to each other. Let it flow The current formed by the first transistor M11 is transmitted to the first bipolar junction transistor Q13, and the first bipolar junction transistor Q13 is coupled in a forward bias form to have a predetermined voltage level. At this time, the voltage level of the voltage formed on the first bipolar junction transistor Q13 is lowered when the ambient temperature is high.

Therefore, the voltage of the first node N1 decreases as the ambient temperature increases, and thus the first and second transistors M11 and M12 and the fifth transistor M5 have a small magnitude of current flowing when the ambient temperature increases. Lose. In addition, since the second node N2 becomes a voltage applied to the first resistor Ra by the current passing through the fourth transistor M14, the second node N2 is formed by the current generated by the output terminal of the first amplifier 431. The first amplifier 431 receives a predetermined voltage so that the first amplifier 431 adjusts the output voltage by the current flowing through the output terminal.

Accordingly, the fifth node N5 connected to the fifth and sixth transistors M15 and M16 receives a current that decreases as the temperature increases.

In addition, the seventh and eighth transistors M21 and M22 and the eleventh transistor M25 generate a predetermined current by the voltage delivered to the gate by the output terminal of the second amplifier 531, and the ninth and tenth transistors. The transistors M23 and M24 and the twelfth transistor M26 are brought into a conductive state by the voltage applied to the gate to allow currents formed in the seventh and eighth transistors M21 and M22 and the eleventh transistor M25 to flow. The current formed by the seventh transistor M21 is transferred to the third node N3 and the current formed by the eighth transistor M22 is transferred to the fourth node N4. At this time, when the voltage of the third node N3 is formed by the voltage corresponding to Equation 3 above and the ambient temperature increases, the voltage of the third node N3 becomes high. Accordingly, the voltage of the third node N3 input to the second amplifier 531 is increased, so that the seventh and eighth transistors M21 and M22 and the eleventh transistor M25 flow a larger current, thereby allowing the fifth node to flow. N5 receives a current in which the amount of current increases as the temperature rises.

Accordingly, the current flowing through the fifth node N5 is the sum of the current flowing through the fifth transistor M15 and the current flowing through the eleventh transistor M25 so that the current Iref regardless of the temperature flows. The current Iref flowing through the fifth node N5 is transferred to the reference resistor Rref, and a constant voltage is formed in the reference resistor Rref that does not change even with a change in temperature.

The third resistor Rc and the capacitor Cc are connected in series to the gates of the first and second transistors M11 and M12 and the fifth transistor M15. The resistor Ra generating current by the diode voltage is driven by a cascode current mirror circuit. This cascode current copy circuit is driven by a differential input single output amplifier. This high loop gain due to the amplifier and cascode current radiation adopts a structure that is compensated by the series connection of the third resistor Rc and the capacitor Cc since the stabilization is not guaranteed by the third resistor Rc. have. A high power supply rejection ratio (PSRR) is required to provide sufficient separation between the power and signal lines, as this requires high loop gain characteristics.

4 is a circuit diagram illustrating an initial driving circuit employed in the reference current generator shown in FIG. 3. Referring to FIG. 4, the initial driving circuit includes thirteenth to fifteenth transistors MS1 to MS3. The thirteenth transistor MS1 has a source connected to a first power source Vcc, a drain connected to a gate of a fourteenth transistor MS2, and a gate connected to a second power source Vss. A drain of the fourteenth transistor MS2 is connected to a predetermined terminal, a source thereof is connected to the second power supply Vss, and a gate thereof is connected to the drain of the thirteenth transistor MS1 and the source of the fifteenth transistor MS3. The drain of the fifteenth transistor MS3 is connected to the gate of the fourteenth transistor MS2, the source of the fifteenth transistor MS3, and the gate of the fifteenth transistor MS3 are connected to a predetermined terminal. The thirteenth transistor MS1 is implemented as a P MOS transistor and turned on by a low voltage, and the fourteenth and fifteenth transistors MS2 and MS3 are implemented as N MOS transistors and turned on by a high voltage. The second power source Vss represents ground.

Referring to the operation, first, the ratio of W / L (Width / Length) of the thirteenth transistor MS1 is reduced so that the thirteenth transistor MS1 has a large resistance value, and this resistance value of the fifteenth transistor MS3 is determined. If the resistance is smaller than the resistance in the off state, the drain of the thirteenth transistor MS1 is maintained at a high voltage. Accordingly, the voltage of the gate of the fourteenth transistor MS2 is gradually increased, and the fourteenth transistor MS2 is turned on. When the fourteenth transistor MS2 is turned on, the voltage of the drain of the fourteenth transistor MS2 becomes ground. At this time, the drain of the fourteenth transistor MS2 is connected to the gates of the first transistor M11 and the eighth transistor M22 of FIG. 3, respectively, and the voltages of the gates of the first transistor M11 and the eighth transistor M22 are respectively. By lowering the level, the first transistor M11 and the eighth transistor M22 flow a predetermined current, and a predetermined voltage is applied to the first node N1 and the fourth node N4 of FIG. 3 by the predetermined current. To be authorized. When the fifteenth transistor MS3 is turned on by the voltages of the first node N1 and the fourth node N4 of FIG. 3, the gate voltage of the fourteenth transistor MS2 is lowered again. In this way the initial drive is made.

Although the initial driving circuit shown in FIG. 4 has been described in connection with FIG. 3, the initial driving circuit shown in FIG. 4 may also be applied to the reference current generator shown in FIG. 2.

FIG. 5 is a circuit diagram illustrating an example of each amplifier illustrated in FIGS. 2 and 3.

While preferred embodiments of the present invention have been described using specific terms, such descriptions are for illustrative purposes only and it is understood that various changes and modifications may be made without departing from the spirit and scope of the following claims. You must lose.

According to the reference current generator according to the present invention, since the reference power is made by the current method, it is possible to generate a reference current that can be operated at a lower voltage, and adopts a structure that can suppress the noise present in the power supply line. According to the present invention, it provides a method to improve the nonlinear factor and it can be implemented in a simpler circuit.

Claims (15)

A first voltage generator configured to generate a first voltage by receiving a predetermined current, the first voltage having a reduced voltage level corresponding to a temperature; A second voltage generator configured to generate a second voltage, wherein the second voltage rises at a voltage level corresponding to a temperature; A first current generator configured to generate a first current corresponding to the first voltage; A second current generator configured to generate a second current corresponding to the second voltage; And And a reference current generator configured to receive the first and second currents and generate a reference current obtained by adding the first and second currents together. The method of claim 1, And the first voltage generator comprises a first diode in a forward bias state with the predetermined current. The method of claim 1, The first current generating unit includes a first amplifier receiving the first voltage and the third voltage and outputting a predetermined voltage, and a first transistor receiving the voltage output from the first amplifier and outputting the first current. And the first amplifier adjusts the magnitudes of the first voltage and the third voltage by the first current. The method according to any one of claims 1 to 3, The second voltage generator may include third and fourth transistors having a mirror type coupling; A second diode connected with the third transistor; A second resistor and a third diode connected in series with the fourth transistor; And And a second amplifier configured to adjust gate voltages of the third and fourth transistors to adjust the voltage of the second diode, the second resistor, and the voltage of the third diode. The method of claim 4, wherein The second current generator includes a third amplifier configured to receive the second voltage and the fourth voltage and output a predetermined voltage, and a fifth transistor configured to receive the output voltage of the third amplifier to generate the second current. And the third amplifier adjusts the second voltage and the fourth voltage by the second current. The method of claim 5, wherein The reference current generator includes a second transistor connected to the first transistor to copy the first current and a sixth transistor connected to the fifth transistor to copy the second current, and radiated from the fifth transistor. And a reference current generator which sums one first current and a second current radiated by the sixth transistor. A first current generator configured to receive a predetermined current to generate a first current, wherein the first current increases an amount of current corresponding to a temperature; A second current generator configured to receive a predetermined current to generate a second current, wherein the second current decreases in amount corresponding to a temperature; And And a reference current generator for generating a third current by adding the first current and the second current. The method of claim 7, wherein the first current generating unit First and second transistors that are mirror-coupled and generate current according to a predetermined voltage; Third and fourth transistors which are mirror-coupled and allow the current generated by the first and second transistors to flow in accordance with the predetermined voltage; A fifth transistor configured to mirror the first and second transistors so as to flow the first current corresponding to the current flowing by the first and second transistors; A sixth transistor that is mirrored with the third and fourth transistors and turned on together with the third and fourth transistors; A first diode connected to the third transistor to generate a predetermined voltage by the predetermined current flowing by the first transistor; A first resistor connected to the fourth transistor to flow a current flowing through the fourth transistor; And And a first amplifier configured to adjust voltages transmitted to the gates of the first and second transistors by adjusting the magnitudes of the voltages formed in the first voltage and the first resistor by the first current. The method of claim 8, The first current generator, the reference current generator is connected to the loop gain compensation circuit. The method of claim 9, The loop gain compensation circuit includes a third resistor and a capacitor in series and is connected to the gates of the first transistor and the second transistor. The method of claim 7, wherein the second current generating unit Seventh and eighth transistors which are mirror-coupled and generate current according to a predetermined voltage; Ninth and tenth transistors configured to be mirror-coupled and to flow current generated by the seventh and eighth transistors in accordance with a predetermined voltage; An eleventh transistor configured to be mirror-coupled with the seventh and eighth transistors so that a current corresponding to the current flowing by the seventh and eighth transistors flows; A twelfth transistor turned on like the ninth and tenth transistors in mirror coupling with the ninth and tenth transistors; A voltage generator connected to the ninth transistor and the tenth transistor to generate a voltage proportional to a temperature; An eleventh transistor configured to flow a current corresponding to a current flowing in the voltage generator; And And a twelfth transistor for conducting a current flowing through the eleventh transistor. The method of claim 11, The voltage generation unit The second resistor and the second diode connected in series with the current flowing through the ninth transistor is applied to the voltage of the third diode and the second resistor and the voltage of the second diode and the second resistor receiving the current flowing through the tenth transistor. A second amplifier receiving a voltage and applying a predetermined voltage to gates of the seventh and eighth transistors, The second amplifier is a reference current generator for regulating the voltage formed on the second resistor and the second diode and the voltage formed on the third diode. The method according to claim 8 or 11, wherein And an initial driving circuit for turning on the gates of the first and second transistors or the seventh and eighth transistors. The method of claim 13, The initial drive circuit, A thirteenth transistor connected to a predetermined voltage source, a drain connected to a sixth node, and a gate connected to ground; A fourteenth transistor having a source connected to the seventh node, a drain connected to the ground, and a gate connected to the sixth node; And A source includes a fifteenth transistor connected to said sixth node, a drain connected to ground, and a gate connected to an eighth node, The seventh node is connected to a gate of the first or seventh transistor and an eighth node is connected to the first node or the fourth node. The method of claim 7, wherein And a reference resistor connected to the reference current generator to generate a reference voltage.

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