KR20060027068A - Plasma display device and driving method thereof - Google Patents

Abstract

The present invention relates to a plasma display device for controlling address power consumption and a driving method thereof. It is determined whether the input image signal data is data having high address power consumption, and when it is determined that the address power consumption is high, the subfield having a low weight is removed. At this time, the period allocated to the removed subfield is used to increase the retention period of the remaining subfields except the removed subfield. As a result, the address power consumption can be further reduced, and the sustain period of the remaining subfields can be extended to improve luminance. That is, the luminance can be improved by using the period allocated to the subfield to be removed to increase the number of sustain discharge pulses allocated to the remaining subfields or to increase the width of the sustain discharge pulses.

PDP, address power consumption, subfield, sustain discharge pulse, luminance

Description

Plasma display device and driving method thereof {PLASMA DISPLAY DEVICE AND DRIVING METHOD THEREOF}

1 is a diagram showing image data at full white.

FIG. 2 is a switching waveform diagram of FIG. 1.

3 is a diagram illustrating dot pattern image data.

4 is a switching waveform diagram of FIG. 2.

5 is an electrode array diagram of a plasma display device according to an exemplary embodiment of the present invention.

6 is a schematic plan view of a plasma display panel according to an embodiment of the present invention.

7 is a schematic block diagram of a controller of a plasma display panel for reducing address power consumption according to an embodiment of the present invention.

8 is a block diagram showing an internal configuration of an address APC unit according to the first embodiment of the present invention.

9 is a diagram illustrating a gain value according to the address APC level of FIG. 9.

10 is a block diagram showing an internal configuration of an address APC unit according to a second embodiment of the present invention.

 11 is a block diagram schematically illustrating a control unit according to a second embodiment of the present invention.

12 is a view schematically showing a control unit according to a third embodiment of the present invention.

FIG. 13A shows the remaining subfields from which the corresponding subfields are removed when the subfields of the weight 1 and the weight 2 are turned off, and (b) shows the time allocated to the removed subfields in the retention period of the remaining subfields. (C) shows the case of increasing the width of the sustain discharge pulse in the reassigned sustain period, and (d) shows the case of increasing the number of sustain discharge pulses in the reassigned sustain period.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device for controlling address power consumption and a driving method thereof.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display have been actively developed. Among these flat panel display devices, the plasma display device has advantages of higher luminance and luminous efficiency and a wider viewing angle than other flat panel display devices. Therefore, the plasma display panel is in the spotlight as a display device to replace a conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

In the DC plasma display device, the electrode is exposed without the discharge space being insulated, so that the current flows in the discharge space while the voltage is applied, and there is a disadvantage in that a resistance for limiting the current must be made. On the other hand, in the AC plasma display device, since the electrode covers the dielectric layer, the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

Plasma display devices are flat display devices that display characters or images using plasma generated by gas discharge, and dozens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display device is classified into a direct current type and an alternating current type according to the shape of a driving voltage waveform to be applied and the structure of a discharge cell.

In general, the driving method of the AC plasma display device includes a reset period, an address period, and a sustain period.

The reset period is a period for initializing the state of each cell in order to smoothly perform an addressing operation on the cell. The address period is an address voltage for a cell (addressed cell) that is turned on to select a cell that is turned on and a cell that is not turned on. It is a period of time to perform the operation of accumulating wall charge by applying a. The sustain period is a period in which a discharge for actually displaying an image in the addressed cells by applying a sustain discharge pulse is performed.

Here, when each operation of each subfield is performed in the above manner, the discharge space between the scan electrode and the sustain electrode, the surface on which the address electrode is formed and the surface on which the scan and sustain electrode are formed act as a capacitive load. There is capacitance in the panel. Therefore, in order to apply the waveform for addressing, a lot of reactive power for charge injection that generates a predetermined voltage in capacitance other than power for address discharge is required. At this time, when the number of switching of the address electrodes is large, address power is consumed even more.

As described above, the address power is generated more due to the number of switching of the address electrode, which will be described in detail below.

1 is a diagram showing image data at full white.

Referring to FIG. 1, when full white, all data is 1, there is little data fluctuation of the address electrode, there is little pulse switching, and power consumption increases in proportion to the number of switching, so there is little charge / discharge reactive power. The driving waveform at this time is as shown in FIG. As shown in FIG. 2, in full white, only one switching is required for one column indicated by a thick solid line in FIG. 2.

By the way, the dot pattern image data is as follows.

3 is a diagram illustrating dot pattern image data.

Referring to FIG. 3, since data continuously changes from 1 to 0 and 0 to 1, a lot of switching occurs, and a driving waveform at this time is shown in FIG. 4.

As shown in FIG. 4, in the dot pattern, data variation of the address electrode is large, and pulse switching of the driving waveform occurs frequently, thereby increasing power consumption. In addition, not only the dot pattern image data but also the line image data in which the image pattern fluctuates for each line, the data fluctuates for each line, so the number of switching increases and the address consumption power increases.

As in the above process, as the difference between the pixels (cells) of all the lines and the pixels (cells) of the current line in the address data increases, switching occurs more frequently, which increases power consumption.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve the above-described problems of the related art, and to provide a plasma display device and an image processing method thereof for controlling address power consumption.

A driving method of a plasma display device according to a feature of the present invention for achieving the above object is

A driving method of a plasma display device in which an image of each frame is divided into a plurality of subfields in correspondence to an input video signal, and a gray level is displayed by combining luminance weights of the plurality of subfields. Determining whether the image signal data is data having high address power consumption; (b) removing the first subfield having a low weight if it is determined that the image signal data has a high address power consumption in the step (a); (c) reallocating the period allocated to the removed first subfield to increase the sustain period of the remaining subfields except the first subfield; And (d) driving the remaining subfields to which the sustain period is reassigned.

In the step (c), the sustain period of the remaining subfields is increased by increasing the number of sustain discharge pulses allocated to the remaining subfields. On the other hand, in the step (c), the sustain period of the remaining subfield is increased by increasing the width of the sustain discharge pulse applied to the sustain period of the remaining subfield.

Plasma display device according to another aspect of the present invention

A plasma panel including a plurality of first and second electrodes and a plurality of third electrodes formed to intersect the first and second electrodes; It is determined whether the image signal data of one frame to be input is data having high address power consumption, and when it is determined that the data has high address power consumption, the first subfield having a low weight is removed and allocated to the removed first subfield. A control unit for reassigning the period of time to increase the sustain period of the remaining subfields other than the first subfield to generate a control signal for driving only the remaining subfields; An address driver which applies a display data signal to the third electrode in response to a control signal generated from the controller; And a holding and scanning driver for driving the first and second electrodes in response to a control signal generated by the controller.

Here, the method of increasing the sustain period of the remaining subfields of the controller increases the number of sustain discharge pulses allocated to the remaining subfields. On the other hand, the method of increasing the sustain period of the remaining subfields of the control unit increases the width of the sustain discharge pulse applied to the remaining subfields.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

A plasma display device and an image processing method thereof according to an embodiment of the present invention will now be described in detail with reference to the drawings.

5 is a diagram illustrating an electrode arrangement diagram of a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 5, the electrodes of the plasma display device are arranged in a matrix of m × n. Specifically, the address electrodes A1-Am are arranged in the column direction and n rows of the scan electrodes in the row direction. Y1-Yn and sustain electrodes X1-Xn are arranged in a zigzag. In FIG. 5, a portion where the scan electrode, the sustain electrode, and the address electrode intersect forms one discharge cell 12.

6 is a schematic plan view of a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 6, a plasma display device according to an exemplary embodiment of the present invention includes a plasma panel 100, an address driver 200, a scan / hold driver 300, and a controller 400.

The plasma panel 100 includes a plurality of address electrodes A1-Am arranged in the column direction, and a plurality of scan electrodes Y1-Yn and sustain electrodes X1-Xn arranged in a zigzag pattern in the row direction. . The address driver 200 receives an address drive control signal from the controller 400 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am. The scan and sustain driver 300 receives a control signal from the controller 400 and alternately inputs a sustain discharge voltage to the scan electrodes Y1-Yn and the sustain electrodes X1-Xn to perform sustain discharge for the selected discharge cell. do.

The control unit 400 receives R, G, B image signals and a synchronization signal from the outside, divides one frame into several subfields, and divides each subfield into a reset period, an address period, and a sustain discharge period (sustain period). Drive the display device. At this time, the controller 400 supplies the necessary control signals to the address driver 200 and the sustain / scan driver 300 by adjusting the number of sustain discharge pulses in each sustain period of the subfield in one frame.

Hereinafter, the controller 400 of the plasma display device according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 7 to 9.

7 is a schematic block diagram of a controller of a plasma display device for reducing address power consumption according to a first embodiment of the present invention.

As shown in FIG. 7, the control unit 400 of the plasma display device according to the first embodiment of the present invention includes an inverse gamma correction unit 410, an error diffusion unit 420, an APC unit 430, and a sustain number generation unit. 440, the holding and scanning drive control section 450, the address APC section 460 and the address data generating section 470.

The inverse gamma correction unit 410 maps n-bit R, G, and B image input data, which is currently input image data, to an inverse gamma curve and corrects the m-bit (m≥n) image signal. In a typical plasma display device, n is 8 and m is 10 or 12.

In this case, the video signal input to the inverse gamma correction unit 410 is a digital signal. When an analog video signal is input to the plasma display device, the analog video signal may be converted into a digital video signal by an analog-to-digital converter (not shown). There is a need. The inverse gamma correction unit 410 may be a logic circuit for generating a lookup table (not shown) or data corresponding to an inverse gamma curve that stores data corresponding to an inverse gamma curve for mapping an image signal. (Not shown).

The error diffusion unit 420 is inversely gamma corrected by the inverse gamma correction unit 410 and error-diffuses the lower m-n bit image of the extended bit m image to surrounding pixels. Error diffusion is a method of displaying an image of a lower bit by separating an image of a lower bit to be diffused into adjacent pixels and a detailed description thereof is described in Korean Patent Laid-Open Publication No. 2002-0014766.

The APC unit 430 detects the load ratio using the image data output from the error diffusion unit 420, calculates the APC level according to the detected load ratio, and maintains the number of sustain discharge pulses corresponding to the calculated APC level (sustain pulse). Number) and the like.

The sustain number generator 440 allocates the number of sustain pulses (number of sustain discharge pulses) of each subfield by using the number of sustain pulses (number of sustain discharge pulses) transmitted from the APC unit 330.

The sustain / scan drive control unit 450 generates a control signal corresponding to the number of sustain (sustain) discharge pulses output from the sustain number generator 440 and outputs the control signal to the sustain / scan driver 300. In this case, although the sustain number generator 460 and the sustain and scan drive controller 480 have been described separately, the two may be simultaneously implemented in one block.

The address APC unit 460 (that is, the address automatic power control unit) determines whether the data of one frame is data that consumes a lot of address power consumption from the output data of the inverse gamma correction unit 410, and thus the address power consumption is increased. In the case of a lot of consumption, that is, in the case of the dot pattern as shown in FIG. 3, in order to control the power consumption, turn on or off both the data gain value and the address data value of the lowest subfield to reset the address data. A control signal (address APC flag) is outputted to the address data generation unit 470. At this time, the address APC unit 460 even determines whether the data of one frame consumes a lot of address power or data (refers to the difference between the gray level of the previous cell and the gray level of adjacent cells in the column direction in the address electrodes of the same column). Can be determined based on whether or not each subfield data is on / off (the difference between the subfield data of the previous cell and the subfield data of the adjacent cell in the column direction at the address electrodes of the same column). Find out.

8 is a block diagram showing an internal configuration of the address APC unit 460 according to the first embodiment of the present invention.

As shown in Fig. 8, the address APC section 460 according to the first embodiment of the present invention includes a line memory section 461, a sum totaling section 462, a gain storing section 463, and a gain determining section 464. And a mode determination unit 465.

Even the sum of the address APC unit 460 adder 462 obtains even the system by comparing the gray level value of the previous line stored in the line memory unit 461 with the gray level value of the currently input line in the same column direction. Add up. That is, the sum of even the system of each line in one frame is obtained by the following equation (1).

Here, P denotes a gray scale value of a pixel, i denotes a line, j denotes a column, and Equation 1 denotes even a system of pixels between each line of image data having N lines and M columns. Represents the sum. Equation 1 may be modified in various ways, may be modified to calculate in a line unit, or may be modified to obtain a sum of all at once.

 Even the sum adding unit 462 obtains the sum of the even system between the lines in the same manner as in Equation 1 above, and outputs the sum to the gain determining unit 464.

Then, the gain determination unit 464 determines the automatic power control (APC) level corresponding to the sum S of the system, and refers to the end gain corresponding to the APC level by referring to the lookup table of the gain storage unit 463. Determine and output At this time, a value corresponding to the APC level is shown in FIG. 9, but this is not exemplary and it is apparent to those skilled in the art that the value may be changed.

Here, the gain value is inversely proportional to the sum of the gradation differences (Sum), and is between 0 and 1. A large sum of the differences means a large difference in data (gradation) between pixels, which increases power consumption, so the data difference between pixels should be reduced by multiplying the gain value.

If the sum Sum of the differences is zero, the gain value is 1, and as the sum Sum of the differences increases, the gain value becomes smaller. This gain value can be set through experimentation and stored in the form of lookup table. Such a gain value may be changed in a range that does not deform the original video signal as needed, and may be designed to be one or more.

On the other hand, the mode determining unit 465 uses the sum of the values of the lines between the lines obtained by the adder 462 to equalize the data values of the least significant bits of the address data. It is determined whether to output the address APC flag signal. In this case, the LSB data value refers to the data value of the subfield having the lowest weight only when the input video signal is converted into the address data. That is, when the sum of gray level difference values between the lines is equal to or greater than a predetermined threshold value, it is determined that the address power consumption is consumed a lot, and the address APC flag signal is output. Since this is judged to be less consumed, the address APC flag signal is not output. At this time, the threshold value is stored based on the experimental data, even in the case of a large amount of address power consumption is stored in the sum value. Here, even the value between the lines is determined to be equal to or greater than the threshold value, so that the mode determining unit 465 makes the LSB data value of the address data the same (on or off at the same time). In the case of outputting the LB bit, the data value of the LSB bit is equally set at the rear end. Therefore, when the LSB bit is displayed on the plasma panel, the switching is reduced, thereby reducing the power consumption.

The address data generator 470 outputs correction data by multiplying a data gain value output from the address APC unit 460 by an image signal, generates subfield data corresponding to the correction data, and displays the subfield data in a plasma display. By rearranging the data to address data for driving the apparatus, an address control signal for controlling the address driver 200 is generated and output to the address driver 200.

At this time, when the address APC flag signal is input from the mode determining unit 465 of the address data generating unit 460, the corrected data is recalibrated so that the LSB bits are the same (that is, the same is turned on or off). After generating the subfield data or generating the data corrected by the product of the gain values as the subfield data, the data of the lowest subfield corresponding to the LSB bit is the same (that is, the same on or off). do.

Thus, address power consumption can be further reduced by multiplying the gain value and simultaneously controlling the address power consumption by simultaneously turning on / off the LSB bit.

In this case, in general, even a lot of line-based systems consume a lot of power, and as in the first embodiment of the present invention, the address APC unit 460 consumes a lot of address power by even a line-based system. Although it is determined whether the data is data, the address power consumption is not an accurate determination because it is directly related to the address data, that is, the subfield data. Therefore, a method of determining whether the address power consumption is large or small through the subfield data will be described below.

10 is a block diagram showing an internal configuration of the address APC unit 460 according to the second embodiment of the present invention.

As shown in Fig. 10, the address APC section 460 according to the second embodiment of the present invention includes a line memory section 461, a subfield data difference summing section 466, a gain storage section 463, and a gain determining section 464. ) And a mode determination unit 465. In this case, the address APC unit 460 according to the second embodiment of the present invention includes the subfield data difference adding unit 466 instead of the adding unit 462 even in the first embodiment. Since it is substantially the same as the first embodiment, description of overlapping portions will be omitted below.

The subfield data difference adding unit 466 uses the signal converted into on / off data for each subfield, that is, the vertical lines adjacent to each other in the column direction using the data converted into subfield data (that is, the row line). The difference between the subfield data). At this time, it is preferable that a data processing unit (not shown in Fig. 10) is located at the front end of the subfield data difference adding unit 466. That is, the data processor converts the input image signal into on / off data for each subfield. In order to express 256 gray scales in a plasma display panel, one frame is divided into eight subfields (1SF to 8SF) having a weight of 1, 2, 4, 8, 16, 32, 64, and 128, respectively. Assuming that the data processing unit 410 converts the image signal of gradation 100 into 8-bit data of "00100110", for example. In the "00100110", the numbers '0' and '1' correspond to eight subfields (1SF to 8SF) in sequence, and '0' indicates that the discharge cells (dots) do not discharge (off) in the corresponding subfields. '1' indicates that the discharge cell discharges (on) in the corresponding subfield.

The subfield data difference adding unit 466 sums the difference between subfield data values of adjacent up and down lines (meaning a row line) from the image signal converted by the day processing unit 410 into on / off data for each subfield, The values for each summed subfield are summed for all subfields in one frame. The change in the switching state that generates a large amount of address power consumption occurs when one of the two discharge cells adjacent to each other in the column direction (vertical direction in FIG. 3) is on and the other discharge cell is off, so the subfield data difference is summed. The unit 466 may calculate a sum of the difference between the on / off data of two discharge cells adjacent in the column direction as a subfield, as shown in Equation (2).

Here, R _ij , G _ij , and B _ij are on / off data of R (red), G (green), and B (blue) discharge cells of i rows and j columns, respectively. At this time, the subfield data difference adding unit 466 obtains the value of each subfield by using Equation 2, and adds the values of each subfield to all subfields forming one frame. In this case, Equation 2 represents the sum of the subfield data differences for each subfield. As shown in Equation 2, the sum of the subfield data differences for each subfield may be used to determine whether the address power consumption is large or small. The sum of the values obtained as shown in Equation 2 for the subfield may determine whether the address consumption power is large or small.

In general, since the image signals are serially inputted in a row order, a line memory 461 is included as shown in FIG. 11 to store one row of image signals in order to calculate a difference between on / off data of two adjacent discharge cells. When on / off data for each subfield of a row (line) video signal is input through the line memory unit 461, the subfield data difference adder 466 stores the data sequentially. The difference of on / off data is calculated for each subfield in two adjacent discharge cells by reading the data of the previous row (line) stored in. In addition, the address power consumption determiner 420 may calculate a difference between on / off data for each subfield in two discharge cells by using an exclusive OR (XOR) operation of the on / off data.

The gain determination unit 464 then determines an automatic power control (APC) level (step) corresponding to the sum of the on / off differences between the lines of the mode subfield (or each subfield) of one frame, and the APC level. The end gain corresponding to is determined and output by referring to the lookup table of the gain storage unit 463 as in the first embodiment of the present invention.

If the value determined by the subfield data difference adding unit 466 is greater than or equal to the threshold value, the mode determining unit 465 generates an address APC flag signal and outputs the address APC flag signal. It is determined that the address power consumption is low, and no address APC flag signal is generated. At this time, the threshold value is obtained by storing the value corresponding to the sum of the subfield data difference between the lines in the case where a lot of address power consumption occurs based on experimental data. At this time, as described above, as shown in Equation 2, the mode determining unit 465 may determine whether the address APC flag signal is generated through the sum of the on / off difference of the subfield data for each subfield.

The address data generator 470 outputs correction data by multiplying a data gain value output from the address APC unit 460 by an image signal, generates subfield data corresponding to the correction data, and displays the subfield data in a plasma display. By rearranging the data to address data for driving the apparatus, an address control signal for controlling the address driver 200 is generated and output to the address driver 200. At this time, when the address APC flag signal is input from the mode determining unit 465 of the address data generating unit 460, the corrected data is recalibrated so that the LSB bits are the same (that is, the same is turned on or off). When the field data is generated or the correction data is generated as the subfield data, the data of the subfield having the lowest weight corresponding to the LSB bit is the same (that is, the same is turned on or off).

In this case, the address APC unit 460 may include a data processor (not shown in FIG. 11) for converting the input image signal into subfield data. Using the generated subfield data, the sum of subfield data differences may be obtained as shown in Equation 2.

Here, although the address APC unit 460 according to the first and second embodiments of the present invention shown in Figs. 9 and 11 is shown in a different block from the address data generating unit 460, it is included in the same block and implemented as one block. It will be apparent to one skilled in the art.

In this case, in the first and second embodiments of the present invention, the value of the input image signal data is changed using the gain determiner 464, but only the mode determiner 465 is excluded except the gain determiner 464. The power consumption can be reduced by controlling the LSB bits to be the same.

In addition, the address APC unit 460 according to the first and second embodiments may determine whether power consumption is large or small as described above using the output data of the inverse gamma correction unit 410, but the error diffusion unit ( Using the output signal of 420, it is possible to determine the magnitude of power consumption.

In addition, when the mode determining unit 465 determines that the power consumption is high as in the first and second embodiments of the present invention, the address data generator 470 uses the LSB bit (ie, the lowest weight subfield). Although only the data) is the same, the lower few bits can be made the same so as not to affect the gradation.

Here, in the control unit 400 according to the first embodiment of the present invention described above, in order to reduce the address power consumption, the LSB bits (or the lower few bits) are the same and all the LSB bits are turned off. It is not necessary to allocate the period of the subfield corresponding to the bit. During the driving of the plasma display device, in the reset period, the state of wall charge is set up, the cell to be selected is selected in the address period, and between the scan electrodes Y1-Yn and the sustain electrodes X1-Xn in the sustain period. Alternately, sustain discharge pulses are applied to sustain discharge only in selected cells in the address period to display gray scales. Therefore, when all the subfields corresponding to the LSB bit (or a few lower bits including the LSB bit) are reduced, as in the controller 400 according to the first embodiment of the present invention, the corresponding subfield is turned off. The gray level can be expressed without assigning the reset period, the address period, and the sustain period of the field (subfield to be off). That is, the LSB subfield (or some lower bits including the LSB subfield) may be removed.

The time allocated to the subfields thus removed can be allocated to increase the number of sustain discharge pulses in the subfields affecting the discharge, thereby improving the luminance. Further, the time allocated to the subfield to be removed can be allocated to increase the pulse width of the sustain discharge pulse of the subfield affecting the discharge, thereby improving the luminance. Hereinafter, a method of reallocating the time allocated to the subfield to be removed to the sustain period of the remaining subfields in order to improve luminance will be described in detail with reference to FIGS. 11 to 13.

 FIG. 11 is a block diagram schematically illustrating a controller 400 ′ according to a second embodiment of the present invention, and FIG. 12 is a diagram schematically illustrating a controller 400 ″ according to a third embodiment of the present invention. . FIG. 13 is a diagram showing sustain discharge pulses of the sustain period and the sustain period when the time allocated to the subfield to be removed is reassigned to the sustain period of the remaining subfields as in the control unit of the second or third embodiment of the present invention. (A) indicates the remaining subfields (3SF, 4SF, ..NSF) from which the subfields are removed when the subfields of the weight 1 and the weight 2 (1SF, 2SF) are turned off, and (b) indicates the removed subfield. The time allocated to (1SF, 2SF) is reassigned to the sustain period of the remaining subfields (3SF, 4SF, ... NSF), and (c) increases the width of the sustain discharge pulse in the reassigned sustain period. (D) is a diagram showing a case where the number of sustain discharge pulses is increased in the reassigned sustain period.

First, a method of using the time allocated to the subfield to be removed to increase the number of sustain discharge pulses in the sustain period of the remaining subfields will be described with reference to FIGS. 11 and 13.

As shown in FIG. 11, the control unit 400 ′ according to the second exemplary embodiment of the present invention except that the address APC flag signal output from the address APC unit 460 is also transmitted to the sustain number generator 440 ′. The same configuration as that of the controller 400 according to the first embodiment of the present invention will be omitted. The address APC flag signal output from the address APC unit 460 described with reference to FIGS. 8 and 10 is transmitted not only to the address data generator 470 but also to the sustain number generator 440 '. At this time, when the sustain number generator 440 'receives the address APC flag signal (that is, when the low-weight subfield (LSB bit or some lower bits including the LSB bit) is turned off), the weight is increased. The number of sustain discharge pulses allocated to the remaining subfields other than the low subfield is allocated to more sustain discharge pulses than the sustain discharge pulses assigned to the predetermined load ratio, and includes low-weight subfields (eg, LSB bits or LSB bits). The number of sustain discharge pulses allocated to some lower bits) is zero. That is, the weight 1 subfield SF1 and the weight 2 subfield SF2, which are the low weight subfields as shown in FIG. 13A, are removed, and a period allocated to the removed subfield is shown in FIG. 13B. As shown in (d) of FIG. 13, the number of sustain discharge pulses of the remaining subfields is further increased.

On the other hand, the address data generator 470 removes the address data allocated to the low-weight subfield to remove the low-weight subfield (for example, some low bits including the LSB bit or the LSB bit).

The sustain and scan drive control unit 450 is configured to apply the number of sustain discharge pulses (number of sustain discharge pulses reassigned to the remaining subfields SF3, SF4, ... SFN) output from the sustain number generator 440 '. Generates a control signal and outputs it to the sustain / scan driver 300.

When the low-weight subfield is removed, the time allocated to the removed subfield is used to increase the number of sustain discharge pulses of the remaining subfields, so that the sustain discharges assigned to the subfields used in the gray scale representation (ie, the remaining subfields). The number of pulses increases, so that the brightness is improved.

 Next, a method of using the time allotted to the subfield to be removed to increase the width of the sustain discharge pulse of the sustain period of the remaining subfields will be described with reference to FIGS. 12 and 13.

As shown in FIG. 12, the control unit 400 ′ according to the third embodiment of the present invention indicates that the address APC flag signal output from the address APC unit 460 is also transmitted to the holding and scanning driving control unit 450 ″. Except for the following, the same configuration as the control unit 400 according to the first embodiment of the present invention will be omitted. The address APC flag signal output from the address APC unit 460 described with reference to FIGS. 8 and 10 is transmitted to not only the address data generating unit 470 but also the holding and scanning driving control unit 450 ″. At this time, the maintenance / scanning drive control unit 450 ″ receives the address APC flag signal (that is, turns off the low-weight subfield (LSB bit or some lower bit including the LSB bit)). Is controlled to increase the width of the sustain discharge pulses allocated to the remaining subfields except for the low subfield. In the low-weight subfields (for example, the LSB bit or some lower bits including the LSB bit), the sustain discharge pulse is Control not to apply. That is, the weight 1 subfield SF1 and the weight 2 subfield SF2 which are the low weight subfields as shown in FIG. 13A are removed, and the period of the removed subfield is shown in FIG. 13B. It is used to increase the sustain period of the remaining subfields (3SF, 4SF, ... NSF), thereby increasing the width of the sustain discharge pulse of the remaining subfields as shown in FIG. Here, the number of sustain discharge pulses allocated to the remaining subfields 3SF, 4SF, ... NSF is maintained.

On the other hand, the address data generator 470 removes the address data allocated to the low-weight subfield to remove the low-weight subfield (for example, some low bits including the LSB bit or the LSB bit).

In this case, when the low-weight subfield is removed, the time allotted to the removed subfield is used to increase the sustain discharge pulse width of the remaining subfields, so that the sustain discharge applied to the subfield (ie, the remaining subfields) used for gray scale expression. The light of the sustain discharge generated by the pulses becomes larger and the luminance is improved.

 Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, according to the present invention, the presence or absence of address power consumption is determined by using the difference between the line-based system or the line-by-line subfield data value, and has a minimum weight according to the determined power consumption. By controlling the data of the subfields to be the same, the address power consumption can be improved in duplicate.

In addition, when all of the subfields with low weights are turned off, the corresponding subfields are removed, and the period of the subfields to be removed is reassigned to the sustain period of the remaining subfields, thereby improving luminance. That is, the luminance can be improved by using the period allocated to the subfield to be removed to increase the number of sustain discharge pulses allocated to the remaining subfields or to increase the width of the sustain discharge pulses.

Claims (11)

A driving method of a plasma display device which divides an image of each frame into a plurality of subfields in correspondence to an input video signal, and displays gray levels by combining luminance weights of the plurality of subfields. (a) determining whether image data of one frame to be input is data having high address power consumption; (b) removing the first subfield having a low weight if it is determined that the image signal data has a high address power consumption in the step (a); (c) reallocating the period allocated to the removed first subfield to increase the sustain period of the remaining subfields except the first subfield; And (d) driving the remaining subfields to which the sustain period is reassigned. The method of claim 1, In the step (c), increasing the number of sustain discharge pulses allocated to the remaining subfields to increase the sustain period of the remaining subfields. The method of claim 1, In the step (c), increasing the width of the sustain discharge pulse applied to the sustain period of the remaining subfields to increase the sustain period of the remaining subfields. The method according to any one of claims 1 to 3, And determining whether or not the address power consumption is high by using the system of adjacent upper and lower lines of the same column among the image signal data of one frame in the step (a).  The method according to any one of claims 1 to 3, And determining whether the address power consumption is high by using subfield data of adjacent upper and lower lines of the same column among the image signal data of one frame in the step (a). The method according to any one of claims 1 to 3, And the first subfield includes a subfield having a lowest weight and a subfield having a weight adjacent to the subfield having the lowest weight. A plasma panel including a plurality of first and second electrodes and a plurality of third electrodes formed to intersect the first and second electrodes; It is determined whether the image signal data of one frame to be input is data having high address power consumption, and when it is determined that the data has high address power consumption, the first subfield having a low weight is removed and allocated to the removed first subfield. A control unit for reassigning the period of time to increase the sustain period of the remaining subfields other than the first subfield to generate a control signal for driving only the remaining subfields; An address driver which applies a display data signal to the third electrode in response to a control signal generated from the controller; And And a holding and scanning driver for driving the first and second electrodes in response to a control signal generated by the controller. The method of claim 7, wherein The method of increasing the sustain period of the remaining subfields of the control unit includes increasing the number of sustain discharge pulses allocated to the remaining subfields. The method of claim 7, wherein The method of increasing the sustain period of the remaining subfields of the control unit includes increasing the width of the sustain discharge pulse applied to the remaining subfields. The method according to any one of claims 7 to 9, And the control unit determines whether or not the address power consumption is high by using a system of adjacent upper and lower lines of the same column among image signal data of one frame. The method according to any one of claims 7 to 9, And the control unit determines whether or not the address power consumption is high by using a system of adjacent upper and lower lines of the same column among image signal data of one frame.

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