KR20060020411A - Image sensor capable of measuring capacitance and leakage current and measuring method of the same - Google Patents

Abstract

The present invention provides an image sensor capable of measuring the capacitance and leakage current of the floating diffusion region more accurately, and a method for measuring the capacitance and leakage current of the floating diffusion region of the image sensor. A pixel array provided on the substrate for substantial device driving, including a pinned photodiode having a stacked structure of region / P type substrate; And a plurality of test pinned photodiodes, reset transistors, transfer transistors, and floating diffusion regions having a structure in which a P0 region / n-region / P type substrate is stacked on the same substrate together with the pixel array. A test pixel array having a unit pixel for the test pixel array, wherein the test pixel array includes a first pad commonly connected to the floating diffusion regions of the plurality of test unit pixels, and a P-type substrate of the test unit pixel. An image sensor comprising a second pad connected thereto.

In addition, the present invention provides a method for measuring capacitance in a floating diffusion region of an image sensor having the above structure, the method comprising: turning off the transfer transistor and the reset transistor; And applying a predetermined voltage to the first pad and grounding the second pad, and then adjusting the voltage applied to the first pad to measure capacitance and leakage current between both ends of the first pad and the second pad. Making; And calculating capacitance and leakage current of the floating diffusion region of the test unit pixel by dividing the measured capacitance and leakage current by the number of test unit pixels.

Pinned photodiodes, test patterns, capacitances, pads, floating diffusions, pixel arrays, photodiodes, leakage currents.

Description

Image sensor capable of measuring capacitance and leakage current and its capacitance measurement method IMAGE SENSOR CAPABLE OF MEASURING CAPACITANCE AND LEAKAGE CURRENT AND MEASURING METHOD OF THE SAME}             

1 is a circuit diagram showing a unit pixel of a CMOS image sensor composed of four transistors.

2 is a circuit diagram illustrating a test unit pixel for measuring capacitance and leakage current of a floating diffusion region according to an exemplary embodiment of the present invention.

3 is a plan view illustrating an image sensor having a test pattern for measuring capacitance and leakage current of a floating diffusion region according to an embodiment of the present invention;

4 is a cross-sectional view taken along the line a-a 'of FIG. 3.

5 is a cross-sectional view taken along the line b-b 'of FIG. 3;

FIG. 6 is a cross-sectional view taken along the direction CC ′ of FIG. 3.

Explanation of symbols on the main parts of the drawings

PD: Photodiode FD: Floating Diffusion Area

Tx: transfer transistor Rx: reset transistor

The present invention relates to an image sensor, and more particularly, to an image sensor and a method of measuring capacitance and leakage current of a floating diffusion region of an image sensor capable of more accurately measuring capacitance and leakage current of a floating diffusion region.

An image sensor is a semiconductor device that converts an optical image into an electrical signal. Charge coupled devices (CCDs) and CMOS (Complementary MOS (CMOS)) images are typical examples of image sensors.

A CCD is a device in which charge carriers are stored and transported in capacitors while individual metal-oxide-silicon (MOS) capacitors are in close proximity to each other, and a CMOS image sensor is a control circuit and a signal processing circuit. ) Is a device that adopts a switching method that makes MOS transistors by the number of pixels by using CMOS technology using peripheral circuits, and sequentially detects the output using them.

1 is a circuit diagram illustrating a unit pixel of a CMOS image sensor including four transistors.

Here, a submicron CMOS epi process is applied to increase the sensitivity and reduce the cross talk effect between unit pixels.

Referring to FIG. 1, a unit pixel of a CMOS image sensor includes a photodiode (hereinafter referred to as PD) that receives an optical signal and generates and stores a photocharge, and a floating diffusion region (hereinafter referred to as FD) that senses charge generated at the PD. A transfer transistor (hereinafter referred to as Tx) that transfers the charge generated in the PD by the on / off operation to the FD, and a reset transistor for resetting the FD to the power supply voltage level 'VDD'. A reset transistor (Rx), a drive transistor (Dx) for outputting a signal of the PD using the signal of the FD as a gate input, and a select transistor for selectively outputting from the Dx by a select signal (Select transistor; hereinafter referred to as Sx).

The signal output from the unit pixel is driven by the output transistor Out controlled by the bias signal Vb.

An operation principle of obtaining an output from a unit pixel having the above structure is as follows.

First, turn off Tx, Rx, and Sx. The PD is in a fully depletion state and collects (ie, condenses) photogenerated charges in the PD.

After the proper integration time, turn on Rx to reset FD first, then turn on Sx to read the output of the unit pixel.Dx, the source follower buffer, is the source follower buffer. Measure the output voltage of V1. This value simply means the CD level shift of the FD.

Then, Tx is turned on, at which time all photocharges concentrated on the PD are transported to the FD.                         

Next, Tx is turned off and the output voltage V2 of Dx is measured.

The output signal is the result of the photocharge transport resulting from the difference between the output voltages V1 and V2, which is a pure signal value without noise. This method is called CDS (Corelated Double Sampling).

Then, the above process is repeated.

The floating diffusion region of the image sensor receives and senses photo-generated charge generated by the photodiode according to the turn-on operation of the transfer transistor, or is charged according to the turn-on operation of the reset transistor.

If the capacitance of the floating diffusion region is insufficient, the sensing ability is degraded and the image quality of the image sensor is degraded. If the capacitance of the floating diffusion region is excessive, the dynamic range is reduced, so the capacitance and leakage current of the floating diffusion region are reduced. Accurate measurement of current is essential for improving the characteristics of the image sensor.

In the conventional case, different test patterns were used to measure capacitance and leakage current in a floating diffusion region. Since the leakage current and capacitance of the floating diffusion region are closely related to each other, accurate measurements cannot be made when they are measured using different test patterns.

The present invention proposed to solve the above problems of the prior art provides an image sensor and a capacitance and leakage current measuring method of the floating diffusion region of the image sensor and the image sensor capable of more accurately measuring the capacitance and leakage current of the floating diffusion region. Its purpose is to.

In order to achieve the above object, the present invention provides a pixel array including a pinned photodiode having a structure in which a P0 region / n-region / P type substrate is stacked; And a plurality of test pinned photodiodes, reset transistors, transfer transistors, and floating diffusion regions having a structure in which a P0 region / n-region / P type substrate is stacked on the same substrate together with the pixel array. A test pixel array having a unit pixel for the test pixel array, wherein the test pixel array includes a first pad commonly connected to the floating diffusion regions of the plurality of test unit pixels, and a P-type substrate of the test unit pixel. An image sensor comprising a second pad connected thereto.

The present invention also provides a method for measuring capacitance in a floating diffusion region of an image sensor having the above structure, comprising: turning off the transfer transistor and the reset transistor; And applying a predetermined voltage to the first pad and grounding the second pad, and then adjusting the voltage applied to the first pad to measure capacitance and leakage current between both ends of the first pad and the second pad. Making; And calculating the capacitance and the leakage current of the floating diffusion region of the test unit pixel by dividing the measured capacitance and the leakage current by the number of test unit pixels.

The present invention measures using the same type of pattern of capacitance and leakage current in the floating diffusion region.

To this end, a plurality of test unit pixels including a transfer transistor, a reset transistor, a photodiode, and a floating diffusion region are implemented to be integrated with a pixel array for actually driving an image sensor. In addition, a first pad commonly contacted to the floating diffusion region among the test unit pixels, and a second pad contacted to the epi layer or the well of the substrate are implemented.

Both the reset transistor and the transfer transistor are turned off (with the gate voltage at " 0 V ") and the capacitance and leakage current between the first pad and the second pad are measured while varying the voltage applied to the first pad. At this time, by dividing the total capacitance and leakage current by the number of test unit pixels, the capacitance and leakage current of the floating diffusion region can be measured accurately.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2 is a circuit diagram illustrating a test unit pixel for measuring capacitance and leakage current of a floating diffusion region according to an exemplary embodiment of the present invention.                     

Referring to FIG. 2, the test unit pixel includes a photodiode PD, a transfer transistor Tx, a reset transistor Rx, and a floating diffusion region FD.

The transistors are turned off by applying a voltage of "0V" to the gates of the transfer transistor Tx and the reset transistor Rx for capacitance and leakage current measurement in the floating diffusion region of the present invention.

Next, the capacitance Cfd and the leakage current Ilk between the floating diffusion region FD and the substrate SUB are measured.

3 is a plan view illustrating an image sensor having a test pattern for measuring capacitance and leakage current of a floating diffusion region according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the image sensor of the present invention extends from the surface of the substrate to form an P-type impurity region (P0 region) / N-type impurity region (N-region) / P-type substrate region (P well or P) below the P0 region. A pixel array provided on a high density P-type (P ++) substrate and a P-type epi layer (P-epi) for practical device operation, including a pinned photodiode with stacked epitaxial layers, and on the same substrate together with the pixel array. An integrated test pixel array is provided.

Here, the pixel array is not shown for simplicity of the drawings.

The test pixel array includes a plurality of test unit pixels TP. By including 50 or more test unit pixels TP in the test pixel array, it is possible to increase the accuracy of the measurement. Therefore, if the capacitance of the 50 test unit pixels TP is measured, the capacitance of the floating diffusion becomes 'measured capacitance of the floating diffusion / 50'.                     

The test unit pixel TP extends from the substrate surface and is formed of a P-type impurity region (P0 region) / N-type impurity region (N-region) / P-type substrate region (P well or P-epi layer) below the P0 region. The stacked pinned photodiode PD, transfer transistor Tx, reset transistor Rx, and floating diffusion region FD are provided.

Among the test unit pixels TP, the floating diffusion region FD is commonly contacted by the first pad Pad1, and the epi layer or the well of the substrate is contacted by the second pad Pad2.

The image sensor having the structure of FIG. 3 can obtain the capacitance Cfd and the leakage current Ilk of the above-described floating diffusion region by selectively applying a power supply voltage or ground to each of the pads Pad1 and Pad2.

Since the test unit pixel TP is implemented by the same process recipe as that of the actual unit pixel, the capacitance of the test unit pixel TP may represent the capacitance of the actual unit pixel.

The photodiode PD, the reset transistor Rx, and the transfer transistor may be formed smaller than the actual unit pixels, and the floating diffusion region may be formed to have the same size as the actual unit pixels.

However, the size 'A' of the drain facing the floating diffusion region FD of the reset transistor Rx has a size of 0.3 µm or more, and the size of the 'B' of the photodiode PD also has a size of 0.3 µm or more. It is preferable.

This is to ensure a margin when forming the pad.

The floating diffusion region FD is electrically connected to the first pad Pad1 through the contact CT1, and the well or epi layer of the substrate is electrically connected to the second pad Pad2 through the contact CT2.

4 is a cross-sectional view taken along the line a-a 'of FIG. 3.

Referring to FIG. 4, a field oxide film Fox is locally formed on a substrate having a high concentration of a P-type (P ++) region and a P-type epi layer (P-epi). A gate oxide G and a conductive film are stacked and a gate electrode G having a spacer S is formed on a sidewall thereof. The gate electrode G forms the transfer transistor Tx together with the floating diffusion region FD.

The photodiode PD is formed on a substrate which is aligned on one side of the gate electrode G. The photodiode PD extends downward from the substrate surface and consists of a P0 region and an n-region formed under the P0 region. The n-region is in contact with an epitaxial layer (P-epi) or a P-well of the substrate.

An N-type floating diffusion region FD is formed on the other side of the gate electrode G and is aligned with the spacer S, and a high concentration N-type (N +) is formed at a portion where the pad contacts the floating diffusion region FD. An impurity region is formed. The high concentration N-type (N +) impurity region is for lowering contact resistance. An insulating film IMD (Inter-Metal Dielectric) is formed on the entire surface, a contact CT1 is formed through the insulating film IMD and electrically connected to the floating diffusion region FD. The pad Pad1 is formed.

5 is a cross-sectional view taken along the line b-b 'of FIG. 3.

Referring to FIG. 5, a field oxide film Fox is locally formed on a substrate having a high concentration of a P-type (P ++) region and a P-type epi layer (P-epi).                     

A gate oxide G and a conductive film are stacked and a gate electrode G having a spacer S is formed on a sidewall thereof. The gate electrode G forms the reset transistor Rx together with the floating diffusion region FD on one side thereof and the source / drain junction S / D on the other side thereof.

The floating diffusion region FD is formed on the substrate aligned on one side of the gate electrode G. A high concentration of N-type (N +) impurity region is formed in the portion where the pad contacts the floating diffusion region FD. An insulating film IMD is formed on the entire surface, a contact CT1 is formed through the insulating film IMD and electrically connected to the floating diffusion region FD. A first pad Pad1 is formed on the contact CT1. Formed.

FIG. 6 is a cross-sectional view of FIG. 3 taken in the c-c 'direction.

Referring to FIG. 6, a field oxide film Fox is locally formed on a substrate, and a P type well P-well is formed under the substrate between the field oxide films Fox. A high concentration P-type impurity region P + is formed in the well P-well to lower the contact resistance, and an insulating film IMD is formed on the entire surface of the substrate. A contact CT3 is formed through the insulating film IMD and electrically connected to the P-type impurity region P + of the well P-well, and a third pad Pad1 is formed on the contact CT3. .

The present invention, as described above, implements a plurality of test unit pixels including a transfer transistor, a reset transistor, a photodiode, and a floating diffusion region so as to be integrated with a pixel array for actually driving an image sensor, and each test unit pixel. The first pad is commonly contacted to the floating diffusion region, and the second pad is contacted to the epi layer or the well of the substrate.

Both the reset transistor and the transfer transistor are turned off (with the gate voltage at " 0 V ") and the capacitance and leakage current between the first pad and the second pad are measured while varying the voltage applied to the first pad. In this case, it was found that the capacitance and leakage current of the floating diffusion region can be accurately measured by dividing the total capacitance and leakage current by the number of test unit pixels.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can accurately measure the capacitance and leakage current of the floating diffusion region, thereby ultimately increasing the yield of the image sensor.

Claims (4)

A pixel array provided on the substrate for substantially device driving, including a pinned photodiode having a stacked structure of a P0 region / n-region / P type substrate; And A plurality of test devices including a pinned photodiode, a reset transistor, a transfer transistor, and a floating diffusion region, which are integrated on the same substrate together with the pixel array and in which a P0 region / n-region / P type substrate is stacked. It includes a test pixel array having a unit pixel, The test pixel array, And a first pad commonly connected to the floating diffusion regions of the plurality of test unit pixels, and a second pad connected to a P-type substrate of the test unit pixel. The method of claim 1, The P-type substrate includes an P-type well or a P-type epi layer. The method according to claim 1 or 2, The test pixel array comprises at least 50 test unit pixels. In the capacitance measurement method in the floating diffusion region of the image sensor having a structure of claim 1, Turning off the transfer transistor and the reset transistor; And After applying a predetermined voltage to the first pad and grounding the second pad, the voltage applied to the first pad is adjusted to measure capacitance and leakage current between both ends of the first pad and the second pad. step; And Calculating capacitance and leakage current of the floating diffusion region of the test unit pixel by dividing the measured capacitance and the leakage current by the number of the test unit pixels; Capacitance measurement method of an image sensor comprising a.

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