KR20060017312A - Display device having test circuit - Google Patents

Abstract

The present invention relates to a display device having a test circuit.

A display device according to the present invention includes an image display unit including a substrate, a plurality of scan lines, a plurality of data lines, and a plurality of pixels electrically connected to the plurality of scan lines and the plurality of data lines, An inspection circuit unit electrically connected to a data line and a data driver formed on the substrate and configured to supply a data signal to the data line, wherein the inspection circuit unit is disposed below the data driver.

By such a configuration, the present invention can improve the space utilization of the display device panel.

Description

Display device having an inspection circuit unit {DISPLAY DEVICE HAVING TEST CIRCUIT}             

1A is a plan view illustrating a display device including a general test circuit unit.

FIG. 1B is a circuit diagram illustrating an inspection circuit unit used in the display device of FIG. 1A.

2 is a plan view illustrating a structure of a display device including an inspection circuit unit according to a first embodiment of the present invention.

3A is a circuit diagram illustrating an inspection circuit unit used in the display device of FIG. 2.

3B is a signal diagram illustrating an operation of the inspection circuit unit of FIG. 3A.

4 is a plan view illustrating a structure of a display device including an inspection circuit unit according to a second exemplary embodiment of the present invention.

5A is a circuit diagram illustrating an inspection circuit unit used in the display device of FIG. 4.

FIG. 5B is a signal diagram illustrating an operation of the inspection circuit unit of FIG. 5A.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device having an inspection circuit portion, and more particularly, to a display device for changing an arrangement area of an inspection circuit portion for inspecting electrical characteristics of a panel in order to increase space utilization of a display device panel.

In thin film transistor (hereinafter, referred to as "TFT") driven display devices, high temperature or low temperature polysilicon and amorphous silicon may be formed on insulating substrates such as glass substrates and quartz substrates. A TFT using Amorphous Silicon) or the like as a semiconductor layer is provided in each pixel for switching control of the pixel electrode.

In addition, the board | substrate with which the circuit which consists of TFTs is provided in the image display area and / or its peripheral area is called TFT board | substrate. Before forming a display device by forming a pixel on each pixel electrode on the TFT substrate, an inspection process for detecting the electrical characteristics of the TFT is performed. After fabricating the panel of the display device and before providing a data driver such as a chip on glass (IC) integrated circuit (COG) to the panel, the color of each pixel is reproduced or the white color is reproduced to select defects of each pixel. To identify.

FIG. 1A is a plan view illustrating a display device including a general test circuit part, and FIG. 1B is a circuit diagram illustrating a test circuit part used in the display device of FIG. 1A.

1A and 1B, a general display device is disposed in a region defined by a substrate 10, scan lines S, data lines D, and pixel power lines VDD formed on the substrate 10. The display unit 20 having the plurality of pixels 21, the scan driving circuit 30, the data driving chip 40, the first power line 50, the second power line 52, the pad unit 60, And an inspection circuit unit 70 for inspecting an electrical characteristic of the pixel.

The scan driving circuit 30 is disposed to be adjacent to one side of the display unit 20 and electrically connected to the first pads Ps of the pad unit 60 through the scan control signal line 32. The scan driving circuit 30 generates a scan signal according to the scan control signal line 32 and sequentially supplies the scan signal to the scan lines S of the display unit 20.

The data driving chip 40 is electrically connected to the second pads Pd of the pad unit 60 through the first data signal line 42 and to the data line D through the second data signal line 44. Electrically connected. In this case, the data driving chip 40 may be mounted on the substrate 10 or formed directly on the substrate 10 by a chip on glass method, a wire bonding method, a flip chip method, a beam lead method, or the like. have. The data driving chip 40 receives a data control signal and a data signal supplied from the second pads Pd and supplies the data signal to the data lines D according to the data control signal.

The first power supply line 50 is formed adjacent to the upper side of the display unit 20 and commonly connected to one side of the pixel power supply line VDD. The first power line 50 receives the first pixel driving voltage transmitted from the third pads Pvdd of the pad unit 60 through the first power supply line 48, and the pixel power line of each pixel 21. Supply to (VDD).

The second power line 52 is formed to be adjacent to one side of the display unit 20, and is electrically connected to the cathode electrode of the light emitting device formed on the front surface of the display unit 20. The second power line 52 supplies the second pixel driving voltage transmitted from the fourth pads Pvss of the pad unit 60 to the cathode electrode of the light emitting device through the second power supply line 56.

One side of each pixel power supply line VDD is commonly connected to the first power supply line 50. Each pixel power supply line VDD supplies the first pixel driving voltage supplied from the first power supply line 50 to each pixel 21.

The inspection circuit unit 70 includes a plurality of switching transistors M, and the plurality of switching transistors M each of the plurality of pixels 21 formed in the image display unit 20 according to the inspection control signal TEST_GATE. Supply (TEST_DATA [R], TEST_DATA [G], TEST_DATA [B]). The test control signal TEST_GATE and the test signals TEST_DATA [R], TEST_DATA [G], and TEST_DATA [B] are supplied to the test circuit unit 70 from the fifth pad Pts of the pad unit 60.

Accordingly, each pixel 21 is controlled by a scan signal supplied to the scan line S and emits light by a current supplied from the pixel power line VDD to the light emitting element according to the data signal supplied to the data line D. To display an image.

In such a general display device, the inspection circuit unit 70 is disposed between the image display unit 20 and the data driving chip 40 on the panel. Accordingly, the inspection circuit unit 70 disposed between the image display unit 20 and the data driving chip 40 has a problem of increasing unnecessary space on the panel.

Accordingly, an object of the present invention is to provide a display device capable of improving the space utilization of the display device panel by changing the arrangement area of the inspection circuit portion.

Further, another object of the present invention is to provide a display device suitable for arranging an essential circuit portion between a data driver and an image display portion.

As a technical means for achieving the above object, a first aspect of the present invention is formed on a substrate and the substrate, the plurality of scan lines, a plurality of data lines and electrically connected to the plurality of scan lines and the plurality of data lines. An image display unit including a plurality of pixels, an inspection circuit unit electrically connected to the data line, and a data driver formed on the substrate and supplying a data signal to the data line, wherein the inspection circuit unit is disposed below the data driver. It provides a display device disposed in the.

Preferably, the display device further includes a pad that is electrically connected to the inspection circuit unit and supplies an inspection signal and an inspection control signal from the outside. The inspection circuit unit includes at least one switching element, and supplies the inspection signal to the data line through the switching element according to the inspection control signal. The display device further includes a pad for supplying a data control signal and a data signal from the outside to the data driver. The display device may further include a scan driving circuit formed on the substrate to drive a scan line according to a scan control signal.

A second aspect of the present invention includes a substrate and a plurality of pixels formed on the substrate and electrically connected to the plurality of scan lines, the plurality of first data lines, and the plurality of scan lines and the plurality of first data lines. Supply an image signal to an image display unit, a demultiplexer electrically connected to the first data line, an inspection circuit unit electrically connected to the demultiplexer through a second data line, and a data signal to the second data line And a data driver, wherein the inspection circuit provides a display device disposed below the data driver.

Preferably, the display device further includes a pad that is electrically connected to the inspection circuit unit and supplies an inspection signal and an inspection control signal from the outside. The inspection circuit unit includes at least one switching element, and supplies the inspection signal to the second data line through the switching element according to the inspection control signal. The display device further includes a pad for supplying a data control signal and a data signal from the outside to the data driver. The display device may further include a scan driving circuit formed on the substrate to drive a scan line according to a scan control signal.

Hereinafter, the preferred embodiments of the present invention may be easily implemented by those skilled in the art with reference to FIGS. 2 to 5b in detail as follows.

FIG. 2 is a plan view illustrating a structure of a display device including an inspection circuit unit according to a first embodiment of the present invention, and FIG. 3A is a circuit diagram of an inspection circuit unit used in the display device of FIG. 2.

Referring to FIGS. 2 and 3A, the display device 200 according to the first exemplary embodiment of the present invention is formed on the substrate 110 and the substrate 110, and includes a plurality of scan lines S and a plurality of scan lines. An image display unit 120 including a data line D and a plurality of pixels 121 electrically connected to the plurality of scan lines S and the plurality of data lines D, and to the data line D. An inspection circuit unit 300 electrically connected to the substrate 110 and a data driver 140 formed on the substrate 110 to supply a data signal to the data line D, wherein the inspection circuit unit 300 includes the data driver. A display device 200 disposed under the 140 is provided.

In addition, the display device 200 according to the first exemplary embodiment of the present invention is formed on the substrate 110 and has a pad unit 160 to which a scan control signal, a data signal, an inspection signal, an inspection control signal, and driving power are supplied from the outside. And a scan driver 130 formed on the substrate 110 to drive the scan line according to the scan control signal, a first power line 150 formed on the substrate 110, a first power line 150, and an image. The display device 120 further includes a second power line 152 formed between the display units 120.

The image display unit 120 includes a plurality of pixels 121 having at least one TFT and at least one capacitor in an intersection area of the scan line S and the data line D. FIG.

The scan driver 130 is disposed to be adjacent to one side of the image display unit 120 and electrically connected to the first pads Ps of the pad unit 160. The scan driver 130 generates a scan signal according to the scan control signal lines from the first pads Ps and sequentially supplies the scan signals to the scan lines S of the image display unit 120.

The data driver 140 is manufactured in the form of a chip, and is electrically connected to the data line D and electrically connected to the second pads Pd of the pad unit 160. In this case, the data driver 140 may be mounted on the substrate 110 or formed directly on the substrate 110 by a chip on glass method, a wire bonding method, a flip chip method, a beam lead method, or the like. have. The data driver 140 receives the data control signal and the data signal from the second pads Pd and supplies the data signal to the data lines D according to the data control signal. Here, the data driver 140 is connected to the data line D through output pins (not shown) to provide an output signal of the data driver 140, that is, a data signal from the output pins, to the data line D. It is connected to the second pads Pd through input pins (not shown) to receive a data control signal and a data signal supplied from a FPC (Flexibel Printed Circuit).

As a result, the data driver 140 supplies the data signal to each pixel 121 through the data line D according to the data control signal supplied from the FPC.

The first power line 150 is formed to be adjacent to the upper side of the image display unit 120. One end of the first power line 150 is electrically connected to third pads Pvdd of the pad unit 160. The first power line 150 supplies the first pixel driving voltage supplied from a voltage generator not shown through the third pads Pvdd to one side of the pixel power line VDD of each pixel 121. do.

The second power line 152 is formed to be adjacent to one side of the image display unit 120, and is electrically connected to the cathode electrode of the light emitting element formed on the front surface of the image display unit 120. The second power line 152 commonly supplies the second pixel driving voltages transmitted from the fourth pads Pvss of the pad unit 160 to each pixel 121.

The inspection circuit unit 300 includes a plurality of switching transistors M1, and each switching transistor M1 includes a source, a drain, and a gate, respectively. The source or the drain is connected to the test signal line 193 to which the test signal T_DATA is supplied, the drain or the source is connected to the data line D, and the gate is the test to which the test control signals CLR, CLG and CLB are supplied. It is electrically connected to the signal line 193. Here, the test control signal CLR, CLG, CLB and the test signal T_DATA transmitted from the fifth pads Pts are supplied to the test signal line 193. Accordingly, each switching transistor M1 transfers the test signal T_DATA to the data line D according to the test control signals CLR, CLG and CLB applied to the gate.

In other words, the inspection control signals CLR, CLG, and CLB control the input of the inspection signal T_DATA to each pixel 121. Each switching transistor M1 is electrically connected to the data line D through the data line D, and the test control signals CLR, CLG, CLB and the test signal T_DATA are supplied through the test signal line 193. Connected to the fifth pads Pts. Each switching transistor M1 receives the test signal T_DATA according to the test control signals CLR, CLG and CLB applied through the test signal line 193 and supplies the test signal T_DATA to each pixel 121 through the data line D. do.

As a result, the inspection circuit unit 300 checks whether each TFT formed on the substrate 110 operates correctly according to the inspection signal T_DATA supplied to the data line D. FIG. In addition, the inspection circuit unit 300 is disposed under the data driver 140 and is electrically connected to the data line D. FIG.

As such, the inspection circuit unit 300 necessary for the inspection process of each TFT formed on the substrate 110 may be formed under the data driver 140 to increase the space utilization of the display device panel.

3B is a signal diagram illustrating an operation of the inspection circuit unit of FIG. 3A.

Referring to FIG. 3B, the operation of the test circuit unit illustrated in FIG. 3A will be described below.

When the test signal T_DATA of each subpixel, for example, each of the R, G, and B subpixels is applied to the test circuit unit through the test signal line, corresponding switching transistors may be applied according to the test control signals CLR, CLG, and CLB. To drive. As a result, the inspection signal T_DATA is supplied to each TFT of the image display portion through the data line, thereby visually inspecting the image display portion of the display device.

4 is a plan view illustrating a structure of a display device including an inspection circuit unit according to a second exemplary embodiment of the present invention, and FIG. 5A is a circuit diagram illustrating an inspection circuit unit used in the display device of FIG. 4.

4 and 5A, the display device 200 according to the second exemplary embodiment of the present invention is formed on the substrate 110 and the substrate 110, and includes a plurality of scan lines S and a plurality of scan lines. An image display unit 120 including a first data line D1 and a plurality of pixels 121 electrically connected to the plurality of scan lines S and the plurality of first data lines D1, and the first display line 120. A demultiplexer 170 electrically connected to the first data line D1, a test circuit 500 electrically connected to the demultiplexer 170 through a second data line D2, and the second And a data driver 140 for supplying a data signal to the data line D2, wherein the inspection circuit unit 500 provides the display device 400 disposed under the data driver 140.

In addition, the display device 400 according to the second exemplary embodiment of the present invention is formed on the substrate 110, and the scan control signal, the data signal, the test signal T_DATA, the first and second test control signals T_GATE, CLR, CLG, CLB), a pad unit 160 to which driving power is supplied, a scan driver 130 formed on the substrate 110 to drive a scan line according to a scan control signal, and formed on the substrate 110. The first power line 150 and the second power line 152 are further provided.

The display device 400 according to the second exemplary embodiment of the present invention demultiplexes the test signal T_DATA or the data signal and supplies the demultiplexer 170 to supply the pixels 121 of the image display unit 120. The display device according to the first exemplary embodiment of the present invention is the same except that the image display unit 120 and the data driver 140 are disposed. Accordingly, in the display device 400 according to the second embodiment of the present invention, descriptions of other components except for the demultiplexer 170 and the inspection circuit unit 500 are described in the display according to the first embodiment of the present invention. The description of the device will be replaced.

The data driver 140 is manufactured in the form of a chip, and is electrically connected to the demultiplexer 170 through the second data line D2 and to the second pads Pd to which the data signal and the data control signal are supplied. Electrically connected. The data driver 140 provides the data signal to the demultiplexer 170 through the second data line D2 according to the data control signal supplied from the FPC, and the demultiplexer 170 inverts the data signal. Multiplexing is supplied to each pixel 121 of the image display unit 120 through the first data line D1.

The pad unit 160 is electrically connected to pads of an FPC, not shown. In this case, the pad unit 160 is applied to the scan control signal for controlling the scan driver 130 from the outside, the data control signal and data signal for controlling the data driver 140, and the test circuit 500. The first test control signal T_GATE, the test signal T_DATA, and the second test control signals CLR, CLG, and CLB supplied to the demultiplexer 170 are supplied. In addition, the pad unit 160 is supplied with first and second driving power sources from the outside via the FPC.

The demultiplexer 170 includes a plurality of switching transistors M2, and each switching transistor M2 includes a source, a drain, and a gate, respectively. The source or drain is connected to the test signal T_DATA or the second data line D2 supplied with the data signal, the drain or source is connected to the first data line D1, and the gate is connected to the second test control signal CLR, CLG, CLB are electrically connected to a test signal line 193 'supplied with CLG, CLB. Each of the switching transistors M2 transfers the test signal T_DATA or the data signal to the first data line D1 according to the second test control signals CLR, CLG and CLB applied to the gate.

On the other hand, the demultiplexer 170 receives the test signal T_DATA or the data signal through the second data line D2, and then demultiplexes the test signal T_DATA or the data signal into three first data lines D1, respectively. ). Since the demultiplexer 170 is a 1: 3 demultiplexer, the test signal T_DATA or the data signal transmitted to one second data line D2 is demultiplexed 1: 3 so that the first data line D1 is demultiplexed. To pass.

The test circuit unit 500 includes a plurality of switching transistors M1, and each switching transistor M1 includes a source, a drain, and a gate, respectively. The source or drain is connected to the test signal line 193 'to which the test signal T_DATA is supplied, the drain or source is connected to the second data line D2, and the gate is to the test signal line to which the first test control signal T_GATE is supplied. 193 '. Each switching transistor M1 is electrically connected to the demultiplexer 170 through the second data line D2. Each of the switching transistors M1 transfers the test signal T_DATA to the second data line D2 according to the first test control signal T_GATE applied to the gate. The test signal T_DATA transmitted to the demultiplexer 170 through the second data line D2 is demultiplexed by the demultiplexer 170 according to the second test control signals CLR, CLG, and CLB to be demultiplexed. Is transferred to the data line D1. The test signal T_DATA applied through the first data line D1 is transmitted to each pixel 121. Meanwhile, the first inspection control signal T_GATE controls the input of the inspection signal T_DATA to the demultiplexer 170, and the second inspection control signals CLR, CLG, and CLB each pixel of the image display unit 120. The input of the test signal T_DATA to 121 is controlled.

Thus, the inspection circuit unit 500 checks whether each pixel 121 formed on the substrate 110 operates correctly according to the inspection signal T_DATA supplied to the data line D through the above-described operation. In addition, the inspection circuit unit 500 is disposed under the data driver 140.

As such, by forming the inspection circuit unit 500 necessary for the inspection process of each TFT formed on the substrate 110 under the data driver 140, the demultiplexer 170 may be additionally disposed on the display device panel. Do.

FIG. 5B is a signal diagram illustrating an operation of the inspection circuit unit of FIG. 5A.

Referring to FIG. 5B, the operation of the test circuit unit illustrated in FIG. 5A will be described below.

When the inspection signal T_DATA of each subpixel, for example, each of the R, G, and B subpixels is applied to the inspection circuit unit through the inspection signal line and the first inspection control signal T_GATE becomes low, the second inspection control signal Each switching transistor of the corresponding demultiplexer is driven according to (CLR, CLG, CLB). As a result, the inspection signal T_DATA is supplied to each pixel of the image display unit through the first and second data lines.

The display device according to the first and second embodiments of the present invention includes a liquid crystal display, a field emission display, a plasma display panel, and a light emitting display device. It can be used in a flat panel display having a TFT including an Emitting Display).

The above detailed description and drawings are merely illustrative of the present invention, which are used only for the purpose of illustrating the present invention and are not intended to limit the scope of the present invention as defined in the claims or the claims. Accordingly, those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical protection scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

As described above, in the display device according to the exemplary embodiment of the present invention, the inspection circuit portion used in the lighting inspection process is disposed under the chip arrangement portion. Accordingly, the present invention can improve the space utilization of the display panel.

Claims (6)

Substrate, An image display unit formed on the substrate and including a plurality of scan lines, a plurality of data lines, and a plurality of pixels electrically connected to the plurality of scan lines and the plurality of data lines; An inspection circuit portion electrically connected to the data line; A data driver formed on the substrate to supply a data signal to the data line; The test circuit unit is disposed under the data driver. The method of claim 1, And the inspection circuit unit includes at least one switching element, and supplies an inspection signal to the data line through the switching element according to an inspection control signal. The method of claim 1, And a scan driving circuit formed on the substrate to drive a scan line according to a scan control signal. Substrate, An image display unit formed on the substrate and including a plurality of scan lines, a plurality of first data lines, and a plurality of pixels electrically connected to the plurality of scan lines and the plurality of first data lines; A demultiplexer electrically connected to the first data line; An inspection circuit portion electrically connected to the demultiplexing portion via a second data line; And a data driver for supplying a data signal to the second data line, wherein the inspection circuit is disposed under the data driver. The method of claim 4, wherein And the inspection circuit unit includes at least one switching element, and supplies the inspection signal to the second data line through the switching element according to the inspection control signal. The method of claim 4, wherein And a scan driving circuit formed on the substrate to drive a scan line according to a scan control signal.

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