KR20060002023A - High dynamic range variable gain amplifier - Google Patents

Abstract

A multi-stage low power, high dynamic range variable gain amplifier (100) comprises an input stage (120) cascaded with one or more current amplifier stages (160A, 160B) whereby the gain of each stage (120) may be independently controlled. The input stage (120) may be comprised of a variable transconductance amplifier (227) using variable emitter degeneration. The current amplifier (160A, 160B) may be comprised of a differential Darlington amplifier (510) coupled to a differential cascode amplifier (520). The transconductance amplifier (227) converts an input voltage signal to a current signal. The variable gain amplifier (100) is designed for efficient low power operation.

Description

High Dynamic Range Variable Gain Amplifiers {HIGH DYNAMIC RANGE VARIABLE GAIN AMPLIFIER}

The features, objects, and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, all of which are identified by corresponding reference numerals throughout.

1A and 1B are schematic diagrams of exemplary dual mode CDMA / FM communications devices that may be used with the present invention.

2 is a block diagram of an exemplary three stage variable gain amplifier of the present invention.

3 is a diagram of the CDMA input stage of FIG.

4 is a diagram of the transconductance amplifier bias control circuit of FIG. 2.

5 is a diagram of the exponential generator of FIG.

FIG. 6 illustrates a partial combination of the elements of FIGS. 2 and 3 configured to illustrate the advantages of the present invention.

7 is a diagram of the current amplifier of FIG.

8 is a diagram of the tail current generator of FIG. 7.

The present invention relates to a variable gain amplifier, and more particularly to a variable gain amplifier (VGA) used in communication devices.

In a wireless communication environment, a wireless communication receiver receives a signal undergoing rapid and large fluctuations in signal power. In receivers used in wideband digital code division multiple access (CDMA) mobile stations, it is necessary to control the power of the demodulated signal for proper signal processing. In addition, in a transmitter or the like used for a CDMA mobile station, it is necessary to control the transmission power in order to avoid excessive interference to other mobile stations. Such power control is equally considered in receivers and transmitters in narrowband analog frequency modulation (FM) wireless communication systems.

There is a dual-mode CDMA / FM radio that is needed to provide power control of the transmitted and received signals in both digital CDMA and analog FM modulation. In these dual mode mobile stations, the control process is complicated because the dynamic range and industry standard standards associated with CDMA signals and FM signals are different. That is, the magnitude of the received CDMA signal varies over a range of about 80 dB, while the magnitude of the received FM signal varies over a range of nearly 100 dB. The provision of separate automatic gain control (AGC) circuits for both CDMA and FM signals increases the cost and complexity of these dual mode mobile stations. Accordingly, it would be desirable to provide an AGC circuit that can operate on both CDMA and FM signals.

1A and 1B show an example of a peripheral circuit of a VGA performing an AGC function. 1A and 1B are shown in TIA / EIA / IS-95, “Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System,” which is briefly named IS-95, for example, the telecommunications industry standard. Thus is a block diagram of a designed dual-mode CDMA / FM cellular telephone 900. VGA is used for each of the receiving AGC amplifier 902 and the transmitting AGC amplifier 904 of this cellular telephone 900. The front end receiver portion of the cellular telephone 900 includes an antenna 906, a duplexer 908, a low noise amplifier (LNA), a mixer circuit 910, and a filter 930. As the cellular telephone 900 moves across the coverage area of the CDMA system, the signal level of the antenna 906 varies from about -110 dBm to -30 dBm. Typically, each of these front end elements provides the same gain over the operating range irrespective of the signal level applied, so that the dynamic range of the signal applied to the receiving AGC amplifier 902 is approximately 80 dB, so that the dynamics of the signal at the antenna 906 are Same as range. Likewise, when the cellular telephone 900 moves across the coverage area of the FM system, the signal level of the antenna changes by about 100 dB.

The output of the receiving AGC amplifier 902 is supplied to a baseband analog application specific integrated circuit (BAASIC) 912 that converts the analog signal into a digital signal. The analog / digital signal conversion process is best performed when the signal level applied to the analog / digital converter is in a constant state. The receiving AGC amplifier 902 performs a function of compensating for the variation of the input power so that the output power of the receiving AGC amplifier 902 is in a constant state so that the input to the analog / digital converter is in a constant state.

The mobile station modem ASIC 914 not only demodulates both CDMA and FM signals, but also performs various digital and power control functions related to CDMA operation. These functions are known in the art and are not critical to the present invention and will not be described further herein. User interface 916 provides an interface to a human operator. In addition, such a user interface 916 is also known in the art and is not a subject matter of the present invention and will not be further described.

The mobile station modem ASIC 914 provides the baseband modulated digital representation of the CDMA waveform or the analog representation of the modulated FM waveform to the BAASIC 912. BAASIC 912 converts this baseband signal representation into an analog intermediate frequency (IF) form of constant signal level and supplies it to transmit AGC amplifier 904. Transmit AGC amplifier 904 controls the power of this signal and supplies it to upconverter 918, power amplifier and driver circuit 920, isolator 922, duplexer 908, and antenna 906. When the cellular telephone 900 moves across the coverage area of the cellular system, the level of the transmission signal at the antenna 906 fluctuates in contrast to the reception power since the transmission level approaches the maximum when the reception power is minimum. do. This variation in transmit power level is performed by AGC amplifier 904. It should be noted that since the input power to the AGC amplifier 904 is generally fixed, the gain of the power amplifier 920 may also be a fixed value.

For details on automatic gain control loops and general power control in wireless communication systems, see US Patent No. 5,283,536, "HIGH DYNAMIC RANGE CLOSED LOOP AUTOMATIC GAIN CONTROL CIRCUIT," issued February 1, 1994, April 1992. U.S. Patent No. 5,107,225, entitled "HIGH DYNAMIC RANGE CLOSED LOOP AUTOMATIC GAIN CONTROL CIRCUIT", dated Nov. 30, 1993, U.S. Patent No. 5,267,262, "TRANSMITTER POWER CONTROL SYSTEM", dated Nov. 12, 1995, US Patent No. 5,469,115 "METHOD" AND APPARATUS FOR AUTOMATIC GAIN CONTROL IN A DIGITAL RECEIVER "and US Patent No. 5,283,536, filed October 26, 1993," HIGH DYNAMIC RANGE CLOSED LOOP AUTOMATIC GAIN CONTROL CIRCUIT ", each of which is assigned to the assignee of the present invention. Reference is made here.

The mobile communication receiver and transmitter as described above are designed to have a high compression point, low noise injection and low power consumption. Receivers with high compression points and low noise injection have a high dynamic range because they can detect signals over a wide range of power levels. Transmitters with high compression points and low noise injection have a high dynamic range because they can transmit signals over a wide range of power levels. Low power consumption transmitters and receivers increase battery life. Thus, these characteristics are important in designing a variable gain amplifier for a communication system that transmits and receives signals over a wide range of power levels.

The receiver should be able to detect information from both the strong signal broadcast by the adjacent high power transmitter and the weak signal broadcast by the remote low power transmitter. The extent to which the receiver can detect weak or strong signals is called its dynamic range. Similarly, the transmitter should be able to transmit low power signals to an adjacent receiver and high power signals to a remote receiver.

The dynamic range of the receiver is determined by the minimum and maximum detectable signal levels. The minimum detectable signal level of the receiver is determined by the noise figure of the receiver. Similarly, the minimum transmittable power is set by the transmitter's noise figure as the signal level drops near or below the noise floor. The noise figure of VGA is partly a function of noise injection characteristics and VGA gain. In general, the larger the gain of the receiver, the better the noise figure, that is, the better the detection of very weak signals in the presence of noise.

The maximum detectable signal level of the receiver can be determined by the intermodulation distortion (IMD) performance of the receiver. When multiple signals pass through a device, nonlinearities in the device result in mixing between the signals. For example, at the point where the CDMA and analog FM system coexist, the third order IM component from the analog FM system will generally fall within the CDMA passband. This IM component will act as a "jammer" that contributes to the IMD which may interfere with the detection and demodulation of the desired signal at the receiver. The IMD performance of a VGA is partly a function of its linearity and gain. In general, the lower the gain of the receiver, the better its IMD performance. This is in contrast to the condition of the noise figure described above. Thus, the design of a VGA for a receiver with a large dynamic range is in a difficult trade-off relationship between IMD performance and noise figure.

In general, receive VGAs are designed to provide a relatively constant output power level for a varying input power level, while transmit VGAs are designed to receive a relatively constant input power level and provide a varying output power level. Similar design considerations apply to the transmitter's VGA.

In addition, mobile receivers are designed to be compact, lightweight and have a long service life. Mobile receivers are powered by a minimum number of battery cells to reduce portability and reduce size and weight. Since the voltage of the battery is proportional to the number of battery cells, the AGC circuit, including the variable gain amplifier (VGA), must be operated at a low supply voltage. It is also desirable to extend the life of the battery in order to extend the period between replacement or recharging of the battery. Thus, AGC circuits, including VGAs, should consume little DC current and power.

This requirement for low DC power consumption implies a trade-off in design as described above. High gain amplifiers with good noise figure require more DC power. However, for a low gain amplifier with good IMD performance, less DC power is needed. Current VGA designs are inefficient in that they cannot conserve enough DC power at low power levels.

Thus, a VGA is required that not only consumes low DC power, but also has high dynamic range, good noise figure and IMD performance.

According to the present invention, there is provided a VGA with high dynamic range, good noise figure and IMD performance and consuming minimal DC power. VGA can be used in automatic gain control (AGC) amplifiers for transmitter and receiver chains in cellular telephones. VGA gains power by converting the input voltage signal into a current signal and amplifying the current signal. By terminating the VGA with an appropriate impedance, the amplified current signal can be converted into a voltage signal.

VGA consists of at least two cascade stages, input stages and current amplifiers. The input stage can in turn be divided into a CDMA input stage and an FM input stage, such that the outputs of both input stages are coupled to the inputs of the current amplifier and are selected by the CDMA / FM mode signal. In one embodiment, the FM input stage is single ended and the CDMA inputs are balanced. It is also possible to increase the gain of VGA by cascading two or more current amplifier stages in series. The transconductance gain of the input stage can be controlled by the control signal.

Low power VGAs with high dynamic range are formed by a combination of technologies. In a first embodiment, the CDMA input stage includes a Gilbert cell attenuator and a cascaded variable transconductance amplifier to be suitable for dual mode receive AGC amplifiers, such as amplifier 902 in FIG. The variable transconductance amplifier converts the variable voltage signal into an output current signal by a transconductance controlled by a FET transistor acting as a variable emitter degenerate resistor. Emitter degeneration provides variable local series feedback, allowing the CDMA input stage to handle a wide dynamic range of input signals while providing excellent noise figure and IMD performance. When a low level input signal is present, the channel resistance of the FET transistor is varied to increase the gain of the input stage, thereby improving the noise figure of the receiver and the ability to detect weak signals. On the other hand, when a high level input signal is present, the IMD performance of the receiver is improved by varying the channel resistance of the FET transistor to reduce the gain of the input stage. The Gilbert cell attenuator provides additional current attenuation so that, when a large input signal is applied, subsequent current amplification stages are overdriven and do not enter the nonlinear range.

In a first embodiment, the FM input stage is an emitter degenerate bipolar differential amplifier with a Gilbert cell attenuator. The differential pair converts the input voltage into a current and supplies it to the Gilbert cell attenuator, which further attenuates the current flowing into the subsequent stage of the current amplifier. Unlike the CDMA input stage, the FM input stage is a fixed gain transconductance rather than using variable emitter decay, because the industry standard (IS-95) linear condition for FM signals is much less stringent than for CDMA signals. Using a stage causes the amplifier to saturate much faster in the nonlinear region.

In a second embodiment, to be suitable for a transmitting AGC amplifier such as amplifier 904 of FIG. 1, both the FM and CDMA signals carry transconductors and Gilbert cell attenuators and differential pairs with shunt series feedback at the input. It may be processed by a fixed gain transconductance input stage having: Shunt series feedback at the input allows accurate linear input impedance matching without difficulty. The output of the differential pair may be AC coupled to the transconductor by a pair of capacitors. The transconductor uses an emitter degenerate differential amplifier to convert the voltage output of the differential pair into a current. This current is fed to the Gilbert cell attenuator to further attenuate the current flowing into the subsequent stage of the current amplifier. Since the input level to the transmit AGC amplifier 904 is generally constant, a variable gain input stage is not necessary.

In the first embodiment, in order to be suitable for use as the receiving AGC amplifier 902, each of the current amplifiers includes two sections, a differential Darlington amplifier and a differential cascode amplifier. These current amplifiers are translinear circuits that control the current gain by varying the ratio of "tail current" which biases the translinear loop. The current gain of each current amplifier stage can be individually controlled by one or more control signals.

In a second embodiment, in order to be suitable for use as the transmit AGC amplifier 904, each of the current amplifiers includes two sections, a differential Darlington amplifier and a simple differential pair. This current amplifier is a hybrid of a feedback current amplifier and a translinear loop.

In each of the above-described embodiments, the gain of the variable gain stage is controlled by a gain control circuit that varies the gain of the current amplifier in accordance with the applied AGC control voltage (RX gain control or TX gain control in FIG. 1). This gain control circuit includes an exponential generator that ensures VGA linearity (in dB) over a wide dynamic range.

It is therefore an advantage of the present invention to provide a VGA with high dynamic range for CDMA and FM signals. Such a mobile receiver using VGA can detect a signal over a wider range of input power. Another advantage is that VGA consumes minimal DC power. Thus, VGA can be used in mobile communication devices to extend the useful life of the battery. Another advantage is that by adjusting the DC control voltage linearly, the gain of the VGA can be changed almost linearly in dB.

The present invention relates to a monolithic integrated circuit variable gain amplifier (VGA). VGA provides a gain proportional to the control voltage. VGA provides exponential voltage gain as a function of the linear increase of the applied control voltage, providing nearly linear power gain in decibels (dB) directly proportional to the linear increase of the applied control voltage. VGA can provide linear power gain over a large dynamic range in excess of 80 dB (or a factor of 1/100 million). VGA provides a linear power gain that can withstand the process changes that occur during VGA manufacturing.

This VGA can be used for many applications, including receivers and transmitters. When the VGA is functioning at the receiver, the input typically varies over a large dynamic range but the output of the VGA is relatively constant. If the signal level input to the VGA functioning at the receiver is small, the gain of the VGA should be relatively large. If the signal level input to the VGA functioning at the receiver is large, the gain of the VGA should be relatively small. Therefore, the VGA functioning at the receiver should generally have excellent noise performance when providing a relatively large gain, and excellent intermediate modulation performance when providing a relatively small gain.

When VGA is functional at the transmitter, the input is typically constant while the output of the VGA varies over a wide dynamic range. If it is necessary to increase the signal level of the VGA output, the gain of the VGA should be relatively large and the intermediate modulation performance should be able to support the resulting large signal level. If it is necessary to reduce the signal level output from the VGA functioning in the transmitter, the gain of the VGA should be relatively small and the noise performance of the VGA becomes important.

2 is a block diagram illustrating one embodiment of a variable gain amplifier (AGC) for adjusting the power level of an input signal over a wide dynamic range. The embodiment of FIG. 2 is suitable for use as the receive AGC amplifier 902 of FIG. VGA 100 consists of three stages: input stage 120 and two cascaded current amplifier stages 160A and 160B. At the rear end of the input stage 120, one or more current amplifier stages 160 are cascaded continuously to increase the dynamic range of the VGA 100. In the first embodiment, the input stage 120 has a separate FM input stage 121 and a CDMA input stage 122 having input ports 171 and 170, respectively. The FM input stage 121 and the CDMA input stage 122 are alternately connected to the current amplifier 160A through a switch 123 controlled by the CDMA / FM mode selection signal. When the communication device is in the CDMA mode, the switch 123 connects the CDMA input stage 122 to the current amplifier 160A and shuts off the FM input stage 121. In contrast, when the communication device is in the FM mode, the switch 123 connects the FM input stage 121 to the current amplifier 160A and shuts off the CDMA input stage 122.

2 also shows bias ports 110, 130, 150A and 150B for control voltages for application to the VGA 100. The gain of each stage is controlled by, for example, a control voltage generated by a receiver detection circuit that determines the strength of the signal. Each stage is composed of various components including an active device such as a transistor.

The VGA input signals provided to the input port 170 of the CDMA input stage 122 are separated, ie, balanced, into two signal paths carrying signals that are 180 degrees out of phase with each other. The VGA input signal is supplied through the input port 170 of the VGA. However, the VGA input signal provided to the input port 171 of the FM input stage 121 is single terminated. The output of input stage 120 and the input of current amplifier 160A are coupled through port 190.

Operated by a low supply voltage of about 3.6V, the input stage 120 converts the input voltage signal into a current signal so that the VGA active devices do not operate in the nonlinear region or distort the input signal. In addition, the low supply voltage of the VGA 100 can reduce the power consumption of the VGA (100).

3 illustrates one embodiment of a CDMA input stage 122. A balanced signal is supplied to the input port 170 of the VGA. CDMA input stage 122 has a variable transconductance amplifier 227 coupled to Gilbert cell attenuator 226 and performs four functions. First, the variable transconductance amplifier 227 converts the input voltage signal into a current signal. Second, the signal is variably amplified by the combination of the variable transconductance amplifier 227 and the Gilbert cell attenuator 226, and the signal is exponentially adjusted in dB by linearly adjusting the control voltage of the bias port 110. Linearly). Third, increased emitter degeneration in the variable transconductance amplifier 227 reduces the IMD of the VGA 100 when the input signal voltage is large and the IMD is most significant. As the emitter degeneration in the variable transconductance amplifier 227 is increased, the transconductance of the input stage 120 and thus the IMD is reduced. Finally, the reduced emitter decay in the variable transconductance amplifier 227 improves the noise figure of the VGA 100 when the voltage of the input signal is small and the noise performance is the most critical. If the emitter degeneration of the variable transconductance amplifier 227 is reduced, the transconductance of the input stage 120 is increased to improve the noise figure of the receiver.

The variable transconductance amplifier 227 is comprised of two bipolar junction transistors (BJTs) 235 and 236, two current sources 238 and 239, and a field effect transistor (FET) 237. Current sources 238 and 239 are connected in series to the emitters of BJTs 235 and 236. The source connection 228 and the drain connection 229 of the FET 237 are connected to the emitters of the BJTs 235 and 236, respectively. The balance signal at the VGA input port 170 is applied to the bases of the BJTs 235 and 236. The balance current output of the variable transconductance amplifier 227 flows from the collectors of the BJTs 235 and 236.

The transconductance of the variable transconductance amplifier 227 can be adjusted by varying this meter degeneration of the BJTs 235 and 236. As a result, the gain of the VGA 100 can be changed. Emitter degeneration of BJTs 235 and 236 is created by varying the channel resistance of FET 237. FET 237 acts like a variable resistor in the resistive region, providing variable emitter degeneration of both BJTs 235 and 236. Thus, the drain-source bias voltage of the FET 237 should be less than the knee voltage of the FET 237. The channel resistance can be varied by varying the voltage applied to the bias port 290 to adjust the bias between the gate-source junction of the FET 237. The transconductance of the variable transconductance amplifier 227 may be increased by reducing the channel resistance of the FET 237. Thus, the present invention provides a variable channel resistance through the FET 237 to make the noise figure and IMD performance suitable. In addition, while the CDMA input stage 122 derives sufficient DC current needed to amplify the low level input signal, while reducing its transconductance for the high level input signal, it reduces the DC current consumption of subsequent current amplification stages. The DC efficiency of the VGA 100 is improved.

The differential output current of the variable transconductance amplifier 227 is coupled to the Gilbert cell attenuator 226. Gilbert cell attenuator 226 changes the current amplitude of the signal applied to the input. This Gilbert cell attenuator 226 has a first pair of BJTs 231 and 234 and a second pair of BJTs 232 and 233. The attenuation level of this Gilbert cell attenuator 226 is established by the control voltage applied to the bias port 110. The Gilbert cell attenuator 226 attenuates the output current of the variable transconductance amplifier 227 when the first pair of BJTs 231 and 234 are biased by a control voltage applied to the bias port 110. The component of the output current of the side transconductance amplifier flows through the first pair of BJTs 231 and 234 rather than through the second pair of BJTs 232 and 233. Thus, the balance current at port 190 of Gilbert cell attenuator 226 is reduced. Both the variable transconductance amplifier 227 and the Gilbert cell attenuator 226 are biased by a common power supply 230.

The preferred embodiment of the FM input stage 121 is similar to the embodiment of the CDMA input stage 122 except that the FET 237 is replaced with a fixed resistance value. As described above, the fixed resistance value of the FM input stage 121 allows compression of an input signal having an input level much lower than that of a CDMA input signal in an industry standard such as IS-95 (that is, VGA is nonlinear). To allow entry), providing a fixed transconductance. Alternatively, the input stage 120 may have only a single fixed transconductance stage, similar to the FM input stage 121. This alternative embodiment is particularly suitable for use as the transmit AGC amplifier 904 of FIG. 1.

As described above, in one aspect of the design, the transconductance of the variable transconductance amplifier 227 is exponential because the control voltage applied to the bias port 130 of the transconductance bias control circuit 140 is linearly adjusted. Is changed. In order to realize this, the channel resistance of the FET 237 is also changed exponentially as the control voltage of the bias port 130 of the transconductance bias control circuit 140 is linearly adjusted. 4 shows one embodiment of a transconductance bias control circuit 140 to facilitate this result. The transconductance bias control circuit 140 includes an exponential function generator 360, first and second operational amplifier circuits 353 and 354, a low pass filter 352, and a current source 341.

The exponential function generator 360 converts the control voltage applied to the bias port 130 into two output currents flowing from the output 358 of the exponential function generator 360 to the first operational amplifier circuit 353. The ratio of the amplitudes of these currents is exponentially proportional to the control voltage. In the exemplary embodiment of FIG. 1, the control voltage is RX gain control or TX gain control, scaled or temperature compensated. The generation of this control voltage is outside the scope of the present invention and is described in US Pat. No. 5,469,115 and the like, which has been described above by reference.

5 illustrates one embodiment of an exponential generator 360. The exponential generator 360 includes a differential amplifier 465 having an output for driving a pair of FET current mirrors 474. The differential amplifier 465 has a parallel pair of BJTs 461 and 462 connected to the current source 472. The pair of FET current mirrors 474 has four FETs 464, 466, 468 and 470. Due to the exponential relationship between the input voltage and the output current of the BJTs 461 and 462, the ratio of their collector currents is proportional to the differential base voltage between the BJTs 461 and 462 determined by the control voltage signal. . Thus, the linear differential voltage change at bias port 130 is converted to exponential (linearly in dB) current at output 358. Current mirror 474 simply accepts the exponential current generated by bipolar differential pairs 461 and 462 to provide it for use in an amplifier. The exponential generator 360 is biased by the power supply 400.

Referring again to FIG. 4, the first and second operational amplifier circuits 353 and 354 work with the exponential generator 360 to adjust the channel resistance of the FET 237 of FIG. 3. The first operational amplifier circuit 353 preferably includes the same master FET 344 as the FET 237, a reference resistor 346, and a differential operational amplifier 348. Output current from exponential generator 360 is coupled to master FET 344 and reference resistor 346. The differential operational amplifier 348 varies the voltage across the drain and source terminals of the master FET 344 and the voltage across the terminals of the reference resistor 346 by varying the bias voltage applied to the gate of the master FET 344. To be the same. The bias voltages applied to the gates of FET 237 and master FET 344 are generally the same. However, the gate bias voltage applied to the FETs 237 through 122 is lowpass filtered to prevent thermal noise from the transconductance bias control circuit 140 from being supplied to the FET 237. Lowpass filtering is performed by a lowpass filter 352 formed by series resistor 350 and shunt capacitor 351.

The second operational amplifier circuit 354 causes the master FET 344 and the FET 237 to have the same source voltage. The second operational amplifier includes a non-inverting single gain operational amplifier 349 and resistors 345 and 347 for sensing the drain-source voltage across the FET 237 through a source connection 228 and a drain connection 229. do.

The current source 341 and the exponential generator 360 connected around the master FET 344 and the reference resistor 346 cause a voltage drop across the reference resistor 346, that is, the voltage across the drain-source of the master FET 344. The drop is designed to be lower than the knee voltage of the FET. As a result, the operation of the operational amplifier circuits 353 and 354 causes the FET 237 and the master FET 344 to operate at similar parallel points in their resistance regions. Thus, the channel resistance of both FET 237 and master FET 344 are generally the same and vary exponentially with the linearly regulated control voltage applied to bias port 130.

6 is a view showing a partial combination of the components of FIGS. 2 and 3 configured to explain the advantages of the present invention. One of the things overcome by the configuration shown in FIG. 6 is the process variation of the channel resistance of the FET 237 as a function of μ _C C _OX and hence the voltage applied to the gate. As described above with reference to FIG. 3, the FET 237 controls the transconductance of the variable transconductance amplifier 227. The variable emitter decay provided by the FET 237 allows the input stage 120 to process a wide range of signals.

Since the attenuation caused by the input stage 120 is critical to the operation of the circuit and the characteristics of the stage are set by the FET 237, it is very important to correctly set the resistance value of the FET 237. Since the channel resistance as a function of the applied gate voltage is difficult to control part by part in the manufacturing process, an external control loop is used for consistency. 6 shows a control loop used to prevent the CDMA input stage 122 from acting as a process variation of the FET 237.

Resistor 346 is an on-chip resistor. These resistors are formed with large values to minimize process variations. Resistor 346 is used as the reference resistance of the control loop.

It is to be noted that the total current from the output 358 of the exponential generator 360 is set by the current source 341. Thus, when the current flowing through one of the balanced outputs of output 358 is increased, the current flowing through the other of the balanced outputs of output 358 is reduced. Note that the voltage drop across the resistor 346 is equal to the voltage drop across the master FET 344. Since each voltage is one of the inputs to the operational amplifier 348, the voltage drop is the same. The output of the operational amplifier 348 controls the resistance value of the master FET 344 so that its voltage drop is the product of the current flowing through the resistor 346 and the resistance value of the resistor 346. Thus, as the current flowing through the resistor 346 increases and the current flowing through the master FET 344 decreases, the voltage drop across the resistor 346 increases. Accordingly, the channel resistance of the master FET 344 must also be increased to maintain the same voltage drop. An output voltage equal to the output voltage of the operational amplifier 348 applied to the gate of the master FET 344 is also applied to the gate of the FET 237. Resistor 350 and capacitor 351 provide a lowpass filter between the output of operational amplifier 348 and the gate voltage of FET 237, but is applied to the gate of master FET 344 and the gate of FET 237. The DC voltage is the same.

In a preferred embodiment, the master FETs 344 and FETs 237 are adjacent to each other on the same substrate. This allows the characteristics of the gate voltage versus channel resistance of the master FET 344 and the FET 237 to be similar to each other even when the process variation in each VGA portion is significant. In this way, the resistance value of the FET 237 is set equal to the resistance value of the master FET 344. As the channel resistance of the FET 237 decreases, the current flowing through the transistors 235 and 236 increases. Thus, the present invention provides a method for accurately implementing variable emitter degeneration of the CDMA input stage 122.

FIG. 7 shows one embodiment of the current amplifiers 160A and 160B shown in FIG. 2. The input of the current amplifier 160 shown in FIG. 7 may be coupled to the output of the input stage 120 or the output of another current amplifier 160. The current amplifier 160 includes a Darlington differential amplifier 510, a cascode differential amplifier 520, and a tail current generator 570. Current amplifier 160 is biased by power supplies 508 and 506 and current sources 596 and 598. Darlington differential amplifier 510 has resistive shunt-series feedback with BJTs 580, 586, 588 and 594 and resistors 582, 584, 590 and 592 in the topology shown in FIG. 7. This provides increased current gain and process variation insensitivity.

In the present invention, the resistive shunt-series feedback provided by the resistors 582, 584, 590 and 592 of the present invention is such that the feedback current flowing through the resistor is equal to the input current flowing through the input port 190. It is worth noting that. Thus, they also provide a current divider, thereby increasing the current gain of the differential Darlington amplifier 510 by the ratio of the feedback resistor.

The cascode differential amplifier 520 provides a translinear loop that provides variable current amplification in accordance with the ratio of the tail current 512 generated by the tail current generator 570. The cascode differential amplifier includes BJTs 500, 502, 504 and 506 at the position of the differential current mirror (translinear loop) to vary the tail current 512 so that the gain of the current amplifier is varied.

The gain of current amplifier 160 is controlled by tail current generator 570. Tail current generator 570 is connected to both Darlington differential amplifier 510 and cascode differential amplifier 520 through differential port 512. The current amplification of each of the current amplifiers 160 may be exponentially changed by using the control current generated by the exponential generator 360 of FIGS. 4 and 5 applied to the control port 150. Tail current generator 570 is biased by power supply 509.

8 shows one embodiment of a tail current generator 861. The tail current generator 570 is a component similar or identical to the exponential generator 360 of FIGS. 4 and 5, and its output is similar or identical to the output 358 of the exponential generator 360. And an exponential function generator 861 to generate. This exponential generator 861 is coupled to a pair of bipolar current mirrors 860. In Figure 8, both circuits are coupled to the power supply 509, but they may be coupled to other power supplies. The pair of bipolar current mirrors 860 includes a first BJT group 822, 824 and 830 and a second BJT group 832, 834 and 840, a first resistor group 826, 828 and 844 and a second resistor group ( 836, 838, and 842). The function of this bipolar current mirror pair is to receive the control current provided by the exponential generator 861 and convert it to the tail current 512.

In one embodiment of the present invention, the exponential generators 360 and 861 are identical components, thus providing a single control current that can be mirrored to the CDMA input stage 122 as well as the current amplifiers 160A and 160B. It has the advantage of being. This embodiment is further improved by reducing the current gain (i.e., DC current consumption in the battery) of the current amplifiers 160A and 160B simultaneously and at the same rate as the transconductance of the CDMA input stage 122 is reduced. Provide DC efficiency. In addition, this circuit configuration ensures that all current amplifications at all stages are exponentially related (linearly in dB) to the control voltage of the AGC amplifier.

Accordingly, the present invention provides a VGA having high dynamic range across both CDMA and FM signals and maximally sharing components in CDMA mode and FM mode. Such a mobile receiver using VGA can detect a signal over a wide input power range. In addition, this VGA consumes minimal DC power. Therefore, this VGA has the advantage that can be used in the mobile communication device to extend the operating life of the battery. Finally, the gain of this VGA can be varied linearly in dB by adjusting the DC control voltage linearly.

The foregoing description of the preferred embodiment is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments are easy for those skilled in the art, and the general principles defined herein may be applied to other embodiments without exhibiting original talent. Accordingly, the present invention should not be limited to the embodiments described herein but should be construed broadly in accordance with the spirit and novel features described.

Claims (11)

An input stage comprising a transconductance amplifier having a variable transconductance; A Gilbert cell attenuator coupled to said transconductance amplifier; A current amplifier coupled to the input stage; And And means for applying a linearly regulated control voltage to the current amplifier to vary the gain of the amplifier exponentially as a function of the applied control voltage. The method of claim 1, The input signal comprises two balance signals, The transconductance amplifier First active device, A current source respectively coupled to the first active device, and And a variable resistor coupled to the first active device and the current source, And each balance signal is supplied to each input of the first active device. The method of claim 2, The attenuator A second active device, and Further comprising a third active device, And the second active device and the third active device are coupled to the first active device. An input stage comprising a transconductance amplifier having a variable transconductance; A transconductance amplifier bias control circuit coupled to the transconductance amplifier; A current amplifier coupled to the input stage; And Means for applying a linearly regulated control voltage to the current amplifier to exponentially change the gain of the amplifier as a function of the applied control voltage, The transconductance bias control circuit is Exponential generator, A first operational amplifier circuit coupled to the exponential function generator, A second operational amplifier circuit coupled to the first operational amplifier circuit, and And a current source coupled to the first operational amplifier circuit. The method of claim 4, wherein The transconductance amplifier bias control circuit further comprises a low pass filter coupled to the first operational amplifier circuit. The method of claim 4, wherein The exponential generator A pair of active devices, A current source coupled to the active device, and And a pair of current mirrors coupled to the active device, respectively. The method of claim 4, wherein The first operational amplifier circuit is Master active device, A reference resistor coupled to the master active device, and Further comprising a differential amplifier having first and second inputs and outputs, The master active device is coupled to the first input and the output of the differential amplifier and the reference resistor is coupled to the second input of the differential amplifier. The method of claim 4, wherein The second operational amplifier circuit A non-inverting single gain amplifier having a first and a second input, A first input resistor coupled to the first input of the non-inverting single gain amplifier, and And a second input resistor coupled to the second input of the non-inverting single gain amplifier. A method of amplifying an input signal in an amplifier having a fixed transconductance input stage and a variable transconductance input stage coupled to a current amplifier via a mode select switch, the method comprising: Applying an input signal to said fixed transconductance input stage and said variable transconductance input stage; And Selectively applying an output of the fixed transconductance input stage or the variable transconductance input stage to the current amplifier in response to all selection signals. The method of claim 9, And applying a control voltage that varies linearly to the amplifier to generate an exponential change corresponding to the current amplitude of the input signal. The method of claim 9, And generating a pair of currents in which the ratio of amplitudes changes exponentially in accordance with the control voltage to change the current amplitude of the input signal.

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