KR20060001344A - A thin film transistor structure and a flat panel display with the same - Google Patents

Abstract

The present invention provides a thin film transistor structure comprising two or more conductive layers different from each other and crossing each other,

At least one of the conductive layers includes a width fluctuation part having a width varying along a length, and the conductive layer having the width fluctuation part has a dummy part at a non-intersection with a neighboring conductive layer. Provide a structure.

In addition, the present invention,

A thin film transistor layer formed on one surface of the substrate;

At least one insulating layer formed over the thin film transistor layer;

And a pixel layer including one or more pixels in electrical communication with the thin film transistor layer through via holes formed in the insulating layer.

The thin film transistor layer may include two or more conductive layers that are different from each other and cross each other, and at least one of the conductive layers may have a width varying part that varies in width along a length thereof.

The conductive layer having the width fluctuation part includes a dummy part at a non-intersection with a neighboring conductive layer.

Description

A thin film transistor structure and a flat panel display with the same

1A is a diagram showing a display area of an organic electroluminescent display device according to the prior art,

FIG. 1B is an enlarged view of a portion “A” of FIG. 1A;

1C is an enlarged view of a portion "B" of FIG. 1A;

FIG. 1D is a partial schematic view of reference numeral “B ′” of FIG. 1C;

1E is a partial cross-sectional view taken along the line "B '" of FIG. 1;

2A is a schematic plan view of an organic electroluminescent display device according to an embodiment of the present invention;

FIG. 2B is a schematic circuit diagram of reference numeral “C” of FIG. 2A;

FIG. 2C is a partial cross sectional view of a portion of "C" in FIG. 2A;

FIG. 2D is a partial plan view showing a modification to a part of FIG. 2C;

FIG. 2E is a partially enlarged view of one pixel of the organic electroluminescent display device according to the embodiment of the present invention; FIG.

<Brief description of symbols for the main parts of the drawings>

110 substrate 120 buffer layer

130 ... first semiconductor active layer 140 ... gate insulating layer

150 ... first gate electrode 160 ... intermediate layer

170 ... first source / drain electrode 180 ... protective layer

230 ... fifth semiconductor active layer 240 ... first scan line

241 ... pile 250 ... fifth gate electrode / second scan line

270 ... fifth source / drain electrode 281 ... via hole

290 ... first electrode layer 292 ... organic electroluminescent part

294 ... pixel opening 300 ... driven power supply line

310 ... driving power line 400 ... second electrode layer

410 ... electrode power supply line 500 ... vertical drive circuit

600 ... horizontal drive circuit 800 ... sealed

The present invention relates to a thin film transistor structure and a flat panel display device having the same, and a thin film transistor structure having a structure capable of preventing or reducing electrostatic destruction due to static electricity and a flat panel display device having the same.

In displaying an image, many kinds of display apparatuses are used. In recent years, various flat panel display apparatuses are used to replace conventional cathode ray tubes, that is, cathode ray tubes (CRTs). Such flat panel display apparatuses may be classified into an emissive type and a non-emissive type according to a light emitting form. Self-luminous display devices include flat CRTs, plasma display panel devices, vacuum fluorescent display devices, field emission display devices, and inorganic / organic electroluminescent display devices. a luminescent display device and the like, and a non-luminescent display device includes a liquid crystal display device. Among them, the organic electroluminescent device is a self-luminous device that does not need a separate light emitting device such as a backlight, and is a flat display device that has been in the spotlight in recent years that low power and high efficiency operation can be performed and blue light can be emitted.

An organic electroluminescent display device utilizes a phenomenon in which electrons and holes injected through a cathode and an anode are recombined to form an exciton in an organic thin film, and light of a specific wavelength is generated by energy from the formed excitons. It is a self-luminous display device. The organic electroluminescent display device can be driven at low voltage, has a light weight, thinness, a wide viewing angle, and a fast response speed.

The organic electroluminescent portion of such an organic electroluminescent display element is composed of a first electrode as an anode formed on a substrate, an organic light emitting portion, and a second electrode as a cathode. The organic light emitting unit includes an organic light emitting layer (EML), in which holes and electrons recombine to form excitons and light is generated. In order to improve the light emission efficiency, holes and electrons should be more smoothly transported to the organic light emitting layer. For this purpose, an electron transport layer (ETL) may be disposed between the cathode and the organic light emitting layer, and a hole transport layer may be disposed between the anode and the organic light emitting layer. A hole transport layer (HTL) may be disposed, and a hole injection layer (HIL) may be disposed between the anode and the hole transport layer, and an electron injection layer (EIL, electron injction) between the cathode and the electron transport layer. layer) may be arranged.

On the other hand, organic electroluminescent display devices are classified into passive matrix (PM) type and passive matrix active matrix (AM) type according to the driving method. In the passive matrix type, the anode and the cathode are simply arranged in columns and rows, respectively, so that the cathode is supplied with a scanning signal from a row driving circuit. At this time, only one row of the plurality of rows is selected. In addition, a data signal is input to each pixel in the column driving circuit. On the other hand, the active matrix type is a thin film transistor (TFT) to control the input signal for each pixel is suitable for processing a large amount of signals are used as a display device for implementing a video.

The active mattress organic electroluminescent display device according to the related art may include defective pixels in the display area due to static electricity generated during manufacturing.

FIG. 1A shows an organic electroluminescent display device having defective pixels indicated by bright spots, FIG. 1B is a partially enlarged view of a normal pixel denoted by a symbol “A” in the display area of FIG. 1A, and FIG. 1C is a view of FIG. It is a partial enlarged view of the bad pixel shown with the reference numeral "B" in the display area of 1a, and FIG.

Each pixel 1a and 1b includes an electroluminescent unit, and includes light emitting thin film transistors Ma and Mb for transmitting an electrical signal from a driving thin film transistor (not shown). The source electrodes of the light emitting thin film transistors Ma and Mb are in electrical communication with a driving thin film transistor (not shown) through the conductive layer 5.

FIG. 1D shows a partially enlarged view of reference numeral “B ′” of FIG. 1C. The conductive layer 5 may intersect with other conductive layers. The conductive layer 5 intersects at least partially with the gate lines 3a and 3b as scan lines and / or scan line extensions, for example for applying electrical signals to other thin film transistors. The gate lines 3a and 3b have a width fluctuation portion Aw, the width of which varies in the longitudinal direction in accordance with the design specification. The gate lines 3a and 3b have an intersection portion (a) with the conductive layer 5. It is arranged to form Ac).

However, in the process of forming the conductive layers, an electrostatic discarge (ESD) is easily induced in the angular portions such as the width fluctuation portion Aw. That is, static electricity is concentrated when the gate lines 3a and 3b as the conductive layer having the width fluctuation portion Aw are disposed at the intersection portion Ac with the adjacent conductive layer as shown in FIGS. 1D and 1E. As a result, the discharge is easily induced, and thus, the insulating layer interposed between these conductive layers is broken, thereby increasing the possibility of a short between the conductive layers. Therefore, as shown in FIGS. 1B and 1C, although the same electrical signal is input to the pixel shown in FIG. 1B and the pixel shown in FIG. 1C, in the case of FIG. 1C, the other conductive layers 3a and 3b are different. An electrical signal different from the desired electrical signal with respect to the input electrical signal due to the short is applied to the thin film transistor Mb, so that the pixel 1b operates with bright spots having a larger emission luminance than the normal pixel 1a.

As such, the short between the conductive layers due to the dielectric breakdown by the static electricity between the conductive layers included in the thin film transistors causes component malfunction, which is particularly fatal for flat panel display devices requiring high uniformity throughout the display area. It causes the problem of poor screen quality.

An object of the present invention is to provide a thin film transistor structure having a structure capable of reducing or preventing occurrence of defects due to electrostatic breakdown between conductive layers and a flat panel display device having the same.

In order to achieve the above object, according to one aspect of the invention,

In the thin film transistor structure comprising two or more conductive layers different from each other and crossing each other,

At least one of the conductive layers has a width varying portion that varies in width along its length, and at least one of the conductive layer having the width varying portion and its neighboring conductive layer has a non-intersecting portion between these conductive layers. Provided is a thin film transistor structure comprising a dummy portion disposed.

According to the thin film transistor structure of the present invention, the conductive layer including the dummy portion may be a conductive layer including the width varying portion.

According to the thin film transistor structure of the present invention, the layer including the dummy part may be the same layer as the gate electrode.

According to the thin film transistor structure of the present invention, the layer including the dummy part may be the same layer as the source / drain electrode.

According to the thin film transistor structure of the present invention, the ratio of the effective width to the effective length of the dummy part extending from the conductive layer including the width fluctuation part may be smaller than the width fluctuation ratio in the width fluctuation part in the decreasing direction.

According to another aspect of the present invention,

A thin film transistor layer formed on one surface of the substrate;

At least one insulating layer formed over the thin film transistor layer;

And a pixel layer including one or more pixels in electrical communication with the thin film transistor layer through via holes formed in the insulating layer.

The thin film transistor layer includes two or more conductive layers that are different from each other and cross each other, and at least one of the conductive layers includes a width fluctuation part having a width varying in length along a length, and the conductive part having the width fluctuation part. At least one of the layer and its neighboring conductive layer provides a flat panel display device characterized in that a dummy portion disposed at a non-intersecting portion between these conductive layers is provided.

According to the flat panel display device of the present invention, the conductive layer including the dummy part may be a conductive layer including the width varying part.

According to the flat panel display of the present invention, the conductive layer including the dummy part may be the same layer as the gate electrode.

According to the flat panel display device of the present invention, the conductive layer including the dummy part may be the same layer as the source / drain electrode.

According to the flat panel display device of the present invention, the ratio of the effective width to the effective length of the dummy portion extending from the conductive layer including the width varying portion may be smaller than the width variation ratio in the width varying portion in the decreasing direction.

According to the flat panel display device of the present invention, the pixel layer may include a first electrode layer, a second electrode layer, and an electroluminescent part interposed therebetween.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A is a schematic plan view of an organic electroluminescent display device as an example of a flat panel display device according to an embodiment of the present invention.

On one surface of the substrate 110 is applied along the outside of the display area 200, the display area 200, where the light emitting device such as an organic electroluminescent display device is disposed, the sealing substrate (not shown) as the substrate 110 and the sealing member And a sealing portion 800 for sealing the portion, and a terminal region 700 having various terminals disposed thereon, which is one example for describing the present invention. The present invention is not limited thereto, and a sealing layer as a sealing member may be provided. Various variations are possible.

A driving power supply line 300 for supplying driving power to the display area 200 is disposed between the display area 200 and the sealing part 800. 2A is an example of the present invention, but the arrangement of the driving power supply line is not limited thereto, but the driving power supply line 300 may be improved by supplying uniform driving power throughout the display area. Is preferably formed to surround the display area.

The driving power supply line 300 is connected to the driving power line 310, and the driving power line 310 is disposed across the display area 200 and is disposed under the protective layer 180 (see FIG. 2C). And in electrical communication with 170a (see FIG. 2C).

In addition, the vertical / horizontal driving circuit units 500 and 600 are disposed outside the display area 200. The vertical driving circuit part 500 may be a scan driving circuit part for applying a scan signal to the display area 200, and the horizontal driving circuit part 600 may be a data driving circuit part for applying a data signal to the display area 200. In some cases, they may be disposed outside the sealing area in the form of an external IC or COG.

On the other hand, outside the display area 200, an electrode power supply line 410 for supplying electrode power to the display area 200 is disposed, which is formed on the display area 200, for example, a second surface formed Electrical communication is achieved through an electrode layer and via holes 430 such as an insulating layer formed therebetween.

The driving power supply line 300, the electrode power supply line 410, the horizontal / vertical driving circuit units 500, 600, and the like are connected to the terminals 320, 420, 520, and 620 for the respective components through wirings. Consists of, and makes electrical communication with the terminal portion 700 disposed outside the sealing area.

One pixel constituting the display area 200 will be described with reference to FIGS. 2B and 2C. FIG. 2B schematically shows a circuit diagram of one pixel (n rows m columns) of the display area with a thin film transistor layer (thin film transistor structure) and a pixel layer, indicated by reference numeral “C” in FIG. 2A. The organic electroluminescent device according to an embodiment of the present invention includes five transistors and two capacitors in the thin film transistor layer, and each thin film transistor is illustrated as a PMOS type thin film transistor, but this is an example for explaining the present invention. The present invention is not limited thereto.

In the display area 200 (refer to FIG. 2A), a first scan signal is input from the vertical driving circuit unit 500 through a plurality of first scan lines and a second scan signal is input through the plurality of second scan lines. In the n-row m-column denoted by reference numeral "C", the first scan signal S [n], S [n-1] and the second scan signal E [through the first scan line and the second scan line. n]) is input, and a data voltage Vdata [m] as a data signal is input through the data line.

The first thin film transistor M1 applies a current as an electrical signal to the organic EL device in response to a data voltage applied through the second thin film transistor M2.

The second thin film transistor M2 switches the data voltage Vdata applied to the data line in response to the n-th selection signal S [n] applied to the first scan line.

The third thin film transistor M3 diode-connects the first thin film transistor M1 in response to an n−1 th selection signal S [n−1] applied to the first scan line.

The fourth thin film transistor M4 applies a constant voltage to one terminal of the first capacitor C1 in response to the n−1 th select signal S [n−1] applied to the first scan line.

The fifth thin film transistor M5 transfers the current supplied from the first thin film transistor M1 to the electroluminescent portion of the organic light emitting diode in response to the light emission signal E [n] applied to the second scan line.

The first capacitor C1 maintains at least a part of the voltage between the gate and the source of the first thin film transistor for a set frame time, and the second capacitor C2 stores the data voltage having the compensation of the threshold voltage. To the gate of M1).

The organic EL device having the thin film transistor layer and the pixel layer operates as follows. The third thin film transistor M3 is turned on by the n-1th selection signal S [n-1], so that the first thin film transistor M1 as the driving thin film transistor is brought into a diode connection state, and the fifth thin film transistor. M5 is turned off so that the threshold voltage of the first thin film transistor M1 is stored in the capacitor C2.

The third thin film transistor M3 is turned off through the n-1 th select signal S [n-1], and the first thin film transistor M1 is turned on through the n th select signal S [n]. After the data voltage is applied, a data voltage having a compensated threshold voltage is applied to the gate of the first thin film transistor M1.

At this time, when the fifth thin film transistor M5 is turned on through the nth light emission signal E [n], the current signal adjusted by the voltage applied to the gate of the first thin film transistor M1 is changed to the fifth. The light is emitted by the organic light emitting diode through the thin film transistor M5.

Meanwhile, a pixel layer R _p and a thin film transistor layer R _T according to the present invention, that is, a first thin film transistor M1 as a driving thin film transistor, a pixel layer including an organic electroluminescent unit, and an electric signal is applied thereto. A partial cross-sectional view of an organic electroluminescent display device including a fifth thin film transistor M5 as a switching thin film transistor is shown in FIG. 2C.

A thin film transistor layer, such as the first thin film transistor M1, is formed on one surface of the substrate 110. The semiconductor active layer 130 of the first thin film transistor M1 is formed on the buffer layer 120 formed on one surface of the substrate 110. The semiconductor active layer 130 may be composed of an amorphous silicon layer or may be composed of a polycrystalline silicon layer. Although not shown in detail in the drawing, the semiconductor active layer 130 includes a source and a drain region doped with N + or P + type dopants and a channel region. The thin film transistor including the semiconductor active layer 130 may be formed of an organic semiconductor. Various configurations are possible, such as can be made.

The gate electrode 150 of the first thin film transistor is disposed on the semiconductor active layer 130. The gate electrode 150 may be formed in consideration of adhesion to an adjacent layer, surface planarity and processability of the stacked layer, and the like. It is preferably formed of a material such as MoW, Al-based, etc., but is not limited thereto.

A gate insulating layer 140 is disposed between the gate electrode 150 and the semiconductor active layer 130 to insulate them. An interlayer 160 as an insulating layer is formed on the gate electrode 150 and the gate insulating layer 140 as a single layer and / or a plurality of layers, and the source / drain of the first thin film transistor M1 is formed thereon. The electrodes 170a and b are formed, and the source / drain electrodes 170a and b may be formed of a metal such as MoW and the like, and may be formed later to achieve smoother ohmic contact with the semiconductor active layer 130. It may be heat treated.

A protective layer 180 is formed on top of the source / drain electrodes 170a and b as an insulating layer, which may be composed of a passivation layer and / or a planarization layer for protecting and / or planarizing the underlying layer. As shown in FIG. 2C, the protective layer 180 according to an embodiment of the present invention may be formed as a single layer using an inorganic material such as SiNx, or may be composed of an organic material layer such as BCB (benzocyclobutene) or acrylic. In some cases, a variety of configurations are possible, such as being formed of a plurality of layers.

The first thin film transistor M1 is in electrical communication with the fifth thin film transistor M5 as the switching thin film transistor through the extension 170c of the drain electrode 170b. The fifth semiconductor active layer 230 of the fifth thin film transistor M5 is formed on one surface of the substrate 110 on which the buffer layer 120 is formed. The fifth semiconductor active layer 230 is insulated from the fifth gate electrode 250 formed thereon through the gate insulating layer 140. The intermediate layer 160 as an insulating layer and the fifth source / drain electrodes 270a and b are formed on one surface of the fifth gate electrode 250, and the fifth source / drain electrodes 270a and b and the fifth semiconductor active layer are formed. 230 performs electrical communication through contact holes formed in the intermediate layer 160 and the gate insulating layer 140. At least one passivation layer 180 as an insulating layer is formed on the fifth source / drain electrodes 270a and b, and the first electrode layer 290, the second electrode layer 400, and the passivation layer 180 are formed on the passivation layer 180. A pixel layer including the electroluminescent unit 292 disposed therebetween is formed, and the formation process of the pixel layer is as follows.

First, after the first electrode layer 290 is formed, the pixel defining layer 291 is formed on the passivation layer 280b except for the pixel opening 294. An organic electroluminescent unit 292 including a light emitting layer may be disposed on one surface of the first electrode layer 290 through the pixel opening 294, and a second electrode layer 400 may be formed on the entire surface thereof.

The organic electroluminescent unit 292 may be formed of a low molecular or polymer organic film. When the low molecular organic film is used, a hole injection layer (HIL), a hole transport layer (HTL), and an organic light emitting layer (EML) An emission layer, an electron transport layer (ETL), and an electron injection layer (EIL) may be formed by stacking a single or a complex structure, and the usable organic material may be copper phthalocyanine (CuPc: copper). phthalocyanine), N, N-di (naphthalen-1-yl) -N, N'-diphenyl-benzidine (N, N'-Di (naphthalene-1-yl) -N, N'-diphenyl-benzidine: NPB A variety of materials can be applied, including tris-8-hydroxyquinoline aluminum (Alq3). These low molecular weight organic films are formed by the vacuum deposition method.

In the case of the polymer organic film, the structure may include a hole transporting layer (HTL) and an organic light emitting layer (EML). In this case, PEDOT is used as the hole transporting layer, and polyvinylvinylene (PPV) and polyflu as the light emitting layer. Polymeric organic materials such as orene (Polyfluorene) are used, and various configurations are possible, such as being formed by screen printing or inkjet printing.

The second electrode layer 400 as a cathode is deposited on the entire surface of one surface of the organic light emitting unit 292, and the second electrode layer 400 is not limited to this type of front deposition, and depending on the type, Al / Ca, It may be formed of a material such as ITO, Mg-Ag, or the like, may be formed of a plurality of layers instead of a single layer, and may be further provided with an alkali or alkaline earth metal fluoride layer such as LiF. Can be.

Meanwhile, a first scan line and / or a scan line extension 240 is formed between the first thin film transistor M1 and the fifth thin film transistor M5, and the first scan line 240 is the first thin film transistor M1. The layer is formed to cross the drain electrode 170b extension portion 170c of FIG. The first scan line 240 is a conductive layer through which the n−1 th selection signal S [n−1] is transmitted, and n is applied to the third and fourth thin film transistors M3 and M4 as shown in FIG. 2B. Since the design specifications of the respective thin film transistors are different from each other, the first scan line 240 may have a width fluctuation portion Aw that varies in width along the length direction. It is provided. That is, as shown in a partial plan view in FIG. 2C, an intersection portion (AC) intersecting the extension portion 170c at least partially with a different layer may be provided under the extension portion 170c extending from the drain electrode 170b. A first scan line 240 as a conductive layer is provided, and the first scan line 240 has a width fluctuation part having a width of a first width Wc and a second width Ww which are different from each other along the length direction. (Aw) is provided.

At the same time, a dummy portion 241 is provided at the non-intersecting portion of the conductive layer 240 having the width fluctuation portion Aw with the adjacent conductive layer 170c. The charge causing the static electricity is not concentrated in the width fluctuation part Aw, but is concentrated in the dummy part 241, so that electrostatic breakage due to static discharge is not generated in the width fluctuation part Aw.

On the other hand, the ratio of the effective width Ws to the effective length Wd of the dummy part 241 extending from the first scan line 240 is such that the static electricity can be more easily concentrated in the dummy part 241. It is preferable to have a value smaller than the width fluctuation ratio (Ww / Wc) in the back. That is, it is preferable to have a relationship such as Ws / Wd < Ww / Wc <

In the above embodiment, the conductive layer including the dummy part is described with respect to the first scan line 240 that operates as a gate electrode or a gate line, but this is only an example for describing the present invention, and the present invention is not limited thereto.

That is, in FIG. 2C, one dummy part is formed on the first scan line (or an extended conductive layer thereof) toward the first thin film transistor M1, but the conductive layer including the dummy part may be formed on the same layer as the source / drain electrode. As shown in FIG. 2D, two or more dummy parts may be formed, or may be formed in a direction opposite to the first thin film transistor M1. Various modifications are possible in the range to be formed.

A plan view of the partial layout of the organic electroluminescent portion of FIG. 2C is shown in FIG. 2E, in which one conductive layer having a width varying portion includes a dummy portion at a non-intersecting portion with a neighboring conductive layer, so that the electrostatic discharge is wide. By generating on the dummy part side that does not occur in the fluctuation part and other conductive layers are not interposed, the conductive layers of the thin film transistor layer prevent electrostatic destruction due to static electricity, thereby preventing short circuits between adjacent conductive layers, thereby generating defective pixels. Can be reduced or prevented.

The above embodiments are examples for describing the present invention, but the present invention is not limited thereto. That is, the above embodiments have been described with respect to a thin film transistor having a top gate type 5 transistor 2 capacitor and an organic electroluminescent display device having the same, but any conductive layer having a width fluctuation portion is formed at a non-intersecting portion with a neighboring conductive layer. In the range including the dummy portion, the number of transistors and capacitors provided, and can be sufficiently applied to the inorganic electroluminescent display device and / or liquid crystal display device irrespective of the type of the transistor, such as a variety of configurations including the configuration of the present invention Variants may be considered.

The present invention as described above has the following effects.

First, a non-intersecting portion of a conductive layer and a neighboring conductive layer, which is provided in one or more thin film transistors and includes a width fluctuation portion, and at least one of the conductive layers is provided with a dummy portion, thereby generating in a manufacturing and / or operation process. By preventing and / or reducing the insulating layer damage between the conductive layers due to possible static electricity, it is possible to prevent product defects due to electrostatic destruction.

Secondly, in a flat panel display device such as an organic electroluminescent display device having a thin film transistor layer, the thin film transistor layer includes two or more conductive layers, and at least one of any conductive layer and neighboring conductive layers having a width variable portion. The dummy part disposed in the dummy part may be disposed at a non-intersecting portion between the conductive layer including the width fluctuation part and the neighboring conductive layer, thereby preventing the generation of defective pixels due to electrostatic destruction, thereby increasing the screen quality.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Could be. Therefore, the true scope of protection of the present invention should be defined only by the appended claims.

Claims (11)

In the thin film transistor structure comprising two or more conductive layers different from each other and crossing each other, At least one of the conductive layers has a width varying portion that varies in width along its length, and at least one of the conductive layer having the width varying portion and its neighboring conductive layer has a non-intersecting portion between these conductive layers. The thin film transistor structure, characterized in that the dummy portion disposed. The method of claim 1, The conductive layer having the dummy portion is a thin film transistor structure, characterized in that the conductive layer having the width fluctuation portion. The method of claim 1, The layer having the dummy part is the same layer as the gate electrode. The method of claim 1, And the layer including the dummy part is the same layer as the source / drain electrode. The method of claim 1, The ratio of the effective width to the effective length of the dummy portion extending from the conductive layer including the width fluctuation portion is smaller than the width fluctuation ratio in the width fluctuation portion in the decreasing direction. A thin film transistor layer formed on one surface of the substrate; At least one insulating layer formed over the thin film transistor layer; And a pixel layer including one or more pixels in electrical communication with the thin film transistor layer through via holes formed in the insulating layer. The thin film transistor layer includes two or more conductive layers that are different from each other and cross each other, and at least one of the conductive layers includes a width fluctuation part having a width varying in length along a length, and the conductive part having the width fluctuation part. And at least one of the layer and its adjacent conductive layer is provided with a dummy portion disposed at a non-intersecting portion between the conductive layers. The method of claim 6, The conductive layer having the dummy portion is a thin film transistor structure, characterized in that the conductive layer having the width fluctuation portion. The method of claim 6, And the conductive layer having the dummy portion is the same layer as the gate electrode. The method of claim 6, And the conductive layer including the dummy part is the same layer as the source / drain electrode. The method of claim 6, And a ratio of the effective width to the effective length of the dummy part extending from the conductive layer including the width fluctuation part is smaller than the width fluctuation ratio in the width fluctuation part in the decreasing direction. The method of claim 6, And the pixel layer includes a first electrode layer, a second electrode layer, and an electroluminescent part interposed therebetween.

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