CN104051384B - Method and apparatus for packaging a semiconductor device - Google Patents

Method and apparatus for packaging a semiconductor device Download PDF

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CN104051384B
CN104051384B CN 201310359548 CN201310359548A CN104051384B CN 104051384 B CN104051384 B CN 104051384B CN 201310359548 CN201310359548 CN 201310359548 CN 201310359548 A CN201310359548 A CN 201310359548A CN 104051384 B CN104051384 B CN 104051384B
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layer
conductive layer
photoresist pattern
forming
opening
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CN 201310359548
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Chinese (zh)
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CN104051384A (en )
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吕俊麟
陈宪伟
吴凯强
郭宏瑞
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台湾积体电路制造股份有限公司
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view

Abstract

本发明公开了在封装器件的再分布层(RDL)处减小应力集中的方法和装置。 The present invention discloses a method and apparatus reduce stress concentrations in the redistribution layer package component (the RDL) at. 封装器件可以包括位于钝化层上方的晶种层,以覆盖钝化层的开口,且覆盖接触焊盘并与接触焊盘接触。 Packaged device may include a seed layer over the passivation layer, the passivation layer to cover the opening, and covers the contact pads and the contact with the contact pad. 在钝化层上方形成RDL,RDL位于晶种层上方且与晶种层接触,以覆盖钝化层的开口,且通过晶种层电连接至接触焊盘。 RDL is formed over the passivation layer, the seed layer RDL positioned above and in contact with the seed layer, the passivation layer to cover the opening, and electrically connected to the contact pads by the seed layer. RDL具有包含非直角的平滑表面的端部。 RDL having an end comprising a non-perpendicular to a smooth surface. RDL的端部表面可以具有钝角或曲面。 RDL end surface may have an obtuse angle or a curved surface.

Description

半导体器件的封装方法和装置 Method and apparatus for packaging a semiconductor device

[0001] 相关申请的交叉引用 CROSS [0001] REFERENCE TO RELATED APPLICATIONS

[0002] 本申请要求于2013年3月13日提交的标题为“Methods and Apparatus of Packaging Semiconductor Devices”的美国临时专利申请第61/779,663号的优先权,其全部内容结合于此作为参考。 The title U.S. Provisional Patent [0002] This application claims the March 13, 2013 entitled "Methods and Apparatus of Packaging Semiconductor Devices" priority to Application No. 61 / 779,663 No., which is incorporated herein by reference.

技术领域 FIELD

[0003] 本发明涉及半导体领域,更具体地,涉及半导体器件的封装方法和装置。 [0003] The present invention relates to the field of semiconductors, and more particularly, to a method and apparatus for packaging semiconductor devices.

背景技术 Background technique

[0004] 半导体器件用于各种应用,诸如个人计算机、移动电话、数码相机和其他电子设备。 [0004] Semiconductor devices are used in various applications, such as personal computers, mobile phones, digital cameras and other electronic devices. 半导体器件可以分成由器件(诸如集成电路(IC)管芯、封装件、印刷电路板(PCB)和系统)所组成的简单的分级结构。 The semiconductor device can be divided into a hierarchical structure by a simple devices (such as integrated circuits (IC) die, package, a printed circuit board (PCB), and systems) thereof. 封装件是介于IC管芯和PCB之间的接口。 The package is between the interface between the IC die and the PCB. IC管芯由诸如硅的半导体材料制成。 IC die made of semiconductor material such as silicon. 然后,将管芯组装成封装件。 Then, the die is assembled into a package. 然后,将封装管芯直接附接至PCB或另一衬底,从而被定义为第二级封装。 Then, the packaged die is directly attached to a PCB or another substrate so as to be defined as a second level package.

[0005] 通过最小部件尺寸的不断减小允许更多的组件集成到给定区内,半导体工业不断改善各种电部件(诸如晶体管、二极管、电阻器、电容器等)的集成密度。 [0005] allowing more components integrated into a given area, the semiconductor industry is constantly improving the various electrical components (such as transistors, diodes, resistors, capacitors, etc.) by the integration density of the minimum feature size continues to decrease. 与过去的封装件相比,这些较小的电部件也需要利用较少面积的较小的封装件。 Compared with the packages of the past, these smaller electrical components also require less package with a smaller area. 用于半导体器件的一些较小类型的封装件包括方平包装件(QFP)、针栅阵列(PGA)、球栅阵列(BGA)、倒装芯片(FC)、三维集成电路(3DIC)、晶圆级封装件(WLP)、晶圆级芯片尺寸封装件(WLCSP)以及叠层封装(PoP) 器件。 Some of the smaller type package for a semiconductor device package comprising a flat side (QFP), pin grid array (PGA), ball grid array (BGA), flip chip (FC), a three-dimensional integrated circuits (3DIC), Crystal circle level package (WLP), wafer level chip size package (the WLCSP) and the package on package (PoP) device.

[0006] 在典型制造工艺中,可以在衬底内制造有源器件和无源器件,且通过诸如形成在金属化层和介电层上的金属接触件的互联结构来连接有源器件和无源器件。 [0006] In a typical manufacturing process, may be manufactured in the substrate of active and passive devices and active devices are connected through the Internet, such as a metal contact structure is formed on the metal layer and the dielectric layer and free source device. 在金属化层上方形成接触焊盘以制造到封装件的连接。 Contact pads formed over the metal layer to fabricate a connection to the package. 通常,可以将再分布层(RDL)或钝化后互连件(PPI)用于连接接触焊盘的布线,然后,形成连接至RDL的UBM焊盘,以及在UBM焊盘上形成焊球以建立芯片(诸如输入/输出焊盘)的接触焊盘和封装件的衬底或引线框之间的电接触件。 After Generally, the redistribution layer (RDL) or passivation interconnect (PPI) for connecting the contact pads of the wiring, and then, a connection to the RDL UBM pads, and a solder ball is formed on the UBM pad to establishing electrical contact between the chip (such as an input / output pads) and the contact pads of the package substrate or leadframe.

[0007] 发现通过典型制造工艺所生产的封装结构具有由RDL处的应力集中所导致的钝化层分层的问题。 [0007] found that produced by a typical manufacturing process of a package structure has a problem passivation layer delamination stress concentration caused at the RDL. 需要减小RDL处的应力集中的方法和装置以解决封装件的钝化层分层问题。 A method and apparatus necessary to reduce the stress concentration at the RDL to solve the delamination problem of the passivation layer of the package.

发明内容 SUMMARY

[0008] 为解决上述问题,本发明提供了一种封装器件,包括:接触焊盘,位于衬底的表面上;介电层,位于衬底的表面上方,具有露出接触焊盘的开口;以及导电层,位于介电层上方,覆盖介电层的开口,且电连接至接触焊盘,其中,导电层包括晶种层且具有包含顶面和侧壁的端部,侧壁以非直角远离衬底进行延伸,并且侧壁与顶面以非直角交叉。 [0008] In order to solve the above problems, the present invention provides a packaging device, comprising: a contact pad located on the substrate surface; a dielectric layer over the surface of the substrate, having an opening exposing the contact pads; and a conductive layer located over the dielectric layer, the dielectric layer covering the opening, and electrically connected to the contact pad, wherein the seed layer comprises a conductive layer and having an end portion comprising a top surface and a sidewall, the sidewall away from the non-right angle substrate is extended, and the top surface of the side wall in a non-right angle.

[0009] 其中,导电层的端部的顶面具有钝角或曲面。 [0009] wherein the end portion of the top surface of the conductive layer having an obtuse angle or a curved surface.

[0010] 其中,导电层的端部为阶梯形,且导电层的端部的顶面具有钝角或曲面。 [0010] wherein the end portion of the conductive layer is stepped, and the top surface of the end portion of the conductive layer having an obtuse angle or a curved surface.

[0011] 其中,导电层是基本共形层,导电层位于介电层上方的部分的厚度基本上等于导电层位于介电层的开口内的厚度。 [0011] wherein the conductive layer is substantially conformal layer, the thickness of the conductive layer located over the dielectric layer portion is substantially equal to the thickness of the conductive layer within the opening of the dielectric layer.

[0012] 其中,导电层包括选自基本由Ti、Al、Ni、钒化镍(NiV)、Cu、Cu合金和它们的组合所组成的组的导电材料。 [0012] wherein the conductive layer comprises a substantially conductive material selected from the group Ti, Al, Ni, a nickel vanadium (NiV), Cu, Cu alloys thereof, and combinations thereof.

[0013]其中,介电层的厚度大于约5μηι。 [0013] wherein the thickness of the dielectric layer is greater than about 5μηι.

[00Μ]其中,导电层的端部的顶面的钝角介于约91°至约120°的范围内。 [00Μ] wherein the top surface of the obtuse end portion of the conductive layer ranges from about 91 ° to about 120 °.

[0015] 该器件进一步包括:第二绝缘层,位于导电层上方,第二绝缘层具有露出导电层的开口;以及凸块下金属化(UBM)焊盘,形成在第二绝缘层的开口内且与导电层接触。 [0015] The device further comprising: a second insulating layer over the conductive layer, a second insulating layer having an opening to expose the conductive layer; and under bump metallization (UBM) pad is formed within the opening in the second insulating layer and in contact with the conductive layer.

[0016] 此外,还提供了一种用于形成封装器件的方法,包括:提供衬底,在衬底的表面上具有接触焊盘;在衬底的表面上形成介电层,介电层具有露出接触焊盘的开口;在介电层上方形成晶种层,以覆盖介电层的开口,覆盖接触焊盘且与接触焊盘接触;在晶种层上方形成光刻胶层,光刻胶层具有包括光敏化合物(PAC)的光刻胶材料;在晶种层上方形成覆盖晶种层的两端的光刻胶图案;在未被位于晶种层上方且与晶种层接触的光刻胶图案覆盖的区域中形成导电层,以覆盖介电层的开口,并通过晶种层电连接至接触焊盘,其中,导电层具有紧邻光刻胶图案的端部,并且导电层的端部具有非直角的平滑顶面;以及去除光刻胶图案。 [0016] Further, a method is provided for forming a package device, comprising: providing a substrate having contact pads on a surface of the substrate; forming a dielectric layer on a surface of the substrate, a dielectric layer having exposing the contact pad openings; forming a seed layer over the dielectric layer to cover the opening of the dielectric layer covering the contact pad and contact with the contact pad; forming a photoresist layer over the seed layer, the photoresist having a layer of photoresist material comprises a photosensitive compound (PAC); forming a resist pattern covering both ends of the seed layer over the seed layer; photoresist over the seed layer not located on and in contact with the seed layer a pattern formation region covered conductive layer to cover the opening of the dielectric layer, and electrically connected through the seed layer to the contact pads, wherein the conductive layer having a proximate end portion of the photoresist pattern, and the end portion of the conductive layer has smooth non-rectangular top surface; and removing the photoresist pattern.

[0017] 其中:在晶种层上方形成光刻胶图案的步骤包括形成具有包含锐角的表面的光刻胶图案;以及在未被光刻胶图案覆盖的区域中形成导电层的步骤包括紧邻光刻胶图案形成具有端部的导电层,导电层的端部具有包含钝角的顶面。 [0017] wherein: the step of forming a photoresist pattern over the seed layer comprises forming a photoresist pattern comprising a surface having an acute angle; and a step of forming a conductive layer in areas not covered by the photoresist pattern comprises a light proximate patterning engraved rubber conductive layer having an end portion, the end portion of the conductive layer having a top surface including an obtuse angle.

[0018] 其中:在晶种层上方形成光刻胶图案的步骤包括:在晶种层上方形成第一光刻胶图案;在晶种层上方形成第二光刻胶图案,且第二光刻胶图案被第一光刻胶图案环绕,其中,第二光刻胶图案的表面低于第一光刻胶图案的表面;形成连接至第一光刻胶图案并位于第二光刻胶图案上方的第三光刻胶图案;以及去除第二光刻胶图案,同时保持第一光刻胶图案及第三光刻胶图案完整;并且在未被光刻胶图案覆盖的区域中形成导电层的步骤包括:形成导电层的第一部分,以填充未被位于晶种层上方且与晶种层接触的第一光刻胶图案覆盖的区域,覆盖介电层的开口,且通过晶种层电连接至接触焊盘;以及在导电层的第一部分上方形成导电层的第二部分,以填充未被第三光刻胶图案覆盖的区域,导电层的第二部分具有紧邻第三光刻胶图案的端部,且端部具有包含 [0018] wherein: the step of forming a photoresist pattern over the seed layer comprises: forming a seed layer over the first photoresist pattern; second photoresist pattern is formed over the seed layer, and a second lithography glue pattern is surrounded by the first photoresist pattern, wherein the surface of the second resist pattern is lower than the surface of the first photoresist pattern; forming a second photoresist over the first photoresist pattern and connected to the patterned a third photoresist pattern; and removing the second photoresist pattern, while maintaining the first photoresist pattern and the full third photoresist pattern; and forming a conductive layer in areas not covered by the photoresist pattern comprising the step of: forming a first portion of the conductive layer to fill the first photoresist pattern is not located in the region above the seed layer and in contact with the seed layer cover covering the opening of the dielectric layer and the seed layer are electrically connected by to the contact pads; and a second portion of the conductive layer is formed over the first portion of the conductive layer to fill the regions not covered by the third photoresist pattern, the second conductive layer having a proximate portion of the third photoresist pattern end and having an end portion comprising 直角的平滑顶面。 Smooth top surface at right angles.

[0019] 该方法进一步包括:在介电层和晶种层之间形成第一绝缘层。 [0019] The method further comprising: forming a first insulating layer between the dielectric layer and the seed layer.

[0020] 该方法进一步包括:在去除光刻胶图案的步骤之后,在导电层上方形成第二绝缘层;形成第二绝缘层的开口,以露出导电层;以及形成位于第二绝缘层的开口内且与导电层接触的凸块下金属化(UBM)焊盘。 [0020] The method further comprising: after the step of removing the photoresist pattern, forming a second insulating layer over the conductive layer; forming the opening of the second insulating layer to expose the conductive layer; and forming an opening in the second insulating layer metallization (UBM) pad and the bump contacts with the conductive layer.

[0021] 其中,在介电层上方形成晶种层的步骤包括:使用选自基本包括Cu、Ti、TiN、Ta、 下&10、011、11和它们的组合所组成的组中的导电材料来形成晶种层。 [0021] wherein the step of forming a seed layer over the dielectric layer comprising: a base comprising selected from Cu, Ti, TiN, Ta, the & amp; 10,011,11, and combinations thereof group consisting of electrically conductive forming a seed layer material.

[0022] 其中,形成导电层的步骤包括:使用选自基本包括1^)1、附、钒化镍(附¥)、〇1、〇1 合金和它们的组合所组成的组中的导电材料来形成导电层。 Step [0022] wherein forming the conductive layer comprises: a group of a conductive material, attached to, vanadium, nickel (¥ attached), 〇1, 〇1 alloys and combinations thereof are selected from the group consisting of substantially comprises using ^ 1) to form the conductive layer.

[0023] 此外,还提供了一种封装器件,包括:接触焊盘,位于衬底的表面上;介电层,位于衬底的表面上方,具有露出接触焊盘的第一开口;第一绝缘层,位于介电层上方且与介电层接触,填充第一开口的部分且具有第二开口以露出接触焊盘;以及导电层,位于第一绝缘层上方,且电连接至第二开口内的接触焊盘,导电层包括晶种层且具有包含顶面和侧壁的第一端部,顶面和侧壁之间的角度大于90度,并且侧壁以非90度的角度远离衬底进行延伸。 [0023] Further, there is provided a packaging device, comprising: a contact pad located on the surface of the substrate; a dielectric layer over the surface of the substrate, having a first opening exposing the contact pad; a first insulating layer located over the dielectric layer and in contact with the dielectric layer, fill the first opening portion and having a second opening to expose the contact pads; and a conductive layer over the first insulating layer, and electrically connected to the second opening contact pads, the conductive layer comprises a seed layer and having a first end portion comprising a top surface and a sidewall, the angle between the top surface and the side wall is greater than 90 degrees, and the side walls at an angle other than 90 degrees away from the substrate extends.

[0024] 其中,导电层具有包含曲面顶面的第二端部。 [0024] wherein the conductive layer has a second end portion comprising a curved top surface.

[0025] 该器件进一步包括:第二绝缘层,位于导电层上方,其中,第二绝缘层具有露出导电层的开口;以及凸块下金属化(UBM)焊盘,形成在第二绝缘层的开口内且与导电层接触。 [0025] The device further comprising: a second insulating layer over the conductive layer, wherein the second insulating layer having an opening to expose the conductive layer; and under bump metallization (UBM) pad is formed on the second insulating layer and in contact with the conductive layer within the opening.

[0026] 其中,导电层的第一端部包括位于介电层上方的第一部分、位于第一部分上方的第二部分,且导电层的端部的第二部分的顶面具有钝角或曲面。 [0026] wherein the first end portion includes a first conductive layer over the dielectric layer portion, a second portion located above the first portion and the second portion of the top surface of the end portion of the conductive layer having an obtuse angle or a curved surface.

[0027] 其中,导电层为基本共形层,导电层位于第一绝缘层上方的部分的厚度基本上等于导电层位于第二开口内的厚度。 [0027] wherein the conductive layer is substantially conformal layer, the thickness of the conductive layer located above the first portion of the insulating layer is substantially equal to the thickness of the conductive layer is positioned within the second opening.

附图说明 BRIEF DESCRIPTION

[0028] 为了更全面地理解本发明及其优点,现将结合附图所进行的以下描述作为参考, 其中: [0028] For a more complete understanding of the present invention and the advantages thereof, the following description now taken in conjunction with the accompanying drawings, wherein:

[0029] 图I (a)至图I (d)示出了根据一些实施例的半导体封装器件的截面图; [0029] FIG I (a) through I (d) shows some cross-sectional view of the semiconductor package device according to the embodiment;

[0030] 图2 (a)至图2 (e)示出了根据一些实施例形成半导体封装器件的工艺的截面图;以及 [0030] FIG. 2 (a) to 2 (e) shows a sectional view of a process for forming a semiconductor device package in accordance with some embodiments; and

[0031] 图3 (a)至图3 (h)示出了根据一些实施例形成半导体封装器件的另一个工艺的截面图。 [0031] FIG. 3 (a) to 3 (h) shows a sectional view of another process for forming a semiconductor device package in accordance with some embodiments.

[0032] 除非另有说明,否则不同附图中的相应数字和标号通常表示相应的部件。 [0032] Unless indicated otherwise, the respective numerals and symbols in the different figures generally refer to corresponding parts. 绘制附图以清晰地优选实施例的相关方面,并且不必按比例绘制。 The figures are drawn to clearly related aspect of a preferred embodiment of the embodiment, and are not necessarily drawn to scale.

具体实施方式 Detailed ways

[0033] 下面,详细讨论本发明的实施例的制造和使用。 [0033] Next, a detailed discussion of the manufacture and use embodiments of the present invention. 然而,应该理解,本发明的实施例提供了许多可以在各种具体环境中实现的可应用的概念。 However, it should be understood that embodiments of the present invention provides many applicable concepts may be implemented in a wide variety of specific contexts. 所讨论的具体实施例仅仅示出了制造和使用本发明的具体方式,而不用于限制本发明的范围 The specific embodiments discussed are merely illustrative of specific ways to make and use the present invention and are not intended to limit the scope of the invention

[0034] 本发明公开了用于减小封装器件的再分布层(RDL)处的应力集中以及减小封装件的钝化层分层的方法和装置。 [0034] The present invention discloses a redistribution layer for reducing stress concentration packaging devices (the RDL) and to reduce at a method and device passivation layer layered package. 封装器件可以包括位于钝化层上方的晶种层,以覆盖钝化层的开口,并且覆盖接触焊盘并与接触焊盘接触。 Packaged device may include a seed layer over the passivation layer, the passivation layer to cover the opening, and covers the contact pads and the contact with the contact pad. RDL形成在钝化层上方以及晶种层上方并与晶种层接触,以覆盖钝化层的开口,且通过晶种层电连接至接触焊盘。 RDL is formed over the seed layer and the passivation layer over and in contact with the seed layer, the passivation layer to cover the opening, and electrically connected to the contact pads by the seed layer. RDL的端部为非直角的平滑表面。 RDL end portion of a non-smooth surface at right angles. RDL端部的表面可以具有钝角或曲面。 RDL end surface may have an obtuse angle or a curved surface. 与在RDL的端部具有直角的传统表面相比,RDL的端部的这类平滑表面可以减小RDL处的应力集中。 Compared with a conventional surface having a right angle at the end portion of the RDL, such a smooth surface end portion of the RDL may reduce stress concentrations at the RDL. 另一方面,改进了封装器件的可靠性。 On the other hand, improves the reliability of the packaged device.

[0035] 应该理解,当元件或层被称为位于另一元件或层“上”、“连接至”或“耦合至”另一元件或层时,其可以直接位于另一元件或层上、或直接连接至或耦合至另一元件或层,或者可以具有中间元件或层。 [0035] It should be understood that, when "on" element or layer is referred to as being another element or layer, "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer, or directly connected or coupled to the other element or layer or intervening elements or layers. 作为比较,当元件被称为“直接位于另一元件或层上”、“直接连接至”或“直接耦合至”另一元件或层时,则没有中间元件或层。 As a comparison, when an element is referred to as being "directly on another element or layer," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers.

[0036] 应该理解,尽管术语第一、第二、第三等本文中可以用于描述各种元件、部件、区域、层和/或部分,但这些元件、部件、区域、层和/或部分不应该通过这类术语进行限定。 [0036] It should be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections it should not be limited by such terms. 这些术语仅用于区分一种元件、部件、区域、层或部分与另一种区域、层、或部分。 These terms are only used to distinguish one kind of element, component, region, layer or section from another region, layer, or section. 因此,在不背离本发明概念的教导的情况下,以下所述的第一元件、部件、区域、层或部分可以被称为第二元件、部件、区域、层或部分。 Thus, the teachings without departing from the concept of the present invention, the said first element, component, region, layer or section may be termed a second element, component, region, layer or section.

[0037] 为了便于描述,诸如“在…下方”、“在…之下”、“下部”、“在…上方”、“上部”等空间相对位置术语在本文中可以用于描述如图所示的一个元件或部件与另一个(或另一些)元件或部件的关系。 [0037] For ease of description, such as "... below", "beneath ...", "lower", "... in the above", "upper" and the like are relative terms it may be used herein to describe shown in FIG. the relationship of one element or the other member (or other) elements or components. 应该理解,除了图中描述的方位外,这些空间相对位置术语旨在包括器件在使用或操作中的不同方位。 It should be understood that in addition to the orientation depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use or operation. 例如,如果翻转附图中的器件,描述为在其他元件或部件“之下”或“下方”的元件将定向为在其他元件或部件的“上方”。 For example, if the device in the figures is turned over, elements described as "below" other elements or components or "beneath" would then be oriented "above" the other elements or components. 因此,示例性术语“在…上方”或“在…之下”可以包括在上方和在下方两种方位。 Thus, the exemplary term "above ..." or "... under" can encompass both an orientation of above and below the. 器件可以以其他方式进行定向(旋转90度或在其他方位上),并相应地解释本文中用于空间相对位置的描述符。 Device may be otherwise oriented (rotated 90 degrees or at other orientations) otherwise, and herein interpreted accordingly spatially relative descriptors used position.

[0038] 本文中所使用的术语仅用于描述具体的示例性实施例且不用于限制本发明的概念。 [0038] As used herein, the term merely used to describe particular exemplary embodiments and are not intended to limit the present invention concept. 除非上下文中另有清楚的描述,否则本文中使用的单数形式“一(a)”、“一个(an)”和“这个(the) ”也用来包括复数形式。 Unless the context clearly described otherwise herein, the singular forms "a, (A)", "a (AN)" and "the (The)" are intended to include the plural forms. 应该进一步理解,术语“包括”和/或“包括着”(当在这类说明书中使用时),指定存在规定的部件、整数、步骤、操作、元件和/或部件,但不排除现有的或额外的一个或多个其他部件、整数、步骤、操作、元件、部件和/或它们的组。 It should be further understood that the terms "comprises" and / or "including" (when used in this type of specification), specify the presence of stated components, integers, steps, operations, elements, and / or components, but do not preclude existing or addition of one or more other components, integers, steps, operations, elements, components, and / or groups thereof.

[0039] 在整个说明书中引用“一个实施例”或“某个实施例”意为至少一个实施例中包括关于所述实施例而描述的特定部件、结构或特征。 [0039] reference to structural features or "one embodiment" or "an embodiment" means that a particular component with respect to the embodiment includes the embodiments described in at least one embodiment, throughout the specification. 因此在整个本说明书中的多个位置出现的短语“在一个实施中”或“在某个实施例中”不一定都指同一个实施例。 Thus in various places throughout this specification appearances of the phrase "in one embodiment" or "in one embodiment" are not necessarily all referring to the same embodiment. 而且,在一个或多个实施例中特定部件、结构或特征可以以任何合适的方式进行组合。 Further, in one or more embodiments of the particular components, structures, or characteristics may be combined in any suitable manner. 应该理解,以下附图没有按比例绘制;而这些附图仅用于说明。 It should be appreciated that the following figures are not drawn to scale; rather, these figures are for illustration only.

[0040] 图1(a)至图1(d)示出了封装器件100的截面图。 [0040] FIG. 1 (a) to 1 (d) shows a sectional view of the package device 100. 封装器件100包括衬底101、位于衬底101内的有源器件102以及位于衬底101上的接触焊盘105,这些器件是包含在封装件100 内的集成电路(IC)的一部分。 Packaged device 100 includes a substrate 101, the substrate 101 is located within the active device 102 located on the substrate 101 and contact pads 105, these devices are included in a part of an integrated circuit (IC) 100 within the package. 钝化层103覆盖衬底101,具有露出接触焊盘105的开口。 The passivation layer 103 covers the substrate 101, 105 having an opening exposing the contact pad. 第一绝缘层107形成在钝化层103上方且具有露出接触焊盘105的开口。 A first insulating layer 107 is formed over the passivation layer 103 and having an opening exposing the contact pad 105. 晶种层109形成在第一绝缘层107上方且与第一绝缘层107接触,以覆盖第一绝缘层107的开口且与接触焊盘105接触。 The seed layer 109 is formed and in contact with the first insulating layer 107 over the first insulating layer 107 to cover the opening of the first insulating layer 107 and in contact with the contact pad 105. 钝化后互连(PPI)线111 (可以称为再分布层(RDL) 111)形成在晶种层109上方且与晶种层109接触,钝化后互连(PPI)线111跟随晶种层109的轮廓且覆盖接触焊盘105。 After passivation interconnect (PPI) line 111 (which may be referred to as a redistribution layer (the RDL) 111) is formed and in contact with the seed layer 109 over the seed layer 109, the seed crystal 111 to follow post-passivation interconnect (PPI) line layer 109 covering profile and the contact pad 105. 在第一绝缘层107上形成另一个绝缘层113,以覆盖RDLlll和晶种层109。 Another insulating layer 113 is formed on the first insulating layer 107 to cover the seed layer 109 and RDLlll. 绝缘层113在伴随可选的凸块下金属化(UBM)焊盘115设置诸如焊球(未独立示出)的外部连接件的位置处具有开口。 Insulating layer 113 along an optional bump (UBM) pad 115 is disposed at a position such as a solder ball (not separately shown) of the external connection member having an opening lower metallization. 下文将更详细地描述每个部件。 Each component will be described in detail below.

[0041] 如图1(a)至图1(d)所示,器件100可以形成在由硅或其他块状半导体材料制造的衬底101上。 [0041] FIG. 1 (a) to 1 (d) shown in FIG device 100 may be formed on the substrate 101 made from a bulk silicon or other semiconductor materials. 器件100可以是包含未示出的额外的半导体IC的基本半导体晶圆的一部分。 Device 100 may be a part of the base of the semiconductor wafer (not shown) comprising an additional semiconductor IC. 器件100可以包含有源器件和无源器件,诸如根据电路的电设计的有源器件102、导电层和介电层。 Device 100 may include active devices and passive devices, such as a conductive layer and a dielectric layer according to the design of the active devices supply circuit 102. 器件100仅用于通过RDLlll示出一个接触焊盘105。 RDLlll device 100 via only one contact pad 105 is shown. 器件100可以根据其功能设计包括通过RDL的网络所连接的多个接触焊盘。 A plurality of contact pads 100 may be devices connected via the network in accordance with the RDL which includes functional design. 根据半导体器件的功能,电信号通过RDL的网络从器件100传送至UBM上的一个或多个焊料凸块。 The function of the semiconductor device, the electrical signal transmitted through the network from the RDL devices 100 to one or more of the UBM solder bumps.

[0042] 衬底101可以包括绝缘体上硅衬底(SOI)的有源层、或块状硅(掺杂的或非掺杂的)。 [0042] The substrate 101 may include a silicon substrate (SOI) active layer on the insulator, or bulk silicon (doped or undoped). 通常,SOI衬底包括诸如硅、锗、硅锗、SOI、绝缘体上硅锗(SGOI)、或它们的组合的半导体材料层。 Typically, SOI substrate includes such as silicon, germanium, silicon germanium, SOI, silicon germanium on insulator (SGOI), or a semiconductor material layer of a combination thereof. 其他可以使用的衬底包括多层衬底、梯度沉底或混合定向衬底。 Other substrates that may be used include a multilayer substrate, a gradient to sink or hybrid orientation substrates. 衬底101可以包括诸如晶体管的有源器件102、浅沟槽隔离(STI)区域和其他无源器件。 The substrate 101 may include active devices such as transistors 102, shallow trench isolation (STI) region and other passive devices.

[0043] 使用图案化和沉积工艺,导电层被形成为接触焊盘105。 [0043] and using a patterned deposition process, the conductive layer 105 is formed as a contact pad. 器件100可以具有其表面上的多个接触焊盘105。 Device 100 may have a plurality of contact pads 105 on the surface thereof. 接触焊盘105可以由铝(Al)、铜(Cu)、锡(Sn)、镍(Ni)、金(Au)、银(Ag)或其他导电材料制成。 Contact pad 105 may be made of aluminum (Al), copper (Cu), tin (Sn), a nickel (Ni), gold (Au), silver (Ag) or other conductive material. 接触焊盘105的沉积使用电解电镀或无电镀工艺。 Contact pad 105 is deposited using electrolytic plating or electroless plating process. 接触焊盘105 的尺寸、形状、和位置仅用于示出的目的且不用于进行限定。 Contact pad 105 of size, shape, location, and for purposes of illustration only and not for limitation. 器件100的多个接触焊盘(未示出)可以为相同的尺寸或不同的尺寸。 A plurality of contact pads of device 100 (not shown) may be the same size or different sizes.

[0044] 可以在衬底101的表面上方以及接触焊盘105的顶部上形成用于结构支撑和物理隔离的钝化层103 (可以是介电层)。 [0044] The passivation layer 103 for structural support may be physically separated and formed on the top surface of the upper substrate 101 and the contact pad 105 (which may be a dielectric layer). 钝化层103可以由氮化硅(SiN)、二氧化硅(SiO2)、氮氧化硅(SiON)、聚酰亚胺(PD、苯并环丁烯(BCB)、聚苯并恶唑(PBO)或其他绝缘材料制成。可以通过使用掩模限定的光刻胶蚀刻工艺去除钝化层103的一部分,来制造钝化层103的开口,从而露出接触焊盘105的部分,而与此同时仍覆盖接触焊盘105的其他部分。钝化层103 的厚度可以在大于约5μηι的范围内,诸如介于约5μηι至20μηι的范围内。制造的开口的尺寸、形状和位置仅用于说明性的目的且不用于进行限定。 The passivation layer 103 may be formed of silicon nitride (SiN), silicon dioxide (SiO2), silicon oxynitride (SiON), a polyimide (PD, benzocyclobutene (BCB), polybenzoxazole (PBO ), or made of other insulating material portion of the passivation layer 103 may be removed by using a photoresist mask defining the etching process, the passivation layer is produced in the opening 103, thereby exposing the portion of the contact pad 105, while at the same time still covering other portions of the contact pad 105. the thickness of the passivation layer 103 may be in a range greater than about 5μηι, such as in the range from about 5μηι to 20μηι the size, shape and position of the opening made only for illustrative and not for purposes of limitation.

[0045] 第一绝缘层107可以形成在钝化层103上方,其跟随钝化层103的轮廓,填充接触焊盘105上方的钝化层103的部分开口。 [0045] The first insulating layer 107 may be formed over the passivation layer 103, which follows the contour of the passivation layer 103, a passivation layer to fill the contact portion 105 of the opening 103 above the pad. 第一绝缘层107可以不完全填充接触焊盘105上方的钝化层103的开口,相反可以对该第一绝缘层进行图案化以形成露出接触焊盘105的一部分的开口,而与此同时仍覆盖接触焊盘105的剩余部分。 A first insulating layer 107 may not completely fill the contact pads of the passivation layer 105 over the opening 103, but rather may be patterned on the first insulating layer to form an opening 105 exposing a portion of the contact pad, while at the same time still covering the remaining portion of the contact pad 105. 第一绝缘层107的图案化可以包括光刻技术。 Patterning the first insulating layer 107 may include a photolithography technique. 第一绝缘层107可以由诸如环氧树脂、聚酰亚胺、苯并环丁烯(BCB)、聚苯并恶唑(PBO) 等的聚合物形成,但也可以使用其他相对较软的材料(通常是有机的)介电材料。 A first insulating layer 107 may be formed such as epoxy, polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO) polymer or the like is formed, it is also possible to use other relatively soft material (usually organic) dielectric materials. 形成方法包括旋涂或其他常用的方法。 The method comprises forming a spin-coating or other conventional methods. 例如,第一绝缘层107的厚度可以介于约5μηι和约30μηι之间。 For example, the thickness of the first insulating layer may be between about 107 and about 5μηι 30μηι. 在整个说明书中所引用的尺寸仅仅是实例,且将随着集成电路的缩小而改变。 Throughout the specification referenced dimensions are merely examples, and the integrated circuit varies with the reduction.

[0046] 晶种层109形成在第一绝缘层107上方且与第一绝缘层107接触,以覆盖第一绝缘层107的开口且与接触焊盘105接触。 [0046] The seed layer 109 is formed over the first insulating layer 107 and in contact with the first insulating layer 107 to cover the opening of the first insulating layer 107 and in contact with the contact pad 105. 使用物理汽相沉积(PVD)工艺或化学汽相沉积(CVD)工艺,晶种层109可以由诸如〇1、1^、1^1了3、了&10、(:冰、1、1_勺导电材料或一些其他导电材料。晶种层109的厚度可以介于约10埃(A)至700人的范围内且优选的厚度介于约50至3:00 A的范围内。晶种层1〇9基本为共形层,其中晶种层109位于第一绝缘层107上或钝化层103上的部分的厚度基本上等于晶种层109位于第一绝缘层107或钝化层103的开口的侧壁上的垂直部分的厚度,并且也基本等于晶种层109位于第一绝缘层107的开口内的厚度(用于覆盖接触焊盘)。 Using physical vapor deposition (PVD) process or chemical vapor deposition (CVD) process, such as a seed layer 109 may 〇1,1 ^, 1 ^ 3 1 a, the & amp; 10, (: ice, 1,1 _ spoon or some other electrically conductive material, electrically conductive material. the thickness of the seed layer 109 may be interposed between the inner and preferably a thickness of between about 50 to 3:00 a within about 10 angstroms (a) to a range of 700 range. seed 1〇9 layer is substantially conformal layer, wherein the thickness of the seed layer 109 positioned on a portion of the passivation layer 107 or 103 on the first insulating layer 109 is substantially equal to the seed layer 107 located between the first insulating layer or passivation layer 103 the thickness of the vertical portion on the sidewalls of the opening, and also substantially equal to the thickness of the seed layer 109 positioned within the opening of the first insulating layer 107 (for covering the contact pads).

[0047] RDLlll形成在晶种层109上方且与晶种层109接触,RDLlll跟随晶种层109的轮廓, 且覆盖接触焊盘IOSt3RDLlll可以由诸如11)1、附、镍钒(附¥)、(:11、或(:11合金制造。形成方法包括电解电镀、非电镀、溅射、CVD方法、PVD方法等。RDLlll可以由单层制成、或由使用诸如Ti、TiW或Cr的粘合层的多层制成。RDLlll可以基本为共形层,其中RDLlll位于第一绝缘层107上方的晶种层109上的部分的厚度基本等于RDLlll位于第一绝缘层107的开口的侧壁上的垂直部分的厚度,并且也基本等于RDLlll位于第一绝缘层107的开口内的厚度,以覆盖接触焊盘105。可选地,RDL可以具有平坦表面并因此不是共形层。RDLlll的高度可以介于例如约2μπι至约ΙΟμπι之间,或介于0.5 1<人至3 KA的范围内。示出的RDLlll的高度仅用于说明性的目的而不用于进行限定。 [0047] RDLlll formed over the seed layer 109 and in contact with the seed layer 109, RDLlll follow the contour of the seed layer 109, and covers the contact pads may be formed such IOSt3RDLlll 11) 1, attached, nickel vanadium (¥ attached), (: 11, or (: 11 alloy formed comprises electrolytic plating, electroless plating, sputtering, CVD method, PVD method or the like may be made of a single layer .RDLlll, or by the use of an adhesive, such as Ti, TiW or Cr layer may be a multilayer made .RDLlll substantially conformal layer, wherein the thickness of the portion RDLlll located on the seed layer 109 over the first insulating layer 107 positioned on a sidewall of substantially equal RDLlll opening of the first insulating layer 107 the thickness of the vertical portion, and also a thickness substantially equal to RDLlll positioned within the opening 107 of the first insulating layer to cover the contact pads 105. Alternatively, the RDL may have a flat surface and is therefore not conformal dielectric layer height of .RDLlll for example between about 2μπι about ΙΟμπι, or between a range of 0.5 <3 KA to a person. RDLlll height shown for illustrative purposes only and are not intended to be limiting.

[0048] 第一绝缘层107上方的晶种层109和RDLlll可以具有窄、宽或楔形(当通过横截面观察时),并且可以具有基本恒定的宽度和长度。 [0048] The first insulating layer 107 and the seed layer 109 may have a narrow upper RDLlll, width or wedge-shaped (when observed through cross section), and may have a substantially constant width and length.

[0049] 如图I (a)至图1(d)所示,RDLlll位于晶种层109上方。 [0049] FIG I (a) through 1 (d) as shown, RDLlll 109 positioned above the seed layer. RDLlll的端部209和211具有非直角的平滑顶面。 RDLlll end portion 209 and top surface 211 having a smooth non-right. 如图1(a)至图1(d)所示,RDLlll的端部209和211的平滑顶面可以具有多种形式。 As shown in FIG 1 (a) to 1 (d), the end portion 209 and the smooth top surface RDLlll 211 may have a variety of forms. 除图1(a)至图1(d)所示的形式外,还可以有多种其他方式来形成具有非直角的平滑顶面的RDLlll的端部,所有方式上述方式均包括在本发明的范围内。 In addition to the form (d), in FIG. 1 (a) to FIG. 1, can also have a variety of other ways to form the end portion having a non-right angle RDLlll smooth top surface, all of the ways described above are included in the present invention. range.

[0050] 例如,如图1(a)所示,端部209的顶面具有钝角201以代替通常具有的直角。 [0050] For example, FIG. 1 (a), the top surface 209 of the end portion 201 having an obtuse angle instead of having a generally right angles. 在RDLlll的另一端部211的顶面处形成相似的钝角203。 Similar obtuse angle formed at the top surface 203 at another end portion 211 RDLlll. 角201和203可以是相似的角度或不同的角度,且可以在不同的实施例中具有角度范围。 Angle 201 and angle 203 may be similar or different angle, and may have an angle in a range of different embodiments. 例如,在一些实施例中,钝角201和钝角203可以介于约91°和约95°的范围内,而在其他实施例中,钝角201和钝角203可以介于约96°至约100°的范围内,或可以介于约101°至约105°的范围内,甚至可以介于约106°至约120°的范围内。 For example, in some embodiments, the obtuse angle may be between 201 and 203 at an obtuse angle in the range of about 91 ° and about 95 °, while in other embodiments the obtuse angle may be between 201 and 203 at an obtuse angle ranging from about 96 ° to about 100 ° of within, or may range from about 101 ° to about 105 °, or even in a range from about 106 ° to about 120 °.

[0051] 可选地,在如图1(b)所示的另一个实施例中,RDLlll的端部209和211可以具有分别包含曲面201和203的平滑角部。 [0051] Alternatively, in FIG. 1 (b) another embodiment illustrated embodiment, RDLlll end portions 209 and 211 may have smooth corners respectively comprise curved surfaces 201 and 203. 图I (a)和图I (b)所示的两个实施例都是具有非直角的平滑顶面的RDLlll的端部的实例。 FIG I (a) and I (b) are two embodiments illustrated example end portion having a non-right angle RDLlll smooth top surface.

[0052] 仍可选地,如图I (c)所示,RDLl 11可以包括位于端部的两部分,S卩,在一端位于晶种层109上方的RDLlll的末端部分209和末端部分1113。 [0052] Alternatively still, as shown in I (c) as shown, RDLl 11 may include a portion of the end portion of the two, S Jie, located at one end of the seed layer RDLlll 109 over the portion 209 and the tip portion 1113. 末端部分1113位于晶种层109的上方且与晶种层109接触,而末端部分1113的边缘与晶种层109的边缘基本对齐。 End portions 1113 positioned above the seed layer 109 and in contact with the seed layer 109, and the edges of the end portion 1113 of the seed layer 109 are substantially aligned. 末端部分209 位于末端部分1113的上方,且窄于末端部分1113,使得末端部分1113的表面的一部分未被末端部分209覆盖。 End portion 209 is located above the end portion 1113, and is narrower than the end portions 1113, 1113 such that the portion of the end surface of the end portion of the cover portion 209 is not. 末端部分1113可以具有平滑的顶面或包含直角的标准矩形表面。 End portion 1113 may have a smooth surface or a standard rectangular top surface comprises a right angle. 末端部分209可以具有非直角的平滑顶面。 End portion 209 may have a non-right angle smooth top surface. 例如,末端部分209可以具有包括如图1(c)所示的钝角201的顶面,或具有包括如图I (d)所示的曲面201的顶面。 For example, tip 209 may have a portion in FIG. 1 (c) an obtuse angle as shown in the top surface 201, as shown in FIG comprising or having I (d) surface shown in the top surface 201.

[0053] 相似地,如图I (c)所示,RDLlll的另一端部包括两部分,S卩,RDLlll位于晶种层109 的末端207上方的末端部分211和末端部分1115。 [0053] Similarly, FIG. I (c), the other end portion consists of two parts RDLlll, S Jie, RDLlll 207 located above the end portion 109 of the end 211 and the tip portion 1115 of the seed layer. 末端部分1115位于晶种层109上方且与晶种层109接触,而末端部分1115的边缘与晶种层109的边缘基本对齐。 End portions 1115 positioned above the seed layer 109 and in contact with the seed layer 109, and the edges of the end portion 1115 of the seed layer 109 are substantially aligned. 末端部分211位于末端部分1115上方,且可以窄于末端部分1115,使得末端部分1115的表面的一部分未被末端部分211覆盖。 End portion 211 located above the end of 1115, and 1115 may be narrower than the end portion, such that the end surface portion 1115 of the end portion of the cover portion 211 is not. 两部分211共同形成RDLlll的端部的阶梯式外形。 RDLlll portion 211 together form two stepped portions of the outer edge. 末端部分1115可以具有平滑的顶面或包含直角的标准矩形表面。 End portion 1115 may have a smooth surface or a standard rectangular top surface comprises a right angle. 末端部分211可以具有非直角的平滑顶面。 End portion 211 may have a non-right angle smooth top surface. 例如,如图1 (c)所示和如图1(d)所示,末端部分211可以具有包含钝角203的顶面。 For example, FIG. 1 (c), and as shown in FIG. 1 (d), the end portion 211 may have a top surface 203 comprising an obtuse angle. 一个末端部分211的平滑外形可以与另一个末端部分209的平滑外形相独立。 End a smooth contour portion 211 may be independent of the other end portion 209 smooth contour. 例如,如图1(d)所示,末端部分211 具有包含钝角203的顶面,而末端部分209具有曲面。 For example, FIG. 1 (d), the end portion 211 has a top surface comprising an obtuse angle of 203, and the end portion 209 has a curved surface.

[0054] 如图1(a)至图1(d)所示的封装器件100的实施例具有包含端部的RDL111,RDL111 的端部具有非直角的平滑顶面。 Embodiment [0054] FIG. 1 (a) to 1 (d) shown in the embodiment of packaging device 100 having an end portion comprising RDL111, RDL111 right angle end portion having a non-smooth top surface. 与RDLlll的端部处包含直角的传统顶面相比,这种RDLlll 的端部的平滑顶面具有一些优势特征,使得可以减小RDLlll处的应力集中。 Compared with the traditional end of the top surface contains at right angles RDLlll the smooth top surface of the end portion of this RDLlll have some advantageous features, making it possible to reduce stress concentrations at RDLlll. 另一方面,提高了封装器件100的可靠性。 On the other hand, to improve the reliability of the package device 100.

[0055] 如图1(a)至图1(d)所示,在第一绝缘层107上形成另一绝缘层113,以覆盖RDLlll 和晶种层109。 [0055] FIG. 1 (a) to 1 (d), the further insulating layer 113 is formed on the first insulating layer 107 to cover the seed layer 109 and RDLlll. 绝缘层113具有可以使用光刻技术制造的开口。 Having the insulating layer 113 may be fabricated using photolithographic techniques opening. 绝缘层113可以由诸如环氧树月旨、聚酰亚胺、苯并环丁烯(BCB)、聚苯并恶唑(PBO)等的聚合物形成,但是也可以使用其他相对较软的材料(通常是有机的)介电材料。 Insulating layer 113 may be formed of epoxy resin, such as a month purpose, polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO) polymer and the like, but is also possible to use other relatively soft material (usually organic) dielectric materials. 形成方法包括旋涂或其他常用方法。 The method comprises forming a spin-coating or other conventional methods. 绝缘层113 的厚度可以介于例如约5μηι和约30μηι之间。 The thickness of the insulating layer may be between about 113 and about 30μηι e.g. 5μηι.

[0056] 绝缘层113具有设置凸块下金属化(UBM)焊盘115的开口。 [0056] The insulating layer 113 having an opening disposed under bump metallization (UBM) pad 115. 焊球(未示出)可以放置在UBM焊盘115上。 A solder ball (not shown) may be placed on the UBM pads 115. 可以形成与RDLlll电接触的UBM焊盘115 WBM焊盘115可以包括诸如钛层或镍层的导电材料层。 UBM pad 115 WBM may be formed in contact with the pads 115 may include RDLlll electrically conductive material layer such as a nickel layer or a titanium layer. UBM焊盘115可以包括多个子层(未示出)。 UBM pad 115 may include a plurality of sub-layers (not shown). 由诸如钛(Ti)、氧化钛(TiOx)、钽(Ta)、氮化钽(TaN)、镍(Ni)或铜(Cu)的材料制成的任何多层适合于UBM焊盘115 的形成。 Any multi-layer made of such as titanium (Ti), titanium oxide (TiOx), tantalum (Ta), tantalum nitride (TaN), nickel (Ni) or copper (Cu) is a material suitable for forming the UBM pad 115 . 可以用于UBM焊盘115的任何合适的材料或材料层均完全包括在本实施例的范围内。 Any suitable material or materials may be used for UBM layer pads 115 are fully included within the scope of the embodiments in the present embodiment. 可以根据期望的材料使用诸如溅射、蒸发的工艺或CVD工艺的创建UBM焊盘115。 The desired material may be used, such as sputtering, evaporation process or a CVD process 115 creates UBM pads. 可以形成UBM焊盘115的厚度介于约Ο.ΟΙμπι到约ΙΟμπι之间,诸如约5μπι。 UBM pad 115 may be formed in a thickness of between about between about Ο.ΟΙμπι ΙΟμπι, such as about 5μπι. 可选地,在一些实施例中,可以不需要UBM焊盘115。 Alternatively, in some embodiments, the UBM pad 115 may not be required.

[0057] 此外,导电焊接材料(未示出)可以沉积在UBM焊盘115上方。 [0057] In addition, the conductive solder material (not shown) may be deposited over the UBM pads 115. 焊接材料可以是任何金属或导电材料,诸如Sn、铅(Pb)、Ni、Au、Ag、Cu、辉铋矿(Βi)和它们的合金、或其他导电材料的混合物。 Solder material may be any metal or conductive material, such as,, Ni, Au, Ag,,, Sn mixture of lead (Pb) Cu bismuthinite (BETA I) and their alloys, or other conductive material. 在一些实施例中,焊球可以安装在UBM焊盘115上。 In some embodiments, the solder balls can be mounted on the UBM pads 115.

[0058] 可以通过图2 (a)至图2(e)的截面图所示的工艺来制造图1(a)所示的实施例。 [0058] may be produced in FIG. 1 (a) by the embodiment shown in FIG. 2 process (a) to 2 (e) in the cross section shown in FIG. 可以通过相似的工艺来制造(未示出)其他实施例。 It can be produced (not shown) similar to the embodiments of the other process.

[0059] 如图2 (a)所示,提供了衬底101,具有位于衬底101内的有源器件102且位于衬底101的表面上的接触焊盘105。 [0059] FIG. 2 (a) as shown, a substrate 101, an active device is located within the substrate 101 and contact pads 102 located on surface 105 of the substrate 101. 在衬底101的表面上形成具有露出接触焊盘105的开口的钝化层103。 Forming a passivation layer 103 having an opening exposing the contact pad 105 on the surface of the substrate 101. 第一绝缘层107形成在钝化层103上方且具有露出接触焊盘105的开口。 A first insulating layer 107 is formed over the passivation layer 103 and having an opening exposing the contact pad 105. 晶种层109形成在第一绝缘层107上方且与第一绝缘层107接触,以覆盖第一绝缘层107的开口且与接触焊盘105接触。 The seed layer 109 is formed and in contact with the first insulating layer 107 over the first insulating layer 107 to cover the opening of the first insulating layer 107 and in contact with the contact pad 105. 晶种层109可以由导电材料形成,该导电材料选自基本上由Cu、Al、Ti、TiN、 丁&amp;、了&amp;1〇、(:冰、1、1~以及它们的组合所组成的组。此外,通过在晶种层109上方沉积光刻胶材料,在晶种层109上方形成光刻胶层301。 The seed layer 109 may be formed of a conductive material, the conductive material is selected from a substantially ;, Cu, Al, Ti, TiN, the D & amp & amp; 1〇, (: composed of ice, and combinations thereof 1,1 to groups. in addition, over the seed layer by depositing a photoresist material 109, photoresist layer 301 is formed over the seed layer 109.

[0060] 光刻胶层301是被设计为当暴露于光时改变性质的聚合物涂层。 [0060] The photoresist layer 301 is designed to change properties when exposed to light polymer coating. 然后,可以选择性地去除涂层的露出区域或未露出区域以暴露下方的表面。 It may then be removed selectively exposed or exposed areas of the coating to expose underlying surface regions. 如图2(b)所示,可以去除光刻胶层301的部分以在晶种层109上方形成光刻胶图案301。 As shown in FIG 2 (b), the portion of the photoresist layer 301 may be removed to form a photoresist pattern 301 over the seed layer 109. 光刻胶层301的材料可以包括一些光敏化合物(PAC) WAC是特殊种类的聚合物。 The photoresist material layer 301 may include a number of photoactive compound (PAC) WAC is a special kind of polymer. PAC的作用是抑制光刻胶材料在显影剂中的溶解。 PAC is to suppress the effect of the photoresist material dissolved in the developer. PAC通常是不溶解于典型显影剂的二氮醌。 PAC is generally insoluble in the diazoquinone typical developer. 当光刻胶层301暴露于光时,主要通过光刻胶层301的PAC组分来吸收入射到光刻胶层301上的光,PAC组分的二氮醌分子发生化学变化。 When the photoresist layer 301 is exposed to light, primarily to absorb incident to chemical changes diazoquinone molecular light, PAC component of the photoresist layer 301 on the PAC occurs by components of the photoresist layer 301. 光刻胶的未露出区域基本上不受显影剂的影响。 Effect of the unexposed areas of the photoresist substantially unaffected by the developer. 可以通过光刻胶均匀地分配PAC,或可以控制PAC以在光刻胶上建立倾斜的边缘。 May be allocated uniformly by the resist PAC, PAC, or may be controlled to establish a beveled edge on the resist. 光刻胶图案301可以覆盖晶种层109的两端,以保持晶种层109的剩余部分未被覆盖。 The photoresist pattern 301 may cover the ends of the seed layer 109, to maintain the remaining portions of the seed layer 109 is uncovered. 光刻胶图案301可以包括具有如图2(b)所示的锐角401的表面。 The photoresist pattern may include a surface 301 in FIG. 2 (b) 401 at an acute angle as shown. 可以通过改变PR (光刻胶)301的表面上方的光强度来形成锐角401。 Light intensity may be above the surface 301 at an acute angle 401 formed by changing PR (photoresist). 例如,接近于锐角401的角部的点403上方光的强度可以高于接近于锐角401的底部的点405上方光的强度。 For example, the intensity of light close to the upper acute corner portion 401 of the point 403 above the light intensity may be higher than the bottom 401 at an acute angle close to 405 points. 与点405上方的较低强度的光相比,点403上方的较高强度的光可以去除点403下方与PAC混合的更多PR材料。 Compared with a lower intensity of the light spot 405 above the higher light intensity point 403 above the PR material can be removed more points below 403 mixed with PAC. 因此,形成锐角401。 Thus, 401 form an acute angle. 也可以通过改变和设计沿曲面的不同点处的光强度而形成诸如曲面形状的其他形状。 It may be formed of other shapes such as a curved shape and by varying the intensity of light at different points along the curved surface design.

[0061] 如图2 (c)所示,导电材料可以在未被光刻胶图案301覆盖的区域中沉积在晶种层109上方且与晶种层109接触,以形成RDLlll ADLlll覆盖钝化层的开口,且通过晶种层109 电连接至接触焊盘105IDL111可以由导电材料形成,该导电材料选自基本由Ti、Al、Ni、· 化镍(NiV)、Cu、Cu合金、和它们的组合所组成的组。 [0061] FIG. 2 (c), the region of the conductive material may cover the resist pattern 301 was not deposited over the seed layer 109 and in contact with the seed layer 109 to form a passivation layer covering RDLlll ADLlll opening, and electrically connected to the contact pads by 109 105IDL111 seed layer may be formed of a conductive material, the conductive material is selected from the group consisting essentially of Ti, Al, Ni, · nickel (NiV), Cu, Cu alloys, and their combinations thereof.

[0062] 如图2(d)所示,可以去除光刻胶图案301 ADLlll具有紧邻光刻胶图案301的端部209和端部211。 [0062] FIG. 2 (d), the photoresist pattern may be removed 301 ADLlll 209 having an end portion and an end portion 211 proximate the resist pattern 301. 由于光刻胶图案具有锐角401,所以端部209及端部211具有分别包含钝角201及钝角203的顶面。 Since the photoresist pattern 401 has an acute angle, the end portion 209 and the end portion 211 has a top surface 201 and each include an obtuse angle of 203 obtuse. 然而,可以类似地形成非直角的平滑顶面的任何其他形式(未在图2 (a)至图2 (e)中示出)。 However, it is similarly formed in any other form (not shown in (a) to 2 (e) in FIG. 2) perpendicular to the non-smooth top surface.

[0063] 如图2(e)所示,在去除光刻胶图案301之后,可以在RDLlll上方形成第二绝缘层113。 [0063] FIG. 2 (e), after the resist pattern 301 is removed, the second insulating layer 113 may be formed over RDLlll. 可以在第二绝缘层113内形成开口以露出RDLlll。 May be formed to expose the opening in the second insulating layer RDLlll 113. 此外,UBM焊盘115可以形成在第二绝缘层113的开口内且与RDLlll接触。 Further, UBM pads 115 may be formed and in contact with the second opening in the RDLlll insulating layer 113.

[0064] 在另一实例中,可以通过图3 (a)至图3(h)的截面图所示的工艺来制造图1(c)所示的实施例。 [0064] In another example, FIG. 1 may be manufactured by a process in FIG. 3 (a) to 3 (h) shown a sectional view of the embodiment shown in (c). 可以通过相似的工艺(未示出)制造其他实施例。 Other embodiments may be manufactured by a similar process (not shown).

[0065] 如图3 (a)所示,提供了衬底101,其中具有位于衬底101内的有源器件102和位于衬底101的表面上的接触焊盘105。 [0065] FIG. 3 (a), a substrate 101 is provided, wherein an active device is located within the substrate 102 and contact pads 101 located on surface 105 of the substrate 101. 在衬底101的表面上形成具有露出接触焊盘105的开口的钝化层103。 Forming a passivation layer 103 having an opening exposing the contact pad 105 on the surface of the substrate 101. 第一绝缘层107形成在钝化层103上方且具有露出接触焊盘105的开口。 A first insulating layer 107 is formed over the passivation layer 103 and having an opening exposing the contact pad 105. 晶种层109 形成在第一绝缘层107上方且与第一绝缘层107接触,以覆盖第一绝缘层107的开口且与接触焊盘105接触。 The seed layer 109 is formed and in contact with the first insulating layer 107 over the first insulating layer 107 to cover the opening of the first insulating layer 107 and in contact with the contact pad 105. 此外,通过在晶种层109上方沉积光刻胶材料,可以在晶种层109上方形成光刻胶层301。 Further, over the seed layer by depositing a photoresist material 109, photoresist layer 301 may be formed over the seed layer 109.

[0066] 如图3(b)所示,可以去除光刻胶层301的部分以在晶种层109上方形成第一光刻胶图案301。 [0066] FIG. 3 (b), the portion of the photoresist layer 301 may be removed to form a first photoresist pattern 301 over the seed layer 109. 剩余的第一光刻胶图案301可以覆盖晶种层109的两端,以保持晶种层109的剩余部分未被覆盖。 The remaining first photoresist pattern 301 may cover the ends of the seed layer 109, to maintain the remaining portions of the seed layer 109 is uncovered. 第一光刻胶图案301可以包括如图3 (b)所不的具有直角的表面。 The first photoresist pattern 301 may include (b) do not have a right angle surface 3 as shown in FIG. 可选地,第一光刻胶图案301可以包括非直角的平滑表面。 Alternatively, the first photoresist pattern 301 may include a non-smooth surface at right angles.

[0067] 如图3 (c)所示,第二光刻胶图案303可以形成在未被第一光刻胶图案301覆盖而被第一光刻胶图案301环绕的区域内的晶种层109上方。 [0067] FIG. 3 (c), the second photoresist pattern 303 may be formed within the seed layer 109 in a region not covered with the first photoresist pattern 301 is surrounded by a first photoresist pattern 301 above. 通常通过旋涂使用薄层(诸如1微米) 光刻胶材料覆盖晶种层109的整个表面来形成第二光刻胶图案303。 Typically by spin coating using a thin layer (such as 1 micron) photoresist material covering the entire surface of the seed layer 109 to form a second photoresist pattern 303. 如果形成了多余的光刻胶图案303,则可以通过将光刻胶图案303 (通常为UV)暴露在穿过模板、或掩模(被设计为允许光仅落到期望位置)的光来去除多余部分。 If excess photoresist pattern is formed 303, the photoresist pattern 303 may be formed by (usually UV) light exposure through the stencil or mask (light Luodao designed to allow only the desired position) removed the excess part. 光导致曝光区域中的化学变化。 Light causes a chemical change in the exposed areas. 根据系统,可以选择性地清洗掉曝光区域或未曝光区域。 The system may be selectively exposed region or the unexposed areas washed away. 在去除光刻胶图案303的多余部分之后,确保第二光刻胶图案303的表面低于第一光刻胶图案301的表面。 After removing the unnecessary portion of the photoresist pattern 303, ensure that the surface of the second photoresist pattern 303 is lower than the surface of the first photoresist pattern 301.

[0068] 如图3(d)所示,第三光刻胶图案305可以形成在第二光刻胶图案303上方且连接至第一光刻胶图案301。 [0068] FIG. 3 (d), the third photoresist pattern 305 may be formed over the second photoresist pattern 303 and connected to the first resist pattern 301. 通常通过旋涂使用与用于第一光刻胶图案301的材料相同的材料形成第三光刻胶图案305,而用于第二光刻胶图案303的材料可以不同。 Forming a third photoresist pattern 305 is generally used for the same material as the first photoresist pattern 301 by spin coating using the material, and the material for the second photoresist pattern 303 may be different. 第二光刻胶图案303是将被完全去除的牺牲层。 The second photoresist pattern 303 is a sacrificial layer to be removed completely. 第二光刻胶图案303的材料可以是硼磷硅酸盐玻璃(BPSG)、磷硅酸盐玻璃(PSG)、多晶娃、低压化学汽相沉积的二氧化娃或一些其他光刻胶材料。 Material of the second photoresist pattern 303 may be a borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), poly baby, a low pressure chemical vapor deposition or some other baby dioxide photoresist material . 用于第二光刻胶图案303的牺牲层的材料也取决于用于晶种层109的材料。 A second layer of sacrificial material for the photoresist pattern 303 depending on the material used for the seed layer 109. 如图3(e)所示,可以去除第二光刻胶图案303而保持第一光刻胶图案301及第三光刻胶图案305完好无损。 As shown in FIG 3 (e), the first photoresist pattern may be maintained third photoresist pattern 301 and 305 of the second photoresist pattern 303 is removed intact. 第三光刻胶图案305的材料可以包括一些光敏化合物(PAC) WAC是特殊种类的聚合物并为溶剂型,且PAC 从顶部至低部降低光强度。 Material of the third photoresist pattern 305 may include a number of photoactive compound (PAC) is a special kind of polymer the WAC and PAC to reduce the light intensity from the top portion of the low solvent, and. 如图3(d)所示,第三光刻胶图案305可以包括具有锐角401的表面。 As shown in FIG 3 (d), the third photoresist pattern 305 may include a surface 401 at an acute angle. 可以通过改变第三光刻胶图案305的表面上方的光强度来形成锐角401。 An acute angle 401 may be formed by changing the light intensity over the surface of the third photoresist pattern 305. 例如,接近锐角401的角部的点403上方的光强度可以高于接近锐角401的底部的点405上方的光强度。 For example, a point 403 above the light intensity near the acute angle corner portion 401 may be higher than the light intensity above the point 405 near the bottom 401 at an acute angle. 与点405上方的较低强度的光相比,点403上方的较高强度的光可以去除点403下方与PAC混合的更多的PR材料。 Compared with a lower intensity of the light spot 405 above the higher light intensity point 403 above the PR material can be removed more points below 403 mixed with PAC. 因此,形成锐角401。 Thus, 401 form an acute angle. 也可以通过改变和设计沿曲面的不同点的光强度形成诸如弯曲形状的其他形状。 It may be formed in other shapes such as a curved shape and by varying the intensity of light at different points along the curved surface design.

[0069] 如图3(f)所示,可以形成RDLlll,以填充未被第一光刻胶图案301及第三光刻胶图案305覆盖的区域。 [0069] FIG. 3 (f) as shown, may be formed RDLlll, to fill the region which is not the first photoresist pattern 301 and the third photoresist pattern 305 covers. 形成RDLlll的导电材料可以选自基本由Ti、Al、Ni、钒化镍(NiV)、Cu、Cu 合金和它们的组合所组成的组。 RDLlll conductive material may be selected from the group consisting essentially of Ti, Al, Ni, Ni-group vanadium (NiV), Cu, Cu alloys thereof, and combinations thereof. RDLlll覆盖钝化层的开口,且通过晶种层109连接至接触焊盘105。 RDLlll passivation layer to cover the opening, and connected to the contact pad 105 through the seed layer 109. 可以在形成RDLlll之后,去除第一光刻胶图案301及第三光刻胶图案305。 After forming the can RDLlll, removing the first photoresist pattern 301 and the third photoresist pattern 305.

[0070] RDLlll可以包括两部分。 [0070] RDLlll may comprise two parts. RDLlll的第一部分填充未被位于晶种层109上方且与晶种层109接触的第一光刻胶图案301覆盖的区域,以覆盖钝化层103的开口,且通过晶种层电连接至接触焊盘105 ADLlll的第二部分位于RDLlll的第一部分上方,以填充未被第三光刻胶图案305覆盖的区域,其中,RDL的第二部分具有紧邻第三光刻胶图案305的端部209和211,且端部209和211具有非直角的平滑表面。 The first portion is not filled RDLlll in the region of the seed layer 109 over the first photoresist pattern and in contact with the seed layer covering 109,301 to cover the opening of the passivation layer 103, and electrically connected to the contact by a seed layer RDLlll positioned above the second portion of the first portion of the pad 105 ADLlll to fill the region which is not covered by the third photoresist pattern 305, wherein the second portion of the RDL 209 having a proximate end portion of the third photoresist pattern 305 and 211, 209 and 211 and an end portion having a non-smooth surface at right angles. 如图3(f)所示,在实施例中,端部209和211具有分别包含钝角201和钝角203的表面。 As shown in FIG 3 (f), in the embodiment, the end portions 209 and 211 each include a surface having obtuse angles 201 and 203 are obtuse. 可选地,可以类似地形成非直角的平滑顶面的任何其他形式(未在图3 (a)至图3 (h)中示出)。 Alternatively, (not shown in FIG. 3 (a) to 3 (h) are shown) may be similarly formed in any other form of non-right angle of the smooth top surface.

[0071] 如图3(g)所示,在RDLlll上方可以形成第二绝缘层113。 [0071] FIG. 3 (g), the above RDLlll second insulating layer 113 may be formed. 可以在第二绝缘层113内形成开口以露出RDLlll。 May be formed to expose the opening in the second insulating layer RDLlll 113. 如图3 (h)所示,UBM焊盘115可以形成在第二绝缘层113的开口内且与RDLlll接触。 FIG. 3 (h) as shown, UBM pads 115 may be formed and in contact with the second opening in the RDLlll insulating layer 113.

[0072] 然而,图2 (a)至图2 (e)及图3 (a)至图3 (h)示出了可以用于成形所述的RDLlll的方法的实施例,这些实施例的目的仅在于示出可以使用的方法,而不用于通过实施例进行限定。 RDLlll object of embodiments of the method of [0072] However, FIG. 2 (a) to 2 (e) and FIG. 3 (a) to 3 (h) shows a shape that can be used according to these embodiments only that illustrates a method that may be used, for not defined by the embodiment. 当然,可以可选地利用用于成形RDLlll的任何合适的方法,诸如形成RDLlll,然后使用例如蚀刻工艺(诸如发明人为Lee的美国专利第6,440,865号中描述的蚀刻工艺,其全部内容结合于此作为参考)成形RDLlll。 Of course, alternatively be any suitable method for forming RDLlll using such RDLlll formed, for example, and then use an etching process (etching process of the invention, such as U.S. Patent No. 6,440,865 of Lee artificial described, is hereby incorporated in its entirety reference) forming RDLlll. 所有这类方法均全部包括在实施例的范围内。 All such methods are included within the scope of all embodiments.

[0073] 本发明的实施例具有多个优势特征。 Embodiment [0073] of the present invention having a plurality of advantageous features. 封装器件的实施例具有RDL,RDL的端部具有非直角的平滑顶面,使得在与RDL的端部处具有直角的传统顶面相比可以减小RDL处的应力集中。 Example packaged device having RDL, RDL has a non-right-angled end portion of the smooth top surface, such that the top surface has a conventional right angle with the end portion of the RDL can be reduced compared with stress concentration at the RDL. 因此,提高了封装器件的可靠性。 Thus, the reliability of the packaged device.

[0074] 尽管已经详细地描述了本发明及其优点,但应该理解,可以在不背离所附权利要求限定本发明的主旨和范围的情况下,做各种不同的改变,替换和更改。 [0074] Having described the present invention and its advantages in detail, it should be understood that the appended claims without departing from the spirit and scope of the present invention, do various changes, substitutions and alterations. 而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。 Moreover, the scope of the present application is not limited to the process, the machine described in this specification, manufacture, particular embodiments compositions of matter, means, methods and steps described. 作为本领域普通技术人员应理解,通过本发明的实施例,现有的或今后开发的用于执行与根据本发明所采用的所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造、材料组分、装置、方法或步骤本发明可以被使用。 As one of ordinary skill will appreciate that the present invention by way of example, existing or later to be developed that perform in accordance with the present invention used in substantially the same function or achieve substantially the same respective embodiments of the process result, machines, manufacture, compositions of matter, means, methods, or steps of the present invention may be used. 相应地,附加的权利要求意指包括例如工艺、机器、制造、材料组分、装置、方法或步骤的范围内。 Accordingly, the appended claims is intended to include, for example, within the scope of the process, machine, manufacture, composition of matter, means, methods, or steps. 此外,每个权利要求都构成一个独立的实施例,并且不同权利要求及实施例的组合均在本发明的范围之内。 In addition, each claim constitutes a separate embodiment, and various combinations of the claims and embodiments are within the scope of the invention.

Claims (20)

  1. 1. 一种封装器件,包括: 接触焊盘,位于衬底的表面上; 介电层,位于所述衬底的表面上方,具有露出所述接触焊盘的开口;以及导电层,位于所述介电层上方,覆盖所述介电层的开口,且电连接至所述接触焊盘,其中,所述导电层包括晶种层且具有包含顶面和侧壁并与所述介电层的开口间隔开的端部, 所述侧壁以非直角远离所述衬底进行延伸,并且所述侧壁与所述顶面以非直角交叉,以用于避免所述端部处的应力集中所导致的所述介电层分层。 A packaging device, comprising: a contact pad located on the surface of the substrate; a dielectric layer located above the surface of the substrate, having an opening exposing the contact pads; and a conductive layer on the over the dielectric layer, the dielectric layer covering the opening, and electrically connected to the contact pad, wherein the conductive layer comprises a seed layer and having a top surface and comprising a sidewall with said dielectric layer spaced apart from the opening end portion, the non-right side walls extend away from the substrate, and the side walls and the top surface in a non-right angle to said end portion for avoiding the stress concentration at the resulting in delamination of the dielectric layer.
  2. 2. 根据权利要求1所述的封装器件,其中,所述导电层的端部的顶面具有钝角或曲面。 The packaging device according to claim 1, wherein the conductive layer top surface of the end portion having an obtuse angle or a curved surface.
  3. 3. 根据权利要求1所述的封装器件,其中,所述导电层的端部为阶梯形,且所述导电层的端部的顶面具有钝角或曲面。 Packaged device according to claim 1, wherein said end portion of the conductive layer is stepped, and the top surface of the end portion of the conductive layer having an obtuse angle or a curved surface.
  4. 4. 根据权利要求1所述的封装器件,其中,所述导电层是共形层,所述导电层位于所述介电层上方的部分的厚度等于所述导电层位于所述介电层的开口内的厚度。 The packaging device according to claim 1, wherein said conductive layer is a conformal layer, the thickness of the conductive layer portion located over the dielectric layer is equal to the conductive layer in said dielectric layer the thickness within the opening.
  5. 5. 根据权利要求1所述的封装器件,其中,所述导电层包括选自由Ti、Al、Ni、钒化镍(NiV)、Cu、Cu合金和它们的组合所组成的组的导电材料。 Packaged device according to claim 1, wherein said conductive layer comprises a conductive material selected from the group consisting of Ti, Al, Ni, a nickel vanadium (NiV), Cu, Cu alloys thereof, and combinations thereof.
  6. 6. 根据权利要求1所述的封装器件,其中,所述介电层的厚度大于5μπι。 The packaged device according to claim 1, wherein the dielectric layer has a thickness greater than 5μπι.
  7. 7. 根据权利要求1所述的封装器件,其中,所述导电层的端部的顶面的钝角介于91°至120°的范围内。 Packaged device according to claim 1, wherein the top surface of the obtuse end portion of the conductive layer is in the range 91 ° to 120 °.
  8. 8. 根据权利要求7所述的封装器件,进一步包括: 第二绝缘层,位于所述导电层上方,所述第二绝缘层具有露出所述导电层的开口;以及凸块下金属化(UBM)焊盘,形成在所述第二绝缘层的开口内且与所述导电层接触。 8. The packaged device according to claim 7, further comprising: a second insulating layer over the conductive layer, the second insulating layer having an opening exposing said conductive layer; and under bump metallization (UBM ) pad formed on and in contact with the conductive layer within the opening of the second insulating layer.
  9. 9. 一种用于形成封装器件的方法,包括: 提供衬底,在所述衬底的表面上具有接触焊盘; 在所述衬底的表面上形成介电层,所述介电层具有露出所述接触焊盘的开口; 在所述介电层上方形成晶种层,以覆盖所述介电层的开口,覆盖所述接触焊盘且与所述接触焊盘接触; 在所述晶种层上方形成光刻胶层,所述光刻胶层具有包括光敏化合物(PAC)的光刻胶材料; 在所述晶种层上方形成覆盖所述晶种层的两端的光刻胶图案; 在未被位于所述晶种层上方且与所述晶种层接触的所述光刻胶图案覆盖的区域中形成导电层,以覆盖所述介电层的开口,并通过所述晶种层电连接至所述接触焊盘,其中,所述导电层具有紧邻所述光刻胶图案的端部,并且所述导电层的端部具有非直角的平滑顶面以用于避免所述端部处的应力集中所导致的所述介电层分层并与所述介电 9. A method for forming a packaged device, comprising: providing a substrate having contact pads on a surface of the substrate; forming a dielectric layer on a surface of the substrate, said dielectric layer having exposing the contact pad openings; forming a seed layer over the dielectric layer to cover the opening of the dielectric layer, and covers the contact pad in contact with the contact pad; said crystal a photoresist layer is formed over the seed layer, the photoresist layer comprises a photoresist material having a photoactive compound (PAC); and covering both ends of the seed layer of photoresist pattern is formed over the seed layer; formed in the areas not located above the seed layer and in contact with the seed layer of the photoresist pattern covering the conductive layer to cover the opening of the dielectric layer, and the seed layer by electrically connected to the contact pad, wherein the conductive layer having a proximate end portion of the photoresist pattern, and the end portion of the conductive layer having a smooth top surface of the non-right angle to said end portion for avoiding the dielectric layer is layered at the stress concentration caused by the dielectric and 的开口间隔开;以及去除所述光刻胶图案。 Spaced apart openings; and removing the photoresist pattern.
  10. 10. 根据权利要求9所述的用于形成封装器件的方法,其中: 在所述晶种层上方形成所述光刻胶图案的步骤包括形成具有包含锐角的表面的所述光刻胶图案;以及在未被所述光刻胶图案覆盖的区域中形成所述导电层的步骤包括紧邻所述光刻胶图案形成具有所述端部的所述导电层,所述导电层的所述端部具有包含钝角的顶面。 A method according to claim for forming a packaged device of claim 9, wherein: said step of forming a photoresist pattern over the seed layer comprises forming the photoresist pattern having a surface comprising acute angle; and the step of forming the conductive layer in areas not covered by the photoresist pattern comprising the photoresist pattern is formed proximate the conductive layer having said end portion, said end portion of the conductive layer comprising a top surface having an obtuse angle.
  11. 11. 根据权利要求9所述的用于形成封装器件的方法,其中: 在所述晶种层上方形成所述光刻胶图案的步骤包括: 在所述晶种层上方形成第一光刻胶图案; 在所述晶种层上方形成第二光刻胶图案,且所述第二光刻胶图案被所述第一光刻胶图案环绕,其中,所述第二光刻胶图案的表面低于所述第一光刻胶图案的表面; 形成连接至所述第一光刻胶图案并位于所述第二光刻胶图案上方的第三光刻胶图案; 以及去除所述第二光刻胶图案,同时保持所述第一光刻胶图案及第三光刻胶图案完整;并且在未被所述光刻胶图案覆盖的区域中形成所述导电层的步骤包括: 形成所述导电层的第一部分,以填充未被位于所述晶种层上方且与所述晶种层接触的所述第一光刻胶图案覆盖的区域,覆盖所述介电层的开口,且通过所述晶种层电连接至所述接触焊盘;以及在所述导 11. A method according to claim for forming a packaged device of claim 9, wherein: the step of forming the photoresist pattern over the seed layer comprises: forming a first photoresist over the seed layer pattern; second photoresist pattern is formed over the seed layer and the second photoresist pattern is surrounded by the first photoresist pattern, wherein the lower surface of the second photoresist pattern surface of the first photoresist pattern; forming a photoresist pattern connected to the first and a third photoresist pattern over said second photoresist pattern; and removing said second lithography adhesive patterns while maintaining the first photoresist pattern and the full third photoresist pattern; and the step of forming the conductive layer in areas not covered by the photoresist pattern comprises: forming a conductive layer a first portion, not to fill the seed layer is positioned above and in contact with the region of the seed layer is covered by the first photoresist pattern, the dielectric layer covering the opening, and through the crystal seed layer is electrically connected to the contact pad; and the guide 层的第一部分上方形成所述导电层的第二部分,以填充未被所述第三光刻胶图案覆盖的区域,所述导电层的第二部分具有紧邻所述第三光刻胶图案的端部,且所述端部具有包含非直角的平滑顶面。 Layer is formed over the first portion of the second portion of the conductive layer to fill the area not covered by the third photoresist pattern, a conductive layer having a second portion proximate the third photoresist pattern an end portion, said end portion and comprises a non-right angle with a smooth top surface.
  12. 12. 根据权利要求9所述的用于形成封装器件的方法,进一步包括: 在所述介电层和所述晶种层之间形成第一绝缘层。 A method according to claim for forming a packaged device of claim 9, further comprising: forming a first insulating layer between the dielectric layer and the seed layer.
  13. 13. 根据权利要求9所述的用于形成封装器件的方法,进一步包括: 在去除所述光刻胶图案的步骤之后,在所述导电层上方形成第二绝缘层; 形成所述第二绝缘层的开口,以露出所述导电层;以及形成位于所述第二绝缘层的开口内且与所述导电层接触的凸块下金属化(UBM)焊盘。 A method according to claim for forming a packaged device of claim 9, further comprising: after the step of removing said photoresist pattern, forming a second insulating layer over the conductive layer; forming a second insulating openings layer to expose said conductive layer; and forming a bump in the opening in the second insulating layer and in contact with the conductive layer of metallization (UBM) pad.
  14. 14. 根据权利要求9所述的用于形成封装器件的方法,其中,在所述介电层上方形成所述晶种层的步骤包括:使用选自包括Cu、T i、T i N、Ta、TaN、Cr、CrN、W、WN、和它们的组合所组成的组中的导电材料来形成所述晶种层。 A method according to claim step of forming a package device according to claim 9, wherein the seed layer is formed over the dielectric layer comprises: including selected from Cu, T i, T i N, Ta , electrically conductive materials TaN, Cr, CrN, W, WN, and combinations thereof consisting of the seed layer to be formed.
  15. 15. 根据权利要求9所述的用于形成封装器件的方法,其中,形成所述导电层的步骤包括:使用选自包括1'^1、呢、钒化镍(呢¥)、〇1、(:11合金和它们的组合所组成的组中的导电材料来形成所述导电层。 15. A method according to claim for forming a packaged device of claim 9, wherein the step of forming the conductive layer comprises: using a group comprising '^ 1, then, a nickel vanadium (it ¥), 〇1, (: 11 alloy, electrically conductive materials, and combinations thereof consisting of the conductive layer is formed.
  16. 16. —种封装器件,包括: 接触焊盘,位于衬底的表面上; 介电层,位于所述衬底的表面上方,具有露出所述接触焊盘的第一开口; 第一绝缘层,位于所述介电层上方且与所述介电层接触,填充所述第一开口的部分且具有第二开口以露出所述接触焊盘;以及导电层,位于所述第一绝缘层上方,且电连接至所述第二开口内的所述接触焊盘,所述导电层包括晶种层且具有包含顶面和侧壁并与所述第二开口间隔开的第一端部,所述顶面和所述侧壁之间的角度大于90度,并且所述侧壁以非90度的角度远离所述衬底进行延伸, 以用于避免所述第一端部处的应力集中所导致的所述介电层分层。 16. - encapsulation device, comprising: a contact pad located on the surface of the substrate; a dielectric layer over the substrate surface, having a first opening exposing the contact pad; a first insulating layer, positioned and in contact with the dielectric layer over the dielectric layer and partially filling the first opening and a second opening to expose the contact pad; and a conductive layer located over the first insulating layer, and electrically connected to said second opening in said contact pad, said seed layer comprises a conductive layer and having a first end portion comprising a top surface and sidewalls of the second opening and is spaced apart from the the angle between the top surface and the sidewall is greater than 90 degrees, and the side walls at an angle other than 90 degrees away from the substrate extend in order to avoid the stress concentration at the first end portion of the lead delamination of the dielectric layer.
  17. 17. 根据权利要求16所述的封装器件,其中,所述导电层具有包含曲面顶面的第二端部。 17. The packaged device according to claim 16, wherein the conductive layer has a second end portion comprising a curved top surface.
  18. 18. 根据权利要求16所述的封装器件,进一步包括: 第二绝缘层,位于所述导电层上方,其中,所述第二绝缘层具有露出所述导电层的第三开口;以及凸块下金属化(UBM)焊盘,形成在所述第二绝缘层的第三开口内且与所述导电层接触。 18. The packaged device according to claim 16, further comprising: a second insulating layer, located above the conductive layer, wherein said second insulating layer having a third opening exposing said conductive layer; and a lower bump metallization (UBM) pad is formed in contact with the conductive layer and the third opening in the second insulating layer.
  19. 19. 根据权利要求16所述的封装器件,其中,所述导电层的所述第一端部包括位于所述介电层上方的第一部分、位于所述第一部分上方的第二部分,且所述导电层的端部的所述第二部分的顶面具有钝角或曲面。 19. The packaged device according to claim 16, wherein said conductive layer comprises a first end portion of the dielectric layer over the first portion, a second portion located above the first portion, and the a top surface of said end portion of said second conductive layer having an obtuse angle or a curved surface.
  20. 20. 根据权利要求16所述的封装器件,其中,所述导电层为共形层,所述导电层位于所述第一绝缘层上方的部分的厚度等于所述导电层位于所述第二开口内的厚度。 20. The packaged device according to claim 16, wherein said conductive layer is a conformal layer, the thickness of the conductive layer located above the first portion of the insulating layer is equal to the conductive layer in the second opening in thickness.
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