KR20060001084A - Phase change ram device using pn diode and method of manufacturing the same - Google Patents

Abstract

The present invention discloses a phase change memory device using a PN diode and a method of manufacturing the same. In the phase change memory device according to the present invention, a phase change occurs between the lower electrode and the upper electrode due to the current flow between the lower electrode and the upper electrode, and thus the phase change occurs from the crystalline state to the amorphous state. The PN diode is formed by alternately forming several P-type regions and N-type regions on the surface of the substrate to form an arbitrary amount of current required for the phase change of the GST film by using the resistance difference according to the difference. In the phase conversion memory device using the formed PN diode, the PN diode is characterized in that the P-type region and the N-type region has a concentric rectangular frame shape alternately formed so that the contact area therebetween increases.

Description

Phase change RAM device using PN diode and method of manufacturing the same

1 is a plan view showing a phase change memory device using a conventional PN diode.

2 is a cross-sectional view taken along line AA ′ of FIG. 1.

FIG. 3 is a schematic diagram for describing a write and read operation of a phase change memory device using a conventional PN diode. FIG.

4A to 4D are cross-sectional views illustrating a method of manufacturing a phase change memory device using a PN diode according to an embodiment of the present invention.

5A and 5B are cross-sectional views illustrating a method of manufacturing a phase change memory device using a PN diode according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

40: active region N1, N2, N3: N-type region

P1, P2, P3: P type region 50: PN diode

52: Bitline Contact 54: Storage Node Contact

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase change memory device and a method of manufacturing the same, and more particularly, to a phase change memory device using a PN diode and a method of manufacturing the same.

Generally, a memory device is a volatile random access memory (RAM) device that loses input information when the power is cut off, and a ROM that keeps the input data stored even when the power is cut off. ) Are largely divided into elements. The volatile RAM devices may include DRAM and SRAM, and the nonvolatile ROM devices may include flash memory devices such as EEPROM (Elecrtically Erasable and Programmable ROM). have.

However, although the DRAM is a very good memory device as is well known, high charge storage capability is required for periodic refresh operation, and for this purpose, it is difficult to achieve high integration since the electrode surface area must be increased. In addition, the flash memory device requires a higher operating voltage than a power supply voltage in connection with a structure in which two gates are stacked, and thus requires a separate boost circuit to form a voltage required for write and erase operations. Therefore, there is a difficulty in high integration.

Accordingly, many studies have been conducted to develop new memory devices having characteristics of non-volatile memory devices and simple structures. For example, a phase change RAM device is proposed. It became.

The phase change memory device uses a difference in resistance between crystalline and amorphous phases due to a phase change from the crystalline state to the amorphous state between the electrodes through the current flow between the lower electrode and the upper electrode. It is a storage element for determining the information stored in the.

In other words, the phase-conversion memory device uses a chalcogenide film as a phase-conversion film, which is a compound film composed of germanium (Ge), stevidium (Sb), and tellurium (Te). GST film), a phase change occurs between an amorphous state and a crystalline state by an applied current, that is, Joule heat, wherein the specific resistance of the phase change film having an amorphous state is in a crystalline state. Since it is higher than the specific resistance of the phase change film having a value, the current flowing through the phase change film in the read mode is sensed to determine whether the information stored in the phase change memory cell is logic '1' or logic '0'.

In addition, the conventional phase-change memory element uses a PN diode to form an amount of current of 1 mA or more necessary for causing a phase change of the GST film to occur.

1 to 3 are diagrams for explaining a phase change memory device using a conventional PN diode, FIG. 1 is a plan view, FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1, and FIG. It is a schematic diagram for explaining the operation.

As shown in FIGS. 1 and 2, a conventional phase-conversion memory device using a PN diode is a silicon on insulator (SOI) substrate having a buried oxide film 2 and a silicon layer 3 stacked on a silicon wafer 1. Several P-type regions P1, P2, P3 and N-type regions N1, N2, N3 are alternately formed on the surface of the silicon layer 3 of 10 to form a PN diode, and the third N-type on both left and right sides is formed. The bit line contact 13 is formed to contact the region N3 and the first P-type region P1, respectively, and the bit line 14 is formed to be connected to the bit line contacts 13. In addition, a storage node contact 15 is formed to simultaneously contact a central third P-type region P3 and a second N-type region N2, and a lower electrode 16 is formed on the storage node contact 15. The GST layer 17 is formed on the side of the lower electrode 16, the upper electrode 18 is formed on the GST layer 17, and the upper electrode 18 is formed on the upper electrode 18. Make contact with the upper electrode 18 has a structure formed of metal wires (19).

In the phase change memory device using the PN diode, the GST film 17 is transferred from the amorphous state to the crystalline state by allowing a current to flow from the lower electrode 16 to the upper electrode 18 through the GST film 17. The change occurs to amplify the low and high according to the current during the read operation.

That is, as shown in FIG. 3, in a write operation, a forward current flow is formed from node a in the high state to node b in the low state through the PN diode P1N1P2N2, and thus the lower electrode. (16) The phase change of the GST layer 17 in contact with the edge occurs, and in the read operation, the node "b" from the node "high" to the node "c" in the state "low" through the PN diode (P3N3). The current flow in the forward direction is formed, and at this time, the current intensity varies according to the degree to which the resistance is increased or decreased by the phase change of the GST film 17, thereby amplifying. In FIG. 3, Rd denotes a PN diode for a read operation, and Wd denotes a PN diode for a write operation.

However, in the phase-conversion memory device using the conventional PN diode, the P-type region and the N-type region contact only in parallel in the horizontal direction in terms of increasing the amount of current between the write operation PN diode and the read operation PN diode. Since the structure is an interface, it is very inefficient, and thus there is a limit to the increase in the amount of current.

Accordingly, an object of the present invention is to provide a phase conversion memory device using a PN diode that is structurally very efficient in terms of increasing the amount of current, and a method of manufacturing the same.

In order to achieve the above object, the present invention, the crystalline and from the phase change from the crystalline state to the amorphous state of the GST film interposed between the lower electrode and the upper electrode by the current flow between the lower electrode and the upper electrode The information stored in the cell is determined using the resistance difference according to the amorphous phase, and PN and N-type regions are alternately formed on the surface of the substrate to form an arbitrary amount of current required for the phase change of the GST film to occur. A phase conversion memory device using a PN diode having a diode, wherein the PN diode has a concentric rectangular frame shape alternately formed so that the contact area between the P-type region and the N-type region is increased. A phase conversion memory device using a PN diode is provided.

In addition, the phase conversion memory device using the PN diode of the present invention comprises a plurality of bit line contacts formed to be contacted at regular intervals so that the current flows smoothly in each of the square-shaped P-type region and the N-type region, And a plurality of storage node contacts formed to be in contact with any P-type region and N-type region at the same time.                     

In addition, in order to achieve the above object, the present invention, the phase change occurs in the GST film interposed between the lower electrode and the upper electrode from the crystalline state to the amorphous state by the current flow between the lower electrode and the upper electrode The information stored in the cell is determined by using the resistance difference according to the crystalline and the amorphous, and several P-type and N-type regions are alternately formed on the substrate surface to form an arbitrary amount of current required for the phase change of the GST film to occur. In the method of manufacturing a phase conversion memory device using a PN diode constituting a PN diode, the PN diode is alternately arranged in a P-type region and an N-type region having a concentric rectangular frame shape so as to increase the contact area therebetween. A method of manufacturing a phase change memory device using a PN diode, which is formed in a structure, is provided.

The P-type region and the N-type region may be formed using two mask processes and an ion implantation process.

In addition, the method of manufacturing a phase change memory device using the PN diode of the present invention comprises a plurality of bit line contacts to be contacted at regular intervals so that current flows smoothly in each of the P-type and N-type regions of the rectangular frame shape. In addition, a plurality of storage node contacts may be further formed at regular intervals so as to be simultaneously contacted to any P-type region and N-type region.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.                     

4D is a cross-sectional view illustrating a phase change memory device using a PN diode according to an embodiment of the present invention.

First, although not shown, in the phase change memory device using the PN diode according to the present invention, the GST film interposed between the lower electrode and the upper electrode is changed in phase from the crystalline state to the amorphous state by the current flow between the lower electrode and the upper electrode. Is a memory device that discriminates information stored in a cell by using resistance differences between crystalline and amorphous phases, and several P-type regions and N are formed on a substrate surface to form an arbitrary amount of current required for a phase change of the GST film to occur. It has a structure in which a PN diode is formed by alternately forming the mold regions.

In the phase change memory device using the PN diode of the present invention, as shown, the PN diode 50 has a P-type region (P1, P2, P3) and an N-type region (N1, N2, N3). Unlike the conventional ones, the contact area between them is increased to have a concentric rectangular frame shape and alternately formed.

In addition, the bit line contacts 52 may be formed so that the current flows smoothly in the P-type regions P1, P2, and P3 and the N-type regions N1, N2, and N3 having concentric rectangular frame shapes. Dogs are formed to be contacted at regular intervals. For example, the bit line contact 52 is formed to be contacted one by each side of the rectangular frame shape. In addition, similar to the bit line contact 52, several storage node contacts 54 contacting one P-type region P3 and the N-type region N2 are also formed to be contacted at regular intervals.

In the phase change memory device using the PN diode of the present invention, the contact area between the P-type region and the N-type region is significantly larger than that of the conventional art, so that the amount of current is considerably high, so that the amount of current required for the phase change of the GST film can be formed quickly. It has a fast operation speed.

Hereinafter, a method of manufacturing a phase change memory device using a PN diode according to an embodiment of the present invention will be described with reference to FIGS. 4A to 4D.

Referring to FIG. 4A, an isolation layer (not shown) defining an active region 40 is formed in a substrate according to a known LOCOS (LOCal Oxidation Silicon) process or a shallow trench isolation (STI) process.

Referring to FIG. 4B, a mask pattern (not shown) is formed on a limited substrate to expose a portion where an N-type region is to be formed according to a known mask process. N-type impurities are implanted into the exposed surface of the substrate active region to form N-type regions N1, N2, and N3. In this case, the mask pattern is formed so as to expose a portion where the N-type regions are to be formed in a concentric square frame shape unlike the conventional one, and through this, the N-type regions N1, N2, and N3 are formed in a concentric square frame shape. To form.

Referring to FIG. 4C, a mask pattern (not shown) covering the N-type regions N1, N2, and N3 is formed on a substrate product on which the N-type regions N1, N2, and N3 are formed according to a known mask process. In one state, P-type impurities are ion-implanted into the exposed portions of the substrate using the mask pattern, and are alternately disposed with the N-type regions N1, N2, and N3, and P-type regions having a concentric rectangular frame shape. (P1, P2, and P3) are formed, and through this, the PN diode 50 is formed.                     

Referring to FIG. 4D, in a state in which an oxide film (not shown) is formed on a substrate resultant on which the PN diode 50 is formed, the oxide film is etched to form P-type regions P1 and N-type regions N3 at right and left edges. Exposed contact holes are formed, and then a bit line contact 52 is formed by filling a conductive film such as polysilicon or a metal film in the contact holes. In this case, the bit line contacts 52 are formed to be arranged at several intervals, for example, one at each side in a rectangular frame shape so that current flows smoothly in the P-type and N-type areas of the rectangular frame shape.

In addition, when the bit line contact 52 is formed, a storage node contact 54 simultaneously contacting the P-type region P3 and the N-type region N3 at the center of the PN diode 50 is formed together. In addition, it is formed to be arranged one by each side of the rectangular frame shape so that the current flows smoothly.

Subsequently, although not shown, a series of subsequent processes including a lower electrode forming process, a GST film forming process, an upper electrode forming process, and a metal wiring forming process are sequentially performed, thereby converting a phase using a PN diode according to an embodiment of the present invention. Complete the memory element.

Meanwhile, in the above-described embodiment of the present invention, after the N-type region is formed, the P-type region is formed by forming the P-type region, but as another embodiment of the present invention, as shown in FIG. After forming (P1, P2, P3) first, as shown in FIG. 5B, the N-type regions N1, N2, N3 may be formed later to configure the PN diode 50. FIG.

As described above, the present invention can considerably increase the amount of current by increasing the contact area therebetween by changing the shape of the P-type region and the N-type region constituting the PN diode, and thus, it is necessary to change the phase of the GST film. Since the amount of current can be formed quickly, the driving speed of the phase conversion memory element can be improved.

As mentioned above, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (7)

The GST film interposed between the lower electrode and the upper electrode due to the flow of current between the lower electrode and the upper electrode causes a phase change from the crystalline state to the amorphous state. And a PN diode in which several P-type regions and N-type regions are alternately formed on the surface of the substrate to form an arbitrary amount of current necessary for the phase change of the GST film to occur. In The PN diode is a phase-conversion memory device using a PN diode, characterized in that the P-type region and the N-type region has a concentric rectangular frame shape alternately formed so that the contact area therebetween increases. The method of claim 1, And a plurality of bit line contacts formed to be contacted at predetermined intervals so that current flows smoothly in each of the square-shaped P-type region and the N-type region. The phase change memory device of claim 1, further comprising a plurality of storage node contacts formed to simultaneously contact the arbitrary P-type region and the N-type region. The GST film interposed between the lower electrode and the upper electrode due to the flow of current between the lower electrode and the upper electrode causes a phase change from the crystalline state to the amorphous state. In order to form an arbitrary amount of current required for the phase change of the GST film, a plurality of P-type regions and N-type regions are alternately formed on the surface of the substrate to form a PN diode. In the manufacturing method, The PN diode is a method of manufacturing a phase-change memory device using a PN diode, characterized in that the P-type region and the N-type region is formed in a structure arranged alternately having a concentric rectangular frame shape so that the contact area therebetween increases. The method of claim 4, wherein And the P-type region and the N-type region are formed using two mask processes and an ion implantation process. The method of claim 4, wherein And forming a plurality of bit line contacts to be contacted at regular intervals so that current flows smoothly in each of the square-shaped P-type region and the N-type region. The method of claim 4, wherein And forming a plurality of storage node contacts at regular intervals to be in contact with the arbitrary P-type region and the N-type region at the same time.

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