KR20050120144A - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device.

A liquid crystal panel assembly including a plurality of first pixels each including a switching element, a data line and a gate line connected to the first pixel, a common voltage generator configured to apply a common voltage to the liquid crystal panel assembly, A gray voltage generator for generating a plurality of gray voltages, a plurality of data driving integrated circuits for selecting and applying a gray voltage corresponding to an image signal among the gray voltages, and a plurality of data having the same structure as that of the first pixel A sensing unit including a second pixel, and a common voltage correction unit for correcting the output voltage from the sensing unit to apply to the data driving integrated circuit. In this way, by correcting the common voltage by outputting the data voltage applied to the pixel, it is possible to more accurately correct the common voltage and minimize flicker.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

The present invention relates to a liquid crystal display device.

BACKGROUND ART A liquid crystal display (LCD) includes a lower panel including a pixel electrode and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween and an upper panel. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent degradation caused by an electric field applied to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row by pixel, or pixel by pixel.

On the other hand, such a liquid crystal display includes a storage capacitor together with a liquid crystal capacitor in order to increase the holding capacity of the data voltage. In the storage capacitor, a separate signal line and a pixel electrode of the lower display panel overlap each other with an insulator interposed therebetween, and a predetermined voltage such as a common voltage is applied to the separate signal line.

In addition, the switching element of the pixel is a three-terminal element having a control electrode, an input electrode and an output electrode, and parasitic capacitance exists between the control electrode and the input electrode and between the control electrode and the output electrode.

At this time, a so-called kickback phenomenon occurs in which the data voltage applied to the pixel decreases due to the presence of such parasitic capacitance. This kickback phenomenon causes flicker in which the screen flickers due to the difference between the positive voltage and the negative voltage applied to the liquid crystal when the inversion driving is performed based on the common voltage.

Accordingly, an object of the present invention is to provide a liquid crystal display device which can minimize flicker.

According to an exemplary embodiment of the present invention, a liquid crystal display assembly includes a plurality of first pixels each including a switching element, and a data line and a gate line connected to the first pixel. A common voltage generator configured to apply a common voltage to the liquid crystal panel assembly, a gray voltage generator configured to generate a plurality of gray voltages, and a gray voltage corresponding to an image signal among the gray voltages to be applied to the first pixel A plurality of data driving integrated circuits, a sensing unit including a plurality of second pixels having the same structure as the first pixel, and a common voltage correction applied to the data driving integrated circuits by correcting an output voltage from the sensing unit. Contains wealth. In this case, the liquid crystal panel assembly includes a display area and a peripheral area, and the second pixel is formed in the peripheral area of the liquid crystal panel assembly.

It is preferable. In addition, the second pixel includes a plurality of pixel groups, and one of the pixels belonging to the pixel group is applied with a data voltage having a positive polarity with respect to the common voltage, and a negative polarity with respect to the common voltage. It is preferable that a data voltage having

The pixel group may output first and second voltages, and the first and second voltages may have different values from the positive data voltage and the negative data voltage.

In this case, the common voltage corrector may include a voltage follower and a resistor string having a center connected to one end of the voltage follower.

Here, it is preferable that the first and second voltages are connected to both ends of the resistor string, and the resistor string includes first and second resistors, and the first and second resistors have the same value. desirable.

At this time, it is preferable that the positive data voltage and the negative data voltage have a value corresponding to an intermediate value of the gray scale voltage.

Meanwhile, the sensing unit outputs a plurality of output voltage groups, the common voltage corrector corrects the common voltage based on the output voltage group, and the liquid crystal panel assembly includes a plurality of regions each receiving the corrected common voltage. It may include.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention. 3 is an example of a circuit diagram of the sensing unit illustrated in FIG. 1, and FIG. 4 is an example of a circuit diagram of the common voltage correction unit illustrated in FIG. 1.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. And a gray voltage generator 800, a common voltage corrector 700, and a signal controller 600 for controlling the gray voltage generator 800 connected to the 500, and a detector 350 included in the liquid crystal panel assembly 300. .

The liquid crystal panel assembly 300, when viewed as an equivalent circuit, includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m, DP, DN, and a plurality of pixels connected thereto and arranged in a substantially matrix form. ).

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data line D for transmitting a data signal. ₁ -D _m , DP, DN). The gate lines G ₁ -G _n extend substantially in the row direction, are substantially parallel to each other, and the data lines D ₁ -D _m , DP, DN) extend in approximately the column direction and are substantially parallel to each other.

Each pixel has a display signal line (G ₁ -G _n , D ₁ -D _m , DP, DN)) and a switching element Q connected thereto, and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage V _com is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, to implement color display, each pixel uniquely displays one of the three primary colors (spatial division) or each pixel alternately displays the three primary colors over time (time division) so that the desired color can be selected by the spatial and temporal sum of these three primary colors. To be recognized. 2 shows that each pixel includes a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190 as an example of spatial division. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n and usually consists of a plurality of integrated circuits.

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. It consists of a circuit.

The plurality of gate driving integrated circuits or data driving integrated circuits may be mounted in a tape carrier package (TCP) (not shown) in the form of a chip to attach the TCP to the liquid crystal panel assembly 300, and may be advantageous without using TCP. These integrated circuit chips may be directly attached onto a substrate (chip on glass, COG mounting method), and a circuit performing the same functions as those integrated circuit chips may be formed directly on the liquid crystal panel assembly 300 together with the thin film transistors of the pixel. It may be.

The detector 350 includes a plurality of pixels having the same structure as the pixels included in the display area D, and is provided in the black matrix area BM covered by a black matrix in a peripheral area of the display area D. The data voltage applied to the pixel is output and provided to the common voltage corrector 700.

The common voltage corrector 700 corrects the common voltage V _com based on the feedback voltage VFB from the detector 350 and applies it to the data driver 500.

The signal controller 600 controls operations of the gate driver 400 and the data driver 500.

The display operation of such a liquid crystal display device will now be described in detail.

The signal controller 600 may control the input image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to

The gate control signal (CONT1) includes a gate-on voltage vertical synchronization start signal (STV) for instructing the start of output of the (V _on), the gate-on voltage gated clock signal that controls the output timing of the (V _on) (CPV) and the gate-on An output enable signal OE or the like that defines the duration of the voltage V _on .

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of input of the image data DAT, a load signal LOAD for applying a corresponding data voltage to the data lines D ₁ -D _m , and a common voltage ( V inverted signal (RVS), data clock signal (HCLK), etc. to invert the polarity of the data voltage for the _com (hereinafter referred to as "polarity of the data voltage by reducing the polarity of the data voltage for the common voltage"), etc. do.

The data driver 500 sequentially receives and shifts the image data DAT for one row of pixels according to the data control signal CONT2 from the signal controller 600, and the gray voltage from the gray voltage generator 800. The grayscale voltage corresponding to each image data DAT is selected to convert the image data DAT into a corresponding data voltage, and then apply the grayscale voltage to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. ) Turns on the switching element Q connected thereto, so that the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned-on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The arrangement of the liquid crystal molecules varies according to the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) within one frame or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS ( "Dot reversal").

Then, the structure and operation of the detector 350 and the common voltage corrector 700 will be described in more detail.

As illustrated in FIG. 3, the detector 350 is provided in the black matrix area BM and includes a plurality of pixels.

Each pixel includes a switching element Qs connected to the display signal lines G ₁ , G ₂ , G _j-1 , G _j , G _n-1 , G _n , DP, DN, and a liquid crystal capacitor C _LC connected thereto. And a holding capacitor C _ST . The switching element Qs is also provided on the lower display panel 100, and the control terminal is a three-terminal element, and the control terminal is provided on the gate lines G ₁ , G ₂ , G _j-1 , G _j , G _n-1 , and G _n . The input terminals are alternately connected to the two data lines DP and DN, and the output terminals are connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The sensing unit 350 is provided with, for example, six pixels, and the pixels are composed of three sets of two. The control terminal of the switching element Qs of the pixel is connected to the gate lines G ₁ , G ₂ , G _j-1 , G _j , G _n-1 , G _n , and the input terminals are two data lines DP, DN). Data line (DP), the data voltage is applied with a positive polarity with respect to the common voltage (V _com), a data line (DN) is applied with a data voltage having negative polarity with respect to the common voltage (V _com). This is to consider that the positive and negative data voltages are applied to the common voltage V _com in the pixel row or pixel column unit when the data driver 500 performs 1 × 1 dot inversion.

In this case, the applied data voltage is a data voltage having a constant value. For example, when the image data DAT is 6 bits and the gradation range is 64 gradations, the positive and negative polarities corresponding to the intermediate 32 gradations The data voltage of is applied. Of course, it is also possible to apply data voltages corresponding to different gray levels, but it is preferable to apply a value that is not biased to either side and take the output value of the value and correct it in terms of accuracy of correction. Then, the voltage of the output terminal of the switching element Qs is output, respectively, and this output voltage is applied to the common voltage corrector 700 shown in FIG.

As shown in FIG. 4, the common voltage corrector 700 includes a voltage follower OPA and a resistor string connected thereto. 4 illustrates only one of circuits forming the common voltage corrector 700.

The non-inverting terminal of the voltage follower OPA is connected to the center of the resistor string. Both terminals of the resistor string receive a feedback voltage VFB, for example, two output voltages V _P1 and V _N1 from the detector 350.

At this time, when two output voltages V _P1 and V _N1 are input to both ends of the resistor strings R1 and R2, the common voltage V _com1 is determined as follows.

At this time, if the values of the two resistors are the same, the common voltage becomes an average value of the two output voltages V _P1 and V _N1 .

This prevents flicker caused by the difference between the positive and negative pixel voltages when the data voltage decreases due to the kickback voltage.

For example, when the common voltage V _com is 5 V, the positive data voltage corresponding to 32 gradations is 7.5 V, and the negative data voltage is 2.5 V, the output voltages V _P1 and V _N1 are 7.5 V. And 2.5V. However, if the data voltage decreases by 0.5V each due to the kickback voltage, the positive voltage is 7V and the negative voltage is 2V, so the pixel voltages are 2V and -3V. At this time, since the output voltage V _P1 is 7V and the output voltage V _N1 is 2V, the common voltage V _com1 is 4.5V. That is, the average value of the two output voltages V _P1 and V _N1 is taken and set as the common voltage V _com1 . Then, the pixel voltage becomes 2.5V and -2.5V with respect to the positive and negative data voltages, so that the absolute value is the same. In addition, the remaining output voltages V _P2 , V _N2 , V _P3 and V _N3 may also be averaged in this manner to extract the common voltages V _com2 and V _com3 .

Next, the extracted common voltages V _com1 , V _com2 , and V _{com3 are} transferred to a common electrode 270 through a dummy channel (not shown) and a short point (not shown) of the data driving IC. To apply.

In this manner, the flicker can be prevented by correcting the common voltage V _com so that the absolute value of the pixel voltages for the positive and negative polarities is the same.

Meanwhile, in the exemplary embodiment of the present invention, the data voltages at the corresponding points are output by compensating the area of the screen by three, respectively, and compensated for this, but they may be divided into more or less.

As described above, the pixel having the same structure as the pixel of the display area is disposed in the peripheral area, and the output voltage of the pixel is sensed to correct the common voltage, thereby reducing the flicker phenomenon.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an example of a circuit diagram of the sensing unit illustrated in FIG. 1.

4 is an example of a circuit diagram of the common voltage corrector shown in FIG. 1.

Claims (9)

A liquid crystal panel assembly including a plurality of first pixels each including a switching element, and a data line and a gate line connected to the first pixel; A common voltage generator configured to apply a common voltage to the liquid crystal panel assembly; A gray voltage generator generating two gray voltages; A plurality of data driving integrated circuits selecting a gray voltage corresponding to an image signal among the gray voltages and applying the gray voltage to the first pixel; A detector including a plurality of second pixels having the same structure as the first pixel, and The common voltage corrector correcting the output voltage from the sensing unit and applying the same to the data driving integrated circuit. Liquid crystal display comprising a. In claim 1, The liquid crystal panel assembly includes a display area and a peripheral area, The second pixel is formed in a peripheral area of the liquid crystal panel assembly. Liquid crystal display. In claim 2, The second pixel includes a plurality of pixel groups, A data voltage having a positive polarity with respect to the common voltage is applied to one of the pixels belonging to the pixel group, and a data voltage having a negative polarity with respect to the common voltage is applied to the other one. In claim 3, The pixel group outputs first and second voltages, The first and second voltages are different from the positive data voltage and the negative data voltage. Liquid crystal display. In claim 4, The common voltage corrector includes a voltage follower and a resistor string having a center connected to one end of the voltage follower. In claim 5, And a first voltage and a second voltage connected to both ends of the resistor string. In claim 6, The resistor string includes first and second resistors, The first and second resistors have the same value Liquid crystal display. In claim 7, And the data voltage of the positive polarity and the data voltage of the negative polarity have a value corresponding to an intermediate value of the gray scale voltage. In claim 1, The sensing unit outputs a plurality of output voltage group, The common voltage corrector corrects the common voltage based on the output voltage group, The liquid crystal panel assembly includes a plurality of regions to which the corrected common voltage is applied, respectively. Liquid crystal display.