KR20050104265A - Plasma display panel - Google Patents

Abstract

According to the present invention, a plasma display panel is disclosed. The plasma display panel includes a transparent upper substrate, a lower substrate disposed parallel to the upper substrate, a first partition wall disposed between the upper substrate and the lower substrate, defining discharge cells together with the upper substrate and the lower substrate, and formed of a dielectric. Upper discharge electrodes disposed in the first partition wall to surround the discharge cell, lower discharge electrodes disposed in the first partition wall to surround the discharge cell and spaced apart from the upper discharge electrode, a phosphor layer disposed in the discharge cell, and a discharge With the discharge gas in the cell, the upper discharge electrode and the lower discharge electrode have different conductances. According to the disclosed plasma display panel, the luminous efficiency is improved and smooth addressing is possible at a low driving voltage.

Description

Plasma display panel {Plasma display panel}

The present invention relates to a plasma display panel that implements an image using gas discharge.

Recently, a device employing a plasma display panel as a flat panel display device has a large screen and has excellent characteristics of high definition, ultra-thin, light weight, and wide viewing angle, and is easier to manufacture than other flat panel display devices. It is attracting attention as a large flat panel display device.

The plasma display panel is classified into a direct current (DC) type, an alternating current (AC) type, and a hybrid type according to an applied discharge voltage, and classified into a counter discharge type and a surface discharge type according to a discharge structure. Recently, most plasma display panels produced at home and abroad are three-electrode surface discharge plasma display panels.

1 illustrates a conventional three-electrode surface discharge plasma display panel. The illustrated plasma display panel includes an upper substrate 11 and a lower substrate 21 disposed to face the upper substrate 11. Discharge sustaining electrode pairs 16 are disposed on the lower surface of the upper substrate 11, and the upper dielectric layer 14 and the protective film 15 covering the upper dielectric layer 14 are embedded in this order. Here, one electrode of the discharge sustaining electrode pair 16 is the scan electrode 12, the other electrode is the common electrode 13, and the scan electrode 12 and the common electrode 13 are transparent electrodes 12a and 13a, respectively. ) And bus electrodes 12b and 13b.

On the other hand, an upper surface of the lower substrate 21 is formed with an address electrode 22 extending to intersect with the discharge sustaining electrode pair 16 and a lower dielectric layer 23 embedded therein. A partition wall 24 is formed on the lower dielectric layer 23 to partition the plurality of discharge cells 26. The phosphor layer 25 is disposed on the lower dielectric layer 23 over the partition wall 24, and the space inside the discharge cell 26 is filled with discharge gas.

In such a plasma display panel, plasma is formed by discharge performed by the discharge sustaining electrode pair 16, and the phosphor layer 25 is excited by vacuum ultraviolet radiation emitted from the formed plasma, and visible light is emitted to emit an image. Is implemented.

By the way, in the conventional three-electrode surface discharge structure shown in the drawing, while diverging visible light passes through the discharge sustaining electrode pair 16 formed on the lower side of the upper substrate 11, the upper dielectric layer 14, and the protective film 15, Up to about 40% of the visible light is absorbed by these structures, there is a problem that the luminous efficiency is very low.

In addition, when the same image is displayed for a long time, there is a problem that the charged particles of the discharge gas strike the phosphor layer 25 and cause permanent afterimages.

In order to solve the above problems, an object of the present invention is to provide an improved plasma display panel in which luminous efficiency and driving efficiency are improved, and deterioration of a phosphor layer is prevented.

Another object of the present invention is to provide a plasma display panel having an improved structure such that smooth addressing can be performed at a low driving voltage.

In order to achieve the above objects and other objects, the plasma display panel of the present invention,

Transparent upper substrate;

A lower substrate disposed in parallel with the upper substrate;

A first partition wall disposed between the upper substrate and the lower substrate and defining discharge cells together with the upper substrate and the lower substrate and formed of a dielectric;

Upper discharge electrodes disposed in a first partition wall to surround the discharge cell;

Lower discharge electrodes disposed in a first partition wall to surround the discharge cell and spaced apart from the upper discharge electrode;

A phosphor layer disposed in the discharge cell; And

A discharge gas in the discharge cell;

The upper discharge electrode and the lower discharge electrode have different conductances.

The upper discharge electrodes and the lower discharge electrodes may extend in one direction, and the plasma display panel may further include address electrodes extending to intersect the upper discharge electrode and the lower discharge electrode in the discharge cell. can do.

In this case, the address electrode is preferably disposed between the lower substrate and the phosphor layer, and a dielectric layer is preferably disposed between the phosphor layer and the address electrode.

In this case, preferably, the upper discharge electrode serves as a common electrode, and the lower discharge electrode serves as a scan electrode.

In the present invention, the lower discharge electrode may be formed such that its cross-sectional area is wider than that of the upper discharge electrode.

In addition, the conductive material forming the lower discharge electrode preferably has a higher electrical conductivity (conductivity) than the conductive material forming the upper discharge electrode.

The plasma display panel of the present invention may further include a second partition wall defining a discharge cell together with the first partition wall, wherein the phosphor layer is disposed at the same level as the second partition wall. Do.

Next, the plasma display panel according to the first embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4. 2 is an exploded perspective view showing a plasma display panel according to a first embodiment of the present invention, Figure 3 is a cross-sectional view taken along the line III-III of Figure 2, Figure 4 is an electrode structure of the plasma display panel of FIG. Is a perspective view. Referring to FIG. 2, the plasma display panel according to the present exemplary embodiment includes an upper substrate 111 and a lower substrate 121 disposed on a lower side thereof (as opposed to z). The upper substrate 111 and the lower substrate 121 are typically formed of a material mainly containing glass. In particular, when the upper substrate 111 is used as the image display surface, it is preferable that the upper substrate 111 is formed of a transparent substrate having excellent light transmittance. The upper substrate 111 and the lower substrate 121 define the discharge cells 130 in the vertical direction, where the discharge cells 130 are formed of one of red subpixels, green subpixels, and blue subpixels constituting one pixel. Subpixels. The discharge cell 130 is defined in the up and down direction by the upper substrate 111 and the lower substrate 121. The one discharge cell 130 of FIG. 3 is in the up and down direction from the lower surface of the upper substrate 111 to the lower substrate ( It means to include the area up to the top surface of 121, and more specifically, it includes a discharge space formed in the panel, the phosphor layer 125, the dielectric layer 123, the address electrode 122.

As shown in FIG. 2, a first partition wall 114 is formed below the upper substrate 111. Prevent discharge. The first partition wall 114 may extend in the x and y directions to form a matrix. The first partition wall 114 of the present invention is not limited to such a matrix shape, but may also be an open partition wall such as a stripe or the like and a closed partition wall such as a waffle or a delta. Here, the closed partition wall may be formed such that the shape when viewed from above is a polygon such as a triangle, a pentagon, or a circle, an ellipse, or the like, in addition to the quadrangle as in the present embodiment. The first partition wall 114 formed of a dielectric material prevents the upper discharge electrode 112 and the lower discharge electrode 113 from being directly energized during discharge and induces accumulation of wall charges. Dielectrics forming the first partition 114 include PbO, B ₂ O ₃ , SiO _2, and the like.

The side surface of the first partition wall 114 is preferably covered by the protective film 115. The protective film 115 prevents charged particles from being damaged by collision with the first partition wall 114 by the discharge, and the secondary Allow a lot of electrons to be emitted. The protective film 115 may typically be formed of an MgO film.

An upper discharge electrode 112 and a lower discharge electrode 113 are embedded in the first partition wall 114. The upper discharge electrode 112 and the lower discharge electrode 113 are disposed to be spaced apart from each other in the vertical direction. The sustain discharge is performed by these discharge electrodes 112 and 113 to realize an image. Referring to FIG. 4, the upper discharge electrode 112 and the lower discharge electrode 113 are disposed in parallel to each other, and are formed in a ladder shape and surround the four side surfaces of the discharge cell 130 and extend in the x direction. One of the discharge electrodes 112 and 113 serves as a scan electrode, and the other electrode serves as a common electrode. When the scan electrode is disposed adjacent to the address electrode 122, the address voltage can be lowered. Therefore, in this embodiment, the lower discharge electrode 113 adjacent to the address electrode 122 acts as the scan electrode. In this embodiment, the cross-sectional area of the lower discharge electrode 113 is formed to be wider than that of the upper discharge electrode 112. As shown in FIG. 3, the thickness tb of the lower discharge electrode 112 is the upper discharge electrode ( It may be formed thicker than the thickness ta of 112. This means that the conductance of the lower discharge electrode 113 is greater than the conductance of the upper discharge electrode 112. Here, conductance means the inverse of the resistance, which is proportional to the cross-sectional area of the electrode and the conductivity specific to the material forming the electrode, and inversely proportional to the length of the electrode. Since the lower discharge electrode 113 having a large cross-sectional area has a lower voltage drop due to the resistance of the electrode itself, an equivalent wall charge accumulation effect can be obtained even at a lower driving voltage in the address discharge AD. More smooth addressing can be achieved. In particular, when the thickness tb of the lower discharge electrode 113 is increased, the address discharge surface Ab becomes wider and the discharge distance AL of the address discharge is shortened, so that addressing can be performed more easily. have.

The upper discharge electrode 112 and the lower discharge electrode 113 are formed of a metal material having excellent electrical conductivity, for example, Ag, Cu, Al, or the like. This is to minimize the voltage drop due to the resistance of the electrode itself, to improve driving efficiency and response speed, and to apply a uniform voltage to a discharge cell disposed at a relatively long distance from the point of application of the voltage.

2, an address electrode 122 is disposed on the lower substrate 121. The address electrodes 122 may be formed in a stripe pattern along the discharge cells 130 in one row. As shown in FIG. 4, the address electrodes 122 intersect with the extending directions (x directions) of the discharge electrodes 112 and 113 (y directions). ) Is extended. The address electrode 122 is used to generate an address discharge for facilitating sustain discharge between the upper discharge electrode 112 and the lower discharge electrode 113. More specifically, the address electrode 122 serves to lower the voltage at which the sustain discharge starts. . The address discharge is a discharge occurring between the scan electrode and the address electrode 122. When the address discharge is completed, cations accumulate on the scan electrode side and electrons accumulate on the common electrode side, thereby making it easier to sustain discharge between the scan electrode and the common electrode. Done.

As shown in FIG. 2, the address electrodes 122 are buried by the dielectric layer 123. The dielectric layer 123 damages the address electrode 122 because charged particles of the discharge gas collide directly with the address electrode 122. It is prevented from inducing and induces wall charge. Examples of the dielectric for forming the dielectric layer 123 include PbO, B ₂ O ₃ , and SiO ₂ .

The second partition 124 is formed on the dielectric layer 123. The second partition 124 together with the first partition 114 defines a side surface of the discharge cell 130. In the embodiment of Figure 2, it is formed in a matrix shape extending in the x direction and the y direction. The second partition wall 124 of the present invention can be formed in a variety of structures other than such a matrix shape, for example, as well as an open partition structure of a stripe pattern, formed of a closed partition structure such as waffle, delta type. May be Further, the second partition wall 124 may be formed such that the shape when viewed from above is a polygonal structure such as a pentagon or a curved structure such as an ellipse or a circle, in addition to the quadrangle shown in the drawing.

The phosphor layer 125 is formed at the same level as the second barrier 124, which means that the phosphor layer 125 is disposed at the same height as the second barrier 124. More specifically, in the present embodiment, the phosphor layer 125 is disposed on the side of the second partition 124 on the dielectric layer 123 surrounded by the second partition 124. Each of the discharge cells 130 is divided into a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel according to the type of the phosphor layer 125 disposed. The phosphor layer 125 includes a component that receives vacuum ultraviolet rays emitted from the plasma generated by the discharge and converts them into visible light. For example, the phosphor layer formed on the red light emitting subpixel is Y (V, P) O. _The phosphor layer 25 including phosphors such as ₄ : Eu and the like, and formed in the green light emitting subpixels includes the phosphors such as Zn ₂ SiO ₄ : Mn, YBO ₃ : Tb, and the like. ) Includes phosphors such as BAM: Eu and the like.

The discharge cells 130 are filled with discharge gases such as Ne, Xe, and the like and mixed gases thereof. In the present invention including this embodiment, the discharge surface can be increased and the discharge region can be enlarged, so that the amount of plasma formed is increased, thereby enabling low voltage driving. Therefore, in the case of the present invention, even when a high concentration of Xe gas is used as the discharge gas, low voltage driving is possible, thereby significantly improving the luminous efficiency. This solves the problem of low voltage driving when using a high concentration of Xe gas as a discharge gas in a conventional plasma display panel.

The transparent upper substrate 111 is made of a material having good light transmittance such as glass. On the upper substrate 111, the discharge sustaining electrode pairs 16 existing on the upper substrate 11 of the conventional plasma display panel shown in FIG. 1 and the dielectric layer 14 covering the discharge sustaining electrode pairs 16 are provided. Since it does not exist, the upward transmittance of visible light is remarkably improved. Therefore, if the image is realized with the luminance of the conventional level, the electrodes 16 are driven at a relatively low voltage, and thus the luminous efficiency is improved. Thus, since the discharge electrodes 112 and 113 of the present invention are not disposed on the upper substrate 111 but are disposed on the side of the discharge space, the discharge electrodes 112 and 113 need not be used as the transparent electrodes having high resistance as the discharge electrodes 112 and 113. Since the electrode, for example, a metal electrode, can be used as the discharge electrodes 112 and 113, the discharge response speed is high, and low voltage driving can be performed without distortion of the waveform.

Referring to FIG. 3, in the plasma display panel according to the first embodiment of the present invention, the address discharge AD is applied by applying an address voltage between the address electrode 122 and the lower discharge electrode 113. ) Is generated, and the discharge cell 130 in which sustain discharge SD is to be generated is selected as a result of this address discharge AD. In the present invention, the address discharge AD is further promoted by, for example, increasing the thickness tb so that the conductance of the lower discharge electrode 113 is improved. The effect can be obtained, and smoother addressing is possible under the same driving voltage.

Thereafter, when a sustain discharge voltage of alternating current is applied between the lower discharge electrode 113 and the upper discharge electrode 112 of the selected discharge cell 130, the sustain discharge is discharged between the upper discharge electrode 112 and the lower discharge electrode 113. (SD) occurs. Ultraviolet rays are emitted while the energy level of the discharge gas excited by the sustain discharge SD is lowered. The ultraviolet rays excite the phosphor layer 125 coated in the discharge cell 130. As the energy level of the excited phosphor layer 125 decreases, visible light is emitted, and the emitted visible light forms an image. .

In the conventional plasma display panel shown in Fig. 1, the sustain discharge between the scan electrode 12 and the common electrode 13 occurs in the horizontal direction, so that the discharge area is relatively narrow. However, since the sustain discharge of the plasma display panel according to the present embodiment occurs in the vertical direction in all aspects defining the discharge cell 130, there is an advantage that the discharge area is relatively large.

In addition, the sustain discharge in this embodiment is formed in a closed curve along the side of the discharge cell 130 and gradually diffuses to the center portion of the discharge cell (130). As a result, the volume of the region in which the sustain discharge occurs is increased, and the space charge in the discharge cell 130 which is not well used in the past also contributes to light emission. Such matters result in the improvement of the luminous efficiency of the plasma display panel.

In addition, in the plasma display panel according to the present embodiment, since the sustain discharge (SD) is made only in a portion defined by the first partition wall 114, as shown in FIG. 3, the charged particles, which was a problem of the conventional plasma display panel. Since ion sputtering of the phosphor layer is prevented, there is an advantage that a permanent afterimage does not occur even when the same image is displayed for a long time.

FIG. 5 is a plasma display panel according to a second exemplary embodiment of the present invention, which is a modification of FIG. 3. Hereinafter, a description will be given focusing on differences from the first embodiment.

The plasma display panel according to the present embodiment includes an upper substrate 211 and a lower substrate 221 disposed to face the first substrate 211, and between the upper substrate 211 and the lower substrate 221, the first partition wall 214 and the second substrate. The partition wall 224 is disposed to partition the discharge cell 230. The upper discharge electrode 212 and the lower discharge electrode 213 are vertically spaced apart from each other in the first partition 214. In the present embodiment, the width wb of the lower discharge electrode 213 is wider than the width wa of the upper discharge electrode 212. As the width wb of the lower discharge electrode 213 is increased, the cross-sectional area of the lower discharge electrode 213 is increased, which means an increase in conductance. However, even if the width wb of the lower discharge electrode 213 increases, the lower discharge electrode 213 is disposed on the side surface of the first partition wall 214 to prevent breakage of the first partition wall 214 due to the discharge voltage. It is preferable that the partition width e to the side surface of is maintained sufficiently.

In addition, the matters related to the protective film 215, the phosphor layer 225, the dielectric layer 223, and the address electrode 222 are substantially the same as in the first embodiment.

6 illustrates a plasma display panel according to a third embodiment of the present invention, which will be described with reference to differences from the first embodiment. In the present embodiment, the conductive material forming the lower discharge electrode 313 has higher electrical conductivity than the conductive material forming the upper discharge electrode 312. For example, the upper discharge electrode 312 may be formed of a triple layer of Cr—Cu—Cr, and the lower discharge electrode 313 may be formed of Ag having better electrical conductivity than Cu. That is, as shown in FIG. 6, the upper discharge electrode 312 includes a first layer 312a formed of Cr, a second layer 312b formed of Cu, and a third layer 312c formed of Cr. The lower discharge electrode 313 is formed of Ag having excellent electrical conductivity. As a result, the conductance of the lower discharge electrode 313 is improved. This means that addressing can be made with a low driving voltage in address discharge, and smoother addressing is possible at the same voltage. Meanwhile, when the first layer 312a formed of Cr is disposed on the upper surface of the upper discharge electrode 312, the first layer 312a may absorb external light incident on the plasma display panel, thereby improving contrast.

In the plasma display panel of this embodiment, the upper discharge electrodes 312 and the lower discharge electrodes 313 are spaced apart in the vertical direction. However, in the conventional plasma display panel shown in FIG. 1, the scan electrode 12 and the common electrode 13 are disposed at the same level. In this structure, since the scan electrode 12 and the common electrode 13 are simultaneously formed on the upper substrate by using photo-lithography or vacuum deposition, the scan electrode 12 and the common electrode 13 are formed. It was not possible to form different materials. However, in the plasma display panel of the present embodiment, since the upper discharge electrode 312 and the lower discharge electrode 313 are disposed at different levels, the discharge electrodes may be formed of different materials through sequential lamination processes.

The upper substrate 311, the first partition 314, the passivation layer 315, the second partition 324, the phosphor layer 325, the dielectric layer 323, the address electrode 322, and the lower substrate 312. The matters are substantially the same as in the first embodiment.

7 shows a fourth embodiment of the present invention, which will be described based on differences from the first embodiment. In the present exemplary embodiment, an upper substrate 411 and a lower substrate 421 are disposed to face each other, and a first partition 414 is formed between the upper substrate 411 and the lower substrate 421. Upper and lower surfaces of the discharge cells 430 are defined by the upper substrate 411 and the lower substrate 421, and side surfaces of the discharge cells 430 are defined by the first partition 414. The upper discharge electrode 412 is formed in a triple layer structure of Cr-Cu-Cr. That is, the upper discharge electrode includes a first layer 412a made of Cr, a second layer 412b made of Cu, and a third layer 412c made of Cr. The lower discharge electrode 413 is formed of Ag having excellent electrical conductivity. Regarding the upper discharge electrode 412 and the lower discharge electrode 413, reference may be made to the third embodiment. In the present embodiment, unlike the first embodiment, the partition walls defining the side surfaces of the discharge cells 430 are not formed to be separated up and down, but are integrally formed. 2, an upper structure including an upper substrate 111 and a first partition 114, and a lower structure including a lower substrate 121 and a second partition 124 are formed. Sealing to form a plasma display panel. In this case, mis-alignment may occur in which an error occurs in alignment between the superstructure and the undercarriage. In this embodiment, this problem may be fundamentally solved.

The protection layer 415, the phosphor layer 425, the dielectric layer 423, and the address electrode 422 are substantially the same as in the first embodiment, and reference may be made to these.

According to the plasma display panel according to the present invention, the following effects can be obtained.

First, by improving the conductance of the scan electrode causing the address discharge, addressing can be performed smoothly, discharge stability is improved, and addressing can be performed at low voltage, thereby improving driving efficiency.

Second, in order to improve the conductance of the scan electrode, when the width of the scan electrode is increased, the address discharge surface may be increased, and the discharge distance between the scan electrode and the address electrode may be shortened, and thus the addressing improvement effect is further increased. do.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

1 is an exploded perspective view showing a conventional plasma display panel;

2 is an exploded perspective view showing a plasma display panel according to a first embodiment of the present invention;

3 is a cross-sectional view taken along the line III-III of FIG.

4 is a perspective view illustrating an electrode structure of the plasma display panel of FIG. 2;

5 is a cross-sectional view showing a plasma display panel according to a second embodiment of the present invention;

6 is an exploded perspective view showing a plasma display panel according to a third embodiment of the present invention;

7 is an exploded perspective view showing a plasma display panel according to a fourth embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

111,211,311,411: upper substrate 112,212,312,412: upper discharge electrode

113,213,313,413: lower discharge electrode 114,214,314,414: first bulkhead

115,215,315,415: Protective film 121,221,321,421: Lower substrate

122, 222, 322, 422: address electrode 123, 223, 323, 423: dielectric layer

124,224,324: second bulkhead 125,225,325,425: phosphor layer

      130,230,330,430: discharge cell

Claims (7)

Transparent upper substrate; A lower substrate disposed in parallel with the upper substrate; A first partition wall disposed between the upper substrate and the lower substrate and defining discharge cells together with the upper substrate and the lower substrate and formed of a dielectric; Upper discharge electrodes disposed in a first partition wall to surround the discharge cell; Lower discharge electrodes disposed in a first partition wall to surround the discharge cell and spaced apart from the upper discharge electrode; A phosphor layer disposed in the discharge cell; And A discharge gas in the discharge cell; And the upper discharge electrode and the lower discharge electrode have different conductances. The method of claim 1, The upper discharge electrodes and the lower discharge electrodes extend in one direction, And an address electrode extending from the discharge cell to intersect the upper discharge electrode and the lower discharge electrode. The method of claim 2, And the address electrode is disposed between the lower substrate and the phosphor layer, and a dielectric layer is disposed between the phosphor layer and the address electrode. The method of claim 2, And the upper discharge electrode serves as a common electrode, and the lower discharge electrode serves as a scan electrode. The method of claim 1, And the cross-sectional area of the lower discharge electrode is wider than that of the upper discharge electrode. The method of claim 1, And the conductive material forming the lower discharge electrode has a higher electrical conductivity than the conductive material forming the upper discharge electrode. The method of claim 1, And a second partition wall defining a discharge cell together with the first partition wall. And the phosphor layer is disposed at the same level as the second partition wall.