KR20050100207A - Method and apparatus for addressing plasma display panel - Google Patents

Abstract

The present invention provides an addressing method and apparatus of a PDP that can enhance address discharge even when address conditions are weak due to temperature and a specific screen.

To this end, the address method of the present invention comprises the steps of determining an address discharge condition; Selectively supplying a bias voltage to the sustain electrode according to the address discharge condition.

Description

Address method and apparatus of plasma display panel {METHOD AND APPARATUS FOR ADDRESSING PLASMA DISPLAY PANEL}

The present invention relates to a method and apparatus for driving a plasma display panel, and more particularly, to a method and apparatus for resetting a plasma display panel that can enhance an address discharge regardless of temperature.

Recently, a plasma display panel (PDP), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. The PDP displays an image by adjusting the gas discharge period of each of the pixels according to the digital video data. As such a PDP, a PDP having three electrodes as shown in FIG. 1 and driven by an AC voltage is representative.

The discharge cell of the AC PDP shown in FIG. 1 includes sustain electrode pairs 12A and 12B formed on the upper substrate 10 and data electrodes 20 formed on the lower substrate 18.

Each of the sustain electrode pairs 12A and 12B has a double layer structure of a transparent electrode and a metal electrode. The sustain electrode pairs 12A and 12B mainly provide a scan electrode 12A mainly supplying a scan signal for address discharge and a sustain signal for sustain discharge, and a sustain signal alternately supplied to the scan electrode 12A. It is separated by the sustain electrode 12B. The data electrode 20 is formed to intersect with the sustain electrode pairs 12A and 12B to supply a data signal for address discharge.

An upper dielectric layer 14 and a passivation layer 16 are stacked on the upper substrate 10 on which the sustain electrode pairs 12A and 12B are formed, and a lower dielectric layer 22 is formed on the lower substrate 18 on which the data electrode 20 is formed. do. The upper dielectric layer 14 and the lower dielectric layer 22 accumulate charges generated by the discharge. The protective film 16 prevents damage to the upper dielectric layer 14 due to sputtering of plasma particles during discharge and increases the emission efficiency of secondary electrons. The dielectric layers 14 and 22 and the protective layer 16 may lower the driving voltage applied from the outside.

A partition wall 24 is formed on the lower substrate 18 on which the lower dielectric layer 22 is formed, and a phosphor layer 26 is formed on the lower dielectric layer 22 and the surfaces of the partition wall 24. The partition wall 24 separates the discharge space to prevent the ultraviolet rays generated by the gas discharge from leaking into the adjacent discharge space. The phosphor layer 26 emits red (hereinafter, R), green (hereinafter, G), or blue (hereinafter, B) visible light by emitting light by ultraviolet rays generated by gas discharge. The discharge space is filled with an inert gas for gas discharge.

This discharge cell is selected by address discharge by the data electrode 20 and the scan electrode 12A, and the selected discharge cell maintains the discharge by sustain discharge by the sustain electrode pairs 12A and 12B. The discharge cell emits the phosphor 26 by ultraviolet rays generated during the sustain discharge to emit R, G, or B visible light. In this case, the discharge cell adjusts the sustain discharge period, that is, the number of sustain discharges according to the video data, thereby implementing gray scale for displaying an image. A color of one pixel is realized by combining three discharge cells coated with R, G, and B phosphors 26, respectively.

As a method of driving such a PDP, an ADS (Address and Display Separation) driving method that is driven by being divided into an address period and a display period, that is, a sustain period is typical. As shown in FIG. 2, the ADS driving method divides one frame 1F into a plurality of subfields SF1 to SF8 corresponding to each bit of video data. Each of the subfields SF1 to SF8 again has a reset period RPD for initializing a discharge cell, an address period APD for selecting a discharge cell, and a sustain period SPD for sustaining discharge of the selected discharge cell. Is divided into Here, the PDP implements the corresponding gradation by assigning different weights to the subfields SF1 to SF8 in the sustain period SPD and combining the sustain period SPD according to the video data.

3 illustrates selective write driving waveforms of the PDP supplied from the first and second subfields SF1 and SF2.

Referring to FIG. 3, each of the first and second subfields SF1 and SF2 may include a reset period (RPD) for initializing discharge cells, an address period (APD) for selecting discharge cells, And a sustain period (SPD) for sustaining discharge of the selected discharge cell and an erasing period (EPD) for discharge erasing.

The reset period RDP is a set-up period (SUPD) for wall charge formation in all discharge cells, and a set-down period (SDPD) for erasing unnecessary wall charges in the discharge cells. It includes.

In the setup period SUD, a ramp-up pulse RUP that is gradually increased from the sustain voltage Vs to the peak voltage Vp is supplied to the scan electrode Y, and the sustain electrode Z and the data electrode are supplied. The ground voltage GND is applied to (X). Dark discharge, in which little light is generated, occurs between the scan electrode Y and the data electrode X and between the scan electrode Y and the sustain electrode Z by the rising ramp pulse RUP. The dark discharge causes positive wall charges on the data electrode X and the sustain electrode Z, and negative wall charges on the scan electrode Y.

Subsequently, in the set-down period SDPD, the scan electrode Y falls from the peak voltage Vp to the sustain voltage Vs, and gradually falls from the sustain voltage Vs to the base voltage GND or a specific voltage of the negative polarity. A ramp-down pulse RDP is supplied, a sustain voltage Vs of positive polarity is supplied to the sustain electrode Z, and a ground voltage GND is supplied to the data electrode X. A weak dark discharge is generated between the scan electrode (Y) and the sustain electrode (Z) and between the scan electrode (Y) and the data electrode (Z) by the falling ramp pulse (RDP), thereby eliminating unnecessary wall charges and Wall charges necessary for discharge remain.

In the address period APD, the negative scan pulse SP is sequentially applied to the scan electrode Y, and the positive data pulse Data pulse is applied to the data electrode X in synchronization with the scan pulse SP. DP) is applied. Accordingly, in the discharge cell, an address discharge is generated by adding the voltage difference between the scan pulse SP and the data pulse DP and the wall voltage due to the wall charge remaining in the reset period RPD. This address discharge forms a wall charge inside the corresponding discharge cell to be used for the next sustain discharge. In this address period APD, the positive electrode DC bias voltage Zdc is supplied to the sustain electrode Z so as to reduce the voltage difference from the scan electrode Y so as to prevent erroneous discharge from the scan electrode Y.

In the sustain period SPD, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrode Y and the sustain electrode Z. As shown in FIG. Accordingly, in the discharge cells in which the wall charges are formed by the address discharge, the wall voltage and the voltage of each of the sustain pulses SUSPy and SUSPz are added to generate a sustain discharge whenever the sustain pulses SUSPy and SUSPz are applied. This sustain discharge emits visible light in proportion to the sustain period SPD in the corresponding discharge cell.

In the erasing period EPD, the erasing pulse SP is applied to the sustain electrode Z to generate an erasing discharge, thereby erasing wall charges in the discharge cell.

The PDP has a problem in that discharge characteristics become unstable with temperature change. This is because the pressure in the PDP changes with temperature, and the discharge voltage in proportion to the pressure varies due to the pressure change. For example, at high temperatures, the discharge voltage increases because the pressure of the PDP increases. This causes the address discharge to be weakened in a high temperature environment, and to prevent this, a high driving voltage must be applied. In order to solve the problem that the discharge characteristic is unstable against the temperature change, a method of enhancing the address discharge by varying the pulse width of the scan pulse in response to the temperature change has been proposed, but this is a limitation in satisfying the high temperature environment because the driving voltage is fixed. There is.

In addition, when the PDP displays a particular screen that is vulnerable even when driving at room temperature, for example, when the load is large due to a large number of discharge cells turned on in the PDP, that is, when the average brightness level (Avarage Picture Level or less, APL) is high, Since the voltage drop width increases due to the current, the discharge cells are frequently turned off due to the weakening of the address discharge.

Accordingly, it is an object of the present invention to provide an addressing method and apparatus of a PDP that can enhance address discharge even when address conditions are weak due to temperature and a specific screen.

In order to achieve the above object, the address method of the PDP according to the present invention comprises the steps of determining an address discharge condition; Selectively supplying a bias voltage to the sustain electrode according to the address discharge condition.

The determining of the address discharge condition may include calculating an average brightness level value of the video data; And comparing the calculated average luminance level value with a reference value to determine whether the average brightness level value is larger than the reference value.

The step of selectively supplying the bias voltage to the sustain electrode may include supplying a sustain voltage as the bias voltage when the average luminance level value is greater than the reference value, and supplying a bias voltage having a lower polarity than the sustain voltage when the bias voltage is opposite. Includes,

The determining of the address discharge condition may include detecting a panel temperature; Comparing the detected panel temperature with a reference value and determining whether the detected panel temperature is greater than the reference value.

Selectively supplying the bias voltage to the sustain electrode includes supplying a sustain voltage as the bias voltage when the panel temperature is greater than the reference value, and supplying a bias voltage having a lower polarity than the sustain voltage when the panel temperature is vice versa. .

The determining of the address discharge condition may include determining whether the corresponding subfield is a specific subfield having an weak address condition.

The step of selectively supplying the bias voltage to the sustain electrode may include supplying a sustain voltage as the bias voltage when the corresponding subfield is the specific subfield, and providing a bias voltage having a lower polarity than the sustain voltage when the subfield is the specific subfield. Include.

An addressing apparatus of a PDP according to the present invention includes a PDP, a data driver for driving each of the PDP data electrodes, scan electrodes, and sustain electrodes in an address period, a scan driver, and a sustain driver; A subfield mapping unit configured to map input video data to a preset subfield and supply the same to the data driver; An average luminance level calculator for calculating an average luminance level value from the input video data; A temperature detector for detecting a temperature of the panel; The data driver and the scan driver are controlled, and an address condition is determined by comparing at least one of the average luminance level value, the panel temperature, and a subfield with a reference value, and the sustain driver is configured to supply a bias voltage according to the address condition. It is provided with the timing control part to control.

The timing controller compares the average luminance level value with a reference value and supplies a sustain voltage as the bias voltage when the average brightness level is larger than the reference value, and a positive bias voltage lower than the sustain voltage when the bias voltage is reversed.

The timing controller compares the panel temperature with a reference value so that a sustain voltage is supplied as the bias voltage when the panel temperature is larger than the reference value, and a bias voltage having a lower polarity than the sustain voltage when the panel voltage is reversed.

The timing controller allows a sustain voltage to be supplied as the bias voltage when the subfield is a specific subfield having a weak address condition, and a bias voltage having a lower polarity than the sustain voltage when the subfield is reversed.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 4 to 6.

4A and 4B illustrate driving waveforms of a subfield for explaining an addressing method of a PDP according to an exemplary embodiment of the present invention.

FIG. 4A shows a driving waveform when the address condition is stable and FIG. 4B shows the address condition when the address condition is weak.

4A and 4B, the rising ramp pulse RUP is supplied to the scan electrode Y in the setup period SUDP of the reset period RDP, so as to scan between the scan electrode Y and the data electrode X, and scan. Dark discharge is generated between the electrode Y and the sustain electrode Z. Accordingly, wall charges of positive polarity (+) are accumulated on the data electrode (X) and the sustain electrode (Z), and wall charges of negative polarity (−) are accumulated on the scan electrode (Y). Subsequently, the falling ramp pulse RDP is supplied in the set-down period SDPD of the reset period RPD so as to be between the scan electrode Y and the sustain electrode Z, and between the scan electrode Y and the data electrode Z. Weak dark discharge occurs. In this case, a sustain voltage Vs is supplied to the sustain electrode Z as a bias voltage Zbias for erasing discharge between the scan electrode Y and the sustain electrode Z. As a result, unnecessary wall charges are erased and wall charges necessary for the next address discharge remain.

In the address period APD, the negative scan pulse SP is sequentially applied to the scan electrode Y, and the positive data pulse DP is applied to the data electrode X in synchronization with the scan pulse SP. . Accordingly, in the discharge cell, an address discharge is generated by adding the voltage difference between the scan pulse SP and the data pulse DP and the wall voltage due to the wall charge remaining in the reset period RPD. This address discharge forms a wall charge inside the corresponding discharge cell to be used for the next sustain discharge.

Here, in the case of a stable address condition, as shown in FIG. 4A, the sustain electrode Z is supplied with a positive bias voltage Vb lower than the sustain voltage Vs as the bias voltage Zbias so as to provide a voltage difference with the scan electrode Y. Reduce the risk of false discharges.

On the other hand, in the case of a weak address condition, as shown in FIG. 4B, the sustain electrode Z is supplied with a bias voltage Zbias that maintains the sustain voltage Vs to induce activation of the address discharge to sufficiently form wall charges. do. Here, as a weak address condition, when the temperature of the PDP is high (40 ° C. or more), when the load of the PDP is large (high APL value), a specific subfield (more than the fifth subfield in the case of selective writing method), In the case of writing and erasing, the fifth subfield or more) may be used as an example.

In the sustain period SPD, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrode Y and the sustain electrode Z. As shown in FIG. Accordingly, even when the address conditions are stable or weak, the discharge cells in which sufficient wall charges are formed due to the address discharge are added to the voltages of the wall voltages and the sustain pulses SUSPy and SUSPz to apply the sustain pulses SUSPy and SUSPz. Each time a sustain discharge occurs. This sustain discharge emits visible light in proportion to the sustain period SPD in the corresponding discharge cell.

In the erasing period EPD, the erasing pulse SP is applied to the sustain electrode Z to generate an erasing discharge, thereby erasing wall charges in the discharge cell.

As described above, the PDP addressing method according to the present invention selectively supplies the bias voltage Zbias supplied to the sustain electrode Z according to the address condition (APL value, temperature, subfield) to generate address discharge even under a weak condition. You can strengthen it.

5 illustrates a PDP address apparatus according to the present invention.

The PDP address apparatus shown in FIG. 5 includes a subfield mapping unit 40 and a data driver 42 for supplying input first video data to the data electrode X of the PDP 52, and the PDP 52 of the PDP 52. Control driving of the scan driver 48 and the sustain driver 50 for driving each of the scan electrode Y and the sustain electrode Z, the data driver 42, the scan driver 48, and the sustain driver 50. The timing controller 46, the APL calculator 44 for calculating an APL value from the input second video data, and supplying the APL value to the timing controller 46; ) Is provided with a temperature detection unit 54.

The subfield mapping unit 40 maps the input first video data to a preset subfield pattern and outputs the mapping. Here, the first video data refers to video data in which inverse gamma correction, misleading diffusion, and dithering are completed in the previous block.

The data driver 42 latches the input data separated by bits according to the subfield pattern in the subfield mapping unit 40 and then latches the latched data in the address period under the control of the timing controller 46. Is supplied to the data electrode.

The APL calculator 44 calculates an APL value in units of frames using the input second video data and supplies the calculated APL value to the timing controller 46. Here, the second video data refers to video data that is inverse gamma corrected in the previous block.

The temperature detector 54 detects the temperature of the PDP 52 and supplies it to the timing controller 46.

The timing controller 46 controls the driving of the data driver 42, the scan driver 48, and the sustain driver 50. In particular, the timing controller 46 compares the APL value from the APL calculator 44 with the reference value, compares the temperature from the temperature detector 54 with the reference temperature, or the subfield from the subfield mapping unit 40. From the information, it is determined whether the corresponding subfield is a specific subfield, and the bias voltage Zbias to be supplied from the sustain driver 50 to the sustain electrode Z is controlled.

Specifically, the timing controller 46 compares the APL value with the reference value, compares the panel temperature with the reference temperature in each of steps 1, 2, and 3 (S1, S2, S3), as shown in FIG. By determining whether the field is a specific subfield, the bias voltage Zbias to be supplied to the sustain electrode Z in the address period APD is determined.

For example, if the APL value is not greater than the reference value in step 1 (S1), if the panel temperature is not higher than the reference temperature in step 2 (S2), or if the subfield in step 3 (S3) If not, the timing controller 46 causes the sustain driver 50 to apply the bias voltage Vb having a lower polarity than the sustain voltage Vs to the sustain electrode Z as the bias voltage Zbias. As a result, erroneous discharge can be prevented under stable address conditions. On the other hand, when the APL value is greater than the reference value in step 1 (S1), when the panel temperature is higher than the reference temperature in step 2 (S2), or when the corresponding subfield is a specific subfield in step 3 (S3), the timing controller Reference numeral 46 causes the sustain driver 50 to apply the sustain voltage Vs to the sustain electrode Z at the bias voltage Zbias. As a result, address discharge is activated in a weak address condition.

The scan driver 48 drives the scan electrode Y of the PDP 52 under the control of the timing controller 46, and the sustain driver 50 drives the sustain electrode Z.

Specifically, the sustain driver 50 selectively selects the sustain voltage Vs and the bias voltage Vb in response to the control signals CS1 and CS2 in the reset and address periods RPD and APD as shown in FIG. 7. The bias voltage supply part 32 which supplies to the sustain electrode Z, and the sustain pulse supply part 34 which supplies the sustain pulse SUSPz by the energy recovery method in the sustain period SPD are provided.

In the bias voltage supply part 32, the first switch element S1 applies the sustain voltage Vs in response to the first control signal CS1 from the timing controller 46 in the reset and address periods RPD and APD. It is supplied to the sustain electrode Z at (Zbias). As a result, erroneous discharge can be prevented under stable address conditions.

The second and third switch elements S2 and S3 have a positive bias voltage Vb lower than the sustain voltage Vs in response to the second control signal CS2 from the timing controller 46 in the address period APD. Is supplied to the bias voltage Zbias. As a result, in the case of a weak address condition, it can be strengthened by activating the address discharge.

Furthermore, when using a method of selectively supplying the bias voltage Zbias according to the above-described address condition and a method of adjusting the width of the scan pulse (increasing the scan pulse width in the case of a weak address condition), the address discharge may be further enhanced. It becomes possible.

As described above, the address method and apparatus according to the present invention can enhance the address discharge even in a weak address condition by selectively supplying the bias voltage Zbias supplied to the sustain electrode Z according to the address condition. In addition, the PDP driving method and apparatus according to the present invention can further enhance the address discharge when used in conjunction with a method of changing the scan pulse in accordance with the address conditions.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view illustrating a discharge cell structure of a general plasma display panel.

2 is a diagram illustrating a configuration of subfields included in one frame.

3 is a drive waveform diagram of a conventional plasma display panel.

4A and 4B are driving waveform diagrams including address waveforms according to address conditions of a plasma display panel according to an exemplary embodiment of the present invention.

5 is a block diagram illustrating an address device of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 6 is a flowchart for explaining step by step an address condition determination process of the timing controller shown in FIG. 5; FIG.

7 is a detailed circuit diagram of the sustain driver shown in FIG. 6;

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 18: lower substrate

12A: Scanning electrode 12B: Sustaining electrode

14 upper dielectric layer 16 protective film

20: data electrode 22: lower dielectric layer

24: partition 26: phosphor

40: subfield mapping unit 42: data driver

44: APL calculator 46: timing controller

48: scan driver 50: sustain driver

52: PDP 54: temperature detector

32: bias voltage supply part 34: sustain pulse supply part

Claims (11)

In the address method according to the video data, Determining an address discharge condition; And selectively supplying a bias voltage to the sustain electrode in accordance with the address discharge condition. The method of claim 1, The determining of the address discharge condition Calculating an average brightness level value of the video data; And comparing the calculated average brightness level value with a reference value to determine whether the calculated average brightness level value is larger than the reference value. The method of claim 2, Selectively supplying the bias voltage to the sustain electrode And supplying a sustain voltage to the bias voltage when the average brightness level value is larger than the reference value, and supplying a bias voltage having a lower polarity than the sustain voltage when the average brightness level value is greater than the reference value. The method of claim 1, The determining of the address discharge condition Detecting the panel temperature; And comparing the detected panel temperature with a reference value to determine whether the detected panel temperature is larger than the reference value. The method of claim 4, wherein Selectively supplying the bias voltage to the sustain electrode And supplying a sustain voltage to the bias voltage when the panel temperature is greater than the reference value, and supplying a bias voltage having a lower polarity than the sustain voltage when the panel temperature is greater than the reference value. The method of claim 1, The determining of the address discharge condition And determining whether the corresponding subfield is a specific subfield in which address conditions are vulnerable. The method of claim 4, wherein Selectively supplying the bias voltage to the sustain electrode And supplying a sustain voltage to the bias voltage when the corresponding subfield is the specific subfield, and supplying a bias voltage having a lower polarity than the sustain voltage when the corresponding subfield is the specific subfield. A plasma display panel; A data driver, a scan driver and a sustain driver for driving the data electrode, the scan electrode and the sustain electrode of the plasma display panel in an address period; A subfield mapping unit configured to map input video data to a preset subfield and supply the same to the data driver; An average luminance level calculator for calculating an average luminance level value from the input video data; A temperature detector for detecting a temperature of the panel; The data driver and the scan driver are controlled, and an address condition is determined by comparing at least one of the average luminance level value, the panel temperature, and a subfield with a reference value, and the sustain driver is configured to supply a bias voltage according to the address condition. And a timing controller for controlling the plasma display panel. The method of claim 8, The timing controller And comparing the average luminance level value with a reference value so that a sustain voltage is supplied as the bias voltage when the average brightness level value is larger than the reference value, and a bias voltage having a lower polarity than the sustain voltage is supplied as the bias voltage. The method of claim 8, The timing controller And comparing the panel temperature with a reference value so that a sustain voltage is supplied as the bias voltage when the panel temperature is larger than the reference value, and a bias voltage having a lower polarity than the sustain voltage when the panel voltage is reversed. The method of claim 8, The timing controller And the sustain voltage is supplied as the bias voltage when the subfield is a specific subfield having a weak address condition, and a bias voltage having a lower polarity than the sustain voltage when the subfield is opposite.