KR20050097175A - In-plane switching mode liquid crystal display device - Google Patents

Abstract

The present invention relates to an array substrate for a transverse electric field type liquid crystal display device having a structure that lowers wiring resistance and prevents disconnection.

In recent years, despite the increasing size of LCDs, line widths have not been increased for high opening ratios. Therefore, the wiring resistance increases as the length of the wiring increases due to the larger area. As the resistance of the wiring increases, the quality of the wiring is affected, resulting in a problem such as deterioration of the image quality. The possibilities are also increasing.

The present invention provides an array substrate for a transverse electric field type liquid crystal display device capable of lowering wiring resistance without increasing line width and preventing occurrence of disconnection.

Description

In-Plane Switching mode Liquid crystal display device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor liquid crystal display, and more particularly to a transverse electric field type liquid crystal display device which lowers resistance and prevents disconnection.

Recently, as the information society has progressed rapidly, a display field for processing and displaying a large amount of information has been developed.

In particular, in order to meet the times of thinning, light weight, and low power consumption, there is a need for a flat panel display, and accordingly, a thin film transistor liquid crystal device having excellent color reproducibility and thinness is developed. crystal display) has been developed.

The display method of the liquid crystal display device uses optical anisotropy and polarization properties of liquid crystal molecules, which are artificially thin and long and have a pretilt angle having directionality in the arrangement thereof. When voltage is applied to the liquid crystal, the direction of alignment of the liquid crystal molecules can be controlled by changing the inclination angle of the liquid crystal molecules. Therefore, by applying an appropriate voltage to the liquid crystal layer, the alignment direction of the liquid crystal molecules is arbitrarily adjusted to adjust the molecular arrangement of the liquid crystal. The desired image information is expressed by randomly modulating the light polarized by the optical anisotropy of the liquid crystal.

Currently, an active matrix LCD in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner is attracting the most attention due to its excellent resolution and ability to implement video.

In the liquid crystal panel, which is a basic element of a general liquid crystal display device, an upper color filter substrate and a lower array substrate face each other and are spaced apart at a predetermined interval, and a liquid crystal including liquid crystal molecules is filled between the two substrates. It is a structure.

At this time, the electrode for applying a voltage to the liquid crystal is a common electrode located on the color filter substrate and the pixel electrode located on the array substrate, when the voltage is applied to these two electrodes, the upper and lower sides formed by the difference of the applied voltage It uses a way to control the direction of the liquid crystal molecules between which the vertical electric field is located.

However, as described above, the common electrode and the pixel electrode are vertically formed, and when the liquid crystal is driven by the vertical electric field generated above and below, the characteristics such as transmittance and aperture ratio are excellent, but the viewing angle characteristics are excellent. In order to overcome these disadvantages, a liquid crystal driving method using an in-plane switching (IPS) using a horizontal electric field has been proposed.

Hereinafter, the above-described transverse electric field type liquid crystal display device will be described in detail with reference to FIG. 1.

In a liquid crystal panel of a general transverse electric field type liquid crystal display device, a color filter substrate 10 having a color filter and a thin film transistor array substrate 20 face each other, and the color filter substrate 10 and the thin film transistor array substrate 20 are opposite to each other. The liquid crystal layer 30 is filled in between.

At this time, the common electrode 40 and the pixel electrode 50 are formed horizontally on the same plane on the thin film transistor array substrate 20, and form a horizontal electric field 45 according to the voltage applied thereto. In this case, the liquid crystal molecules between the horizontal electric fields 45 are driven by the influence thereof.

That is, the cross sectional view of the general transverse electric field type liquid crystal display device in the off state and the on state will be described with reference to FIGS. 2a and 2b. Since no voltage is applied, a horizontal electric field is not formed between the common electrode 40 and the pixel electrode 50, and thus no phase change of the liquid crystal molecules 35 occurs.

In this case, in particular, the drawing in the circle shows a simplified plan view of the transverse electric field type liquid crystal display device, and as shown, the liquid crystal molecules 35 positioned between the common electrode 40 and the pixel electrode 50 are located in the rubbing direction R. FIG. Accordingly, when the common electrode 40 and the pixel electrode 50 are inclined at a predetermined angle and a voltage is applied thereto, a horizontal magnetic field is formed between the common electrode 40 and the pixel electrode 50, therebetween. The liquid crystal molecules 35 positioned are rotated to be symmetrical with respect to the common electrode 40 and the pixel electrode 50 by the rotational force. In this case, the rubbing direction R forms an angle of about 10 to 20 degrees with the major axis direction of the common electrode 40 and the pixel electrode 50.

FIG. 2B illustrates a phase shift of a liquid crystal of a transverse electric field type liquid crystal display device in which an voltage is applied to each of the two electrodes described above, and corresponds to the common electrode 40 and the pixel electrode 50. Although there is no phase change of the liquid crystal molecules 35a at the position, the liquid crystal molecules 35b positioned in the section between the common electrode 40 and the pixel electrode 50 have a voltage between the common electrode 40 and the pixel electrode 50. Due to the horizontal magnetic field 45 formed by the application, the phase change occurs in the same direction as the horizontal magnetic field 45.

Since the liquid crystal is driven by a horizontal magnetic field as described above, when the user views the screen displayed through the transverse field type liquid crystal display from the front, the transverse field type liquid crystal display device is in the up, down, left, and right directions about 80 to 85 degrees respectively. It has a visible angle characteristic.

Such an array substrate for a transverse electric field type liquid crystal display device will be described with reference to FIG. 3.

3 is a plan view showing a portion of pixel areas of a conventional array substrate for a transverse electric field type liquid crystal display device.

As shown in the figure, the horizontal gate wiring 60 and the vertical data wiring 70 cross each other to define a pixel region, and the gate wiring 60 is formed at the intersection of the gate wiring 60 and the data wiring 70. And a thin film transistor 65 which is a switching element connected to the data line 70 is formed. The common region 80 extending in the horizontal direction is spaced apart from the gate wiring at a predetermined interval, and the plurality of common electrodes 85 connected to the common interconnection 80 extend in the vertical direction. In addition, in the pixel region, a plurality of pixel electrodes 95 having a vertical direction and interposed with the common electrode 85 at predetermined intervals are formed. The pixel electrodes 95 are connected to the thin film transistor 65. have.

4 and 5 are cross-sectional views taken along the lines A-A and B-B of FIG. 3.

As shown, the gate wiring 60 including the gate electrode 61, the common wiring 80 and the common electrode 85 are formed on the same layer on the substrate. At this time, each of the common electrodes 85 is characterized by being formed at a constant interval.

Next, a gate insulating layer 62 is formed on the gate wiring 60 including the gate electrode 61, the common wiring 80, and the common electrode 85, and the thin film transistor is formed on the gate insulating layer 62. In the forming portion Tr, a semiconductor layer 64 including an active layer 64a and an ohmic contact layer 64b in which amorphous silicon and amorphous silicon doped with impurities are sequentially deposited and patterned is formed, and the semiconductor layer ( 64) source and drain electrodes 66 and 68 made of a metallic material are formed in contact with the ohmic contact layer 640b. In the pixel region P, the data line 70 is formed to be spaced apart from the gate insulating layer 62, and the pixel electrode 95 connected to the drain electrode 68 is spaced a predetermined distance from the gate layer 62. Formed. At this time, the common electrode 85 is formed under the gate insulating layer 62 on both sides of the data line 70, and the pixel electrode 95 is formed between the spaced common electrode 85. Next, silicon nitride (SiNx) or silicon oxide (SiO ₂ ), which is an inorganic insulating material, is deposited on the source and drain electrodes 66 and 68 and the pixel electrode 95 to form a protective layer 76. Forming.

Accordingly, in the transverse electric field type liquid crystal display device using the array substrate, the pixel electrode 95 and the common electrode 85 are formed on the same substrate, and a horizontal electric field is generated between the two electrodes to drive the liquid crystal molecules, thereby causing an image. Is displayed.

Recently, flat panel display devices including liquid crystal displays are becoming larger. As the LCD becomes larger, the resistance of the electrodes affects the image quality. For example, in a pixel area of a 15-inch liquid crystal display panel, a common electrode or a pixel electrode has a length of about 250 μm, whereas in a panel of a 60-inch liquid crystal display device having the same resolution as that of the 15-inch liquid crystal display device The length of the electrode is about 1 mm. This is because the width of the wiring does not increase even if the pixel area becomes large due to problems such as aperture ratio.

Therefore, when the size of the liquid crystal display device is four times, the resistance of the electrode should be 1/4 or less in the same structure.

However, changing the material of the electrode, or changing the structure slightly in the existing design, is difficult to reduce to more than 1/4. In addition, since the pixel area is increased and the line width is formed to have almost the same line width, there is a problem that the possibility of disconnection failure increases as the wiring formation length becomes longer.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. In the large-area liquid crystal display device, the width of the liquid crystal display device can be reduced without reducing the aperture ratio, that is, the wiring width can be increased, the resistance can be reduced, and the disconnection defect can be prevented. It is an object of the present invention to provide an electric field type liquid crystal display device.

An array substrate for a transverse electric field type liquid crystal display device of the present invention for achieving the above object is a substrate; A plurality of gate wirings formed in the horizontal direction on the substrate; A plurality of data lines crossing the gate lines and having a vertical direction; A pixel region defined by crossing the gate wiring and the data wiring; A switching element formed at an intersection point of the gate and the data line of the pixel region; A common wiring formed in parallel with the gate wiring; A plurality of common electrodes branched into the pixel area from the common wiring; A plurality of pixel electrodes formed between the common electrodes and connected to the switching elements; And an auxiliary pixel electrode overlapping the pixel electrode in the pixel area, and formed at both ends thereof in contact with the pixel electrode.

In this case, an auxiliary gate line overlapping the gate line is further included in the pixel area, and both ends of the auxiliary gate line contact the gate line through the contact hole.

Further, an auxiliary data line overlapping the data line is further included in the pixel area, wherein both ends of the auxiliary data line are in contact with the data line through a contact hole.

In addition, an auxiliary common electrode overlapping the common electrode is further included in the pixel area, and both ends of the auxiliary common electrode are in contact with the common electrode through a contact hole.

According to another aspect of the present invention, an array substrate for a transverse electric field type liquid crystal display device includes a pixel region in which a gate wiring, a data wiring, and the two wirings intersect, a switching element provided in the pixel region, a common electrode, and a pixel electrode. An array substrate for an electric field type liquid crystal display device, comprising: a substrate; A gate wiring formed on the substrate; A common wiring formed in parallel with the gate wiring; A plurality of common electrodes branched from the common wiring; A gate insulating film formed on an entire surface of the gate wiring and the common wiring; A semiconductor layer formed on the gate insulating layer; A data line crossing the gate line over the gate insulating film; A source electrode branching from the data line and partially overlapping the semiconductor layer; A drain electrode partially overlapping the semiconductor layer and spaced apart from the source electrode by a predetermined distance; A protective layer formed on an entire surface of the data line and the source and drain electrodes; A pixel electrode on the protective layer and in contact with the drain electrode and disposed in a region between the common electrodes; And an auxiliary pixel electrode disposed below the pixel electrode and floating on the substrate or the gate insulating layer in an island shape.

In this case, the island-shaped auxiliary pixel electrode formed by being floated on the substrate or the gate insulating layer is in contact with the pixel electrode through the contact hole.

In addition, the common electrode overlaps the common electrode on the gate insulating layer or the protective layer on the common electrode, and further includes an island-shaped auxiliary common electrode.

In this case, the auxiliary common electrode formed in an island shape on the gate insulating layer or the protective layer may have both ends contacting the lower common electrode.

In addition, an auxiliary data line overlapping the data line is formed in an upper portion of the substrate below the data line or an upper portion of the data line and above the protective layer, and has an island shape. It is characterized by contact with the data wiring.

In addition, an auxiliary gate line overlapping the gate line over the gate insulating layer or the protective layer on the gate line and formed in an island shape is further provided, wherein the auxiliary gate lines are in contact with the gate line. .

A method of manufacturing an array substrate for a transverse electric field type liquid crystal display device according to the present invention includes the steps of forming a plurality of gate wirings in a horizontal direction on a substrate; Forming a plurality of common wirings in parallel with the gate wirings, and simultaneously forming a plurality of common electrodes branched from the common wirings; Forming a plurality of auxiliary pixel electrodes between the common electrodes; Forming a gate insulating film over the gate line, the common electrode, and the auxiliary pixel electrode; Forming a plurality of data lines crossing the gate lines over the gate insulating layer; Forming a switching element at an intersection point of the data line and the gate line; Forming a protective layer on a front surface of the switching element and the data line; And forming a plurality of pixel electrodes connected to the switching element between the common electrodes on the passivation layer, overlapping the auxiliary pixel electrodes below, and contacting both ends of the auxiliary pixel electrodes.

In this case, the method may further include forming an auxiliary data line at a position overlapping the data line before the forming the gate insulating layer.

The forming of the gate insulating layer may further include exposing portions of both ends of the auxiliary data line.

The forming of the pixel electrode may further include forming an auxiliary common electrode overlapping the common electrode and having both ends in contact with the common electrode.

The forming of the auxiliary common electrode may further include forming an auxiliary gate line overlapping with the gate line and in contact with both ends of the gate line.

Hereinafter will be described in detail through a preferred embodiment of the present invention.

<First Embodiment>

6 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a first embodiment of the present invention.

As illustrated, the gate wiring 105 is formed in the horizontal direction, intersects with the gate wiring 105, and the data wiring 140 is formed in the vertical direction. ) Is defined. In addition, a plurality of common electrodes 112 branching from the common wiring 110 formed in the same direction are spaced apart from the gate wiring 105 by a predetermined distance between the data wiring 140 and the data wiring 140. And a pixel electrode connected between the common electrode 112 and the common electrode 112 and the drain 147 formed to face the source electrode 143 branched from the data line 140 at a predetermined interval. 160 is alternately formed with the common electrode 112.

In addition, the data line 140, the gate line 105, the common electrode 112, and the pixel electrode 160 each have contact holes 172a, 172b, 170a, 170b, 174a, 174b, and ( 176a, 176b)) overlaps the respective wirings 140, 105 or the electrodes 112, 160 on the upper or lower portions of the wirings 140, 105 or the electrodes 112, 160, respectively, and is connected to the auxiliary gate wirings, respectively. gate redundant line 150, auxiliary data line 120, common redundant electrode 163, and pixel redundant electrode 122 are formed.

7 to 9 are cross-sectional views taken along line C-C, D-D, and E-E, respectively. In this case, FIG. 7 is a cross-sectional view of the switching element formation region connected to the data line, FIG. 8 is a cross-sectional view of the switching element crossing the center of the pixel area, and FIG. The cross-sectional view is cut along the pixel area including the contact hole area.

As illustrated, the gate electrode 106 branched from the gate wiring 105 is formed on the substrate 100 in the switching element forming portion Tr. In the pixel region P, the data auxiliary wiring 120 is formed. Are formed at both ends of the pixel region P, and a plurality of common electrodes 112 are formed in the data auxiliary line 120 to be spaced apart from each other by a predetermined interval. 122 is formed.

Next, silicon nitride (SiNx) or silicon oxide (SiO ₂ ), which is an inorganic insulating material, is deposited on the entire surface of the substrate 100 over the gate electrode, the common electrode 112, the data auxiliary line 120, and the auxiliary pixel electrode 122. Thus, the gate insulating film 130 is formed. In this case, referring to FIG. 9, the gate insulating layer 130 is patterned to include a data wiring contact hole 172b exposing the lower data auxiliary wiring 120.

Next, in the switching element forming unit Tr, a semiconductor layer 133 made of amorphous silicon and impurity amorphous silicon is formed on the gate insulating layer 130, and the semiconductor layer 133 is formed in the other pixel region P. ) Is patterned to expose the gate insulating layer 130.

Next, the source and drain electrodes 143 and 147 spaced apart from each other are formed in the switching element forming part Tr on the semiconductor layer 133 and the exposed gate insulating layer 130, and the pixel region P In the present embodiment, the data auxiliary line 120 overlaps the data auxiliary line 120. In this case, the data line 140 is connected to the lower data auxiliary line 120 and the data line contact hole 172b.

Next, a passivation layer 155 is formed on the data line 140, the source and drain electrodes 143 and 147, and the exposed gate insulating layer 130. In this case, a portion of the passivation layer 155 and the gate insulating layer 130 below is patterned to expose a portion of the common electrode contact hole 174b and a pixel exposing a portion of the common electrode 112 and the auxiliary pixel electrode 122 below. The electrode contact hole 176b is formed. In this case, a second data wire contact hole (not shown) may be formed in the passivation layer 155 to expose a portion of the data wire 140. In addition, the passivation layer 155 includes a drain contact hole 178 exposing a part of the drain electrode 147.

Next, an indium tin oxide (ITO) or an indium zinc oxide (IZO), which is a transparent conductive material, is deposited and patterned on the passivation layer 155 having the contact holes 174b, 176b, and 178. 147 and a drain contact hole 178, overlapping the auxiliary pixel electrode 122, and a part of the pixel electrode 160 connected to the auxiliary pixel electrode 122 through the pixel electrode contact hole 176b. ) Is formed. In addition, an auxiliary common electrode 163 is formed on the common electrode 112 to overlap the common electrode 112 and a part of which is connected to the common electrode 112 through the common electrode contact hole 174b.

In this case, the second data auxiliary line 120b may overlap the data line 140, and a part of the second data auxiliary line 120b may be connected to the data line 140 through the data line contact hole 172b. In this case, the first auxiliary data line 120a and the second auxiliary data line 120 are formed above the data line 140 to form a triple wiring structure. Although shown as a wiring structure, as shown in FIGS. 10A and 10B, only one of the first and second auxiliary data wires 120a and 120b may be configured.

As a modified example of the above-described first embodiment, the plan view is the same as that of FIG. 6 which is the plan view of the first embodiment, and a modified example of different lamination structure will be described with reference to FIG.

FIG. 11 is a cross-sectional view taken along line E-E of FIG. 6 as a modification of the first embodiment. The same reference numerals are used for the same parts as in the first embodiment.

As illustrated, auxiliary data lines 120 are formed at both ends of the pixel area P on the substrate 100, and a plurality of common electrodes are disposed between the auxiliary data lines 120 and the auxiliary data lines 120. 112 is formed spaced apart from each other at regular intervals. And a data wiring contact hole 172b and a common electrode contact hole 175b exposing the auxiliary data wire 120 and a part of the common electrode 112 over the auxiliary data wire 120 and the common electrode 112. The gate insulating layer 130 is formed.

Next, the data line 140 having a single layer or a double layer of at least one of aluminum alloy (AlNd), aluminum (Al), molybdenum (Mo), copper (Cu), and copper alloy on the gate insulating layer 130. The auxiliary common electrode 164 overlaps the lower auxiliary data line 120 and the common electrode 112, and the auxiliary data line 120, the common electrode 112, and the data line contact hole 172b and the common electrode, respectively. The data line 140 and the auxiliary common electrode 164 connected through the contact hole 175b are formed. In addition, an auxiliary pixel electrode 123 is formed between the auxiliary common electrode 164 and the electrode 164.

Next, a passivation layer 155 having a pixel electrode contact hole 177b exposing a part of the auxiliary pixel electrode 123 over the data line 140, the auxiliary common electrode 164, and the auxiliary pixel electrode 123. An indium tin that is formed on the passivation layer 155 and is connected to the auxiliary subpixel electrode 123 through the pixel electrode contact hole 177b and overlaps the subpixel electrode 123 and is a transparent conductive material. A pixel electrode 160 made of oxide (ITO) or indium-zinc-oxide (IZO) is formed. In this case, although not shown in the drawing, the pixel electrode 160 is connected to the drain electrode (not shown) of the switching element (not shown).

Next, a manufacturing method of an array substrate for a transverse electric field type liquid crystal display device according to a first embodiment of the present invention will be described with reference to FIGS. 12A to 12B.

12A to 12B are plan views illustrating manufacturing steps of an array substrate for a transverse electric field type liquid crystal display device according to a first exemplary embodiment of the present invention.

First, as shown in FIG. 12A, a metal material, for example, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), molybdenum (Mo), copper (Cu), or a copper electrode may be formed on the substrate 100. A material is deposited on the entire surface, and patterned to form a horizontal gate line 105, a gate electrode 106 protruding from the gate line 105, and a predetermined distance downward from the gate line 105. The common wiring 110 parallel to the gate wiring 105 and the plurality of common electrodes 112 branching from the common wiring 110 are formed. At the same time, an island-shaped floating auxiliary pixel electrode 122 and an auxiliary data line 120 are formed between the common electrode 112 and the common electrode 112 in the longitudinal direction.

Next, as shown in FIG. 12B, silicon nitride, an inorganic insulating material, is formed on the entire surface of the gate wiring 105, the common wiring 110, the floating auxiliary pixel electrode 122, and the auxiliary data wiring 120. SiNx or silicon oxide (SiO ₂ ) is deposited to form a gate insulating film (not shown). Subsequently, the gate insulating layer (not shown) is patterned to form an area between the data wiring contact holes 172a and 172b and the auxiliary data wiring 120 at both ends of the floating island-shaped auxiliary data wiring 120. A gate wiring contact for exposing the gate wiring 105 to both ends of the gate wiring 105 positioned inside the pixel region P defined by crossing the gate wiring 105 formed by forming (see 140 of FIG. 12C) is formed. The holes 170a and 170b are formed. Thereafter, by depositing and patterning amorphous silicon and impurity amorphous silicon on the gate insulating layer (not shown), a semiconductor layer 133 is formed on the switching element forming portion Tr to cover a portion of the gate electrode 106.

Next, as illustrated in FIG. 12C, a plurality of data lines 140 are formed on the gate insulating layer (not shown) and the semiconductor layer 133 to cross the gate lines 105. The data line 140 overlaps with the auxiliary data line 120 and the gate insulating layer (not shown) formed at the same time when the gate line 105 is formed, and is lowered through the data line contact holes 172a and 172b. It is characterized in that it is formed in contact with the auxiliary data line 120. At the same time, the data line 140 protrudes to form a source electrode 143 and a drain electrode 147 spaced apart from the source electrode 143 over the semiconductor layer 133. At the same time, the auxiliary gate line 150 is formed to overlap the gate line 105 on the gate insulating layer 130 and to float in an island shape contacting the gate line 105 through the gate line contact holes 170a and 170b. do.

Next, one of an organic insulating material, benzocyclobutene (BCB) or photo acryl, or an inorganic insulating material is disposed on the data line 140, the source and drain electrodes 143 and 147, and the auxiliary gate line 150. A protective layer (not shown) is formed by coating or depositing one of silicon oxide (SiO ₂ ) or silicon nitride (SiNx). Thereafter, the protective layer (not shown) and the lower gate insulating layer (not shown) are patterned to expose a drain electrode 147, a portion of the common electrode 112, and a portion of both ends of the island-shaped auxiliary pixel electrode 122. The holes 178, the common electrode contact holes 174a and 174b, and the pixel electrode contact holes 176a and 176b are formed.

Next, as shown in FIG. 12D, the drain electrode is deposited on the protective layer (not shown) by depositing an indium tin oxide (ITO) or indium zinc oxide (IZO), which is a transparent conductive material, on the entire surface of the protective layer (not shown). A pixel electrode 160 connected to the reference pixel 147, contacting the auxiliary pixel electrode 122 through the pixel electrode contact holes 176a and 176b, and overlapping the auxiliary pixel electrode 122, and forming the common electrode contact. The auxiliary common electrode 163 is formed in contact with the common electrode 112 through holes 174a and 174b and overlaps with the common electrode 112, and is floating in the protective layer 155 in an island shape.

In this case, an island-shaped floating second auxiliary data wire (not shown) may be formed on the passivation layer 155 on the gate wire 105 to contact the lower data wire 140 with the transparent conductive material. In addition, the first auxiliary data line 120 formed when the gate line 105 is formed may be omitted, and only the second auxiliary data line (not shown) as described above may be formed.

The modified example of the first embodiment is almost the same as the above-described manufacturing method, and is formed only when the data line is formed by forming the auxiliary common electrode on the gate insulating layer, and the auxiliary pixel electrode is formed on the auxiliary common electrode. Only the formation on the gate insulating film is different, and the remaining manufacturing methods are the same, and thus, the drawings are not described separately.

In the structure and manufacturing method of the array substrate for a transverse electric field type liquid crystal display device according to the first embodiment and its modifications described above, the auxiliary gate wiring and the auxiliary data wiring can be omitted.

In the first embodiment of the present invention, the wiring resistance is reduced by overlapping each wiring and the electrode to form the auxiliary wiring and the auxiliary electrode and connecting each of them as a contact hole, even when the wiring or the electrode is disconnected. Since the auxiliary wiring or the auxiliary electrode automatically plays the role of the repair wiring, the disconnection failure due to the length of the wiring can be effectively prevented in the liquid crystal display device having a large wiring.

Second Embodiment

The second embodiment of the present invention is made of indium tin oxide (ITO) or indium zinc oxide (IZO) having a relatively high resistance compared to gate wiring or data wiring formed of a metal such as aluminum, aluminum alloy, or molybdenum. Only the pixel electrode formed of the transparent conductive material overlaps the pixel electrode to form an auxiliary pixel electrode electrically connected thereto.

FIG. 13 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a second exemplary embodiment of the present invention, and FIGS. 14A and 14B are cross-sectional views taken along the line F-F of FIG. 13.

As shown, a gate wiring 205 is formed in a horizontal direction, intersects with the gate wiring 205, and a data wiring 240 is formed in a vertical direction. ) Is defined. In addition, a plurality of common electrodes 212 branched from the common line 210 formed in the same direction are spaced apart from the gate line 205 by a predetermined distance between the data line 240 and the data line 240. And a pixel electrode connected between the common electrode 212 and the common electrode 212 and the drain 247 formed to face the source electrode 243 branched from the data line 240 at a predetermined interval. 260 is alternately formed with the common electrode 212.

In addition, the pixel electrode 260 overlaps the pixel electrode 260 at a lower portion of the pixel electrode 260 connected through the pixel electrode contact holes 276a and 276b, and is an auxiliary pixel electrode in a floating island form. an electrode 222 is formed.

The cross-sectional structure is demonstrated through FIG. 14A.

Since the switching element forming portion has the same structure as that of the first embodiment, description thereof is omitted, and only the stacked structure of the pixel region between the data wiring and the wiring will be described.

As illustrated, a plurality of common electrodes 212 are formed on the substrate 200 at regular intervals, and each auxiliary electrode 212 includes a plurality of auxiliary electrodes made of the same material as the common electrode 212. The pixel electrode 222 is formed. Although not shown in the drawing, a gate wiring (not shown) and a gate electrode (not shown) are also formed on the layer in which the common electrode 212 and the auxiliary pixel electrode 222 are formed.

Next, a gate insulating layer 230 is formed on the gate line (not shown) and the gate electrode (not shown) including the common electrode 212 and the auxiliary pixel electrode 222, and the gate insulating layer 230 is formed on the gate insulating layer 230. The data line 240 is formed.

Next, a passivation layer 255 having a pixel electrode contact hole 276b exposing a lower auxiliary pixel electrode 222 is formed on the data line 240 and the gate insulating layer 230. The pixel electrode 260 is formed on the upper portion of the pixel electrode contact hole 276b through the pixel electrode contact hole 276b and overlaps the auxiliary pixel electrode 222 at the same time. In this case, although not shown, the pixel electrode 260 is also in contact with the drain electrode (not shown) of the switching element through the drain contact hole (not shown).

As shown in FIG. 14B showing a modification of the second embodiment, the auxiliary pixel electrode 222 is not formed in the layer in which the common electrode 212 is formed, and the gate insulating film in which the data wiring (not shown) is formed. 230 may be formed on.

The array substrate for a transverse electric field type liquid crystal display device according to the second embodiment described above has an effect of reducing resistance due to the enlargement of the screen by forming an auxiliary pixel electrode only on a pixel electrode formed of a transparent conductive material having high resistance. In general, the pixel electrode is formed to have a thin thickness of 500 mW to 1500 mW. When the pixel electrode is lengthened due to the large area, the disconnection defect is more likely to occur due to the thin thickness than the gate line or the data line.

Therefore, in order to solve this problem, as described above, an auxiliary pixel electrode is formed of a metal material which is electrically connected to the pixel electrode under the pixel electrode and whose resistance is lower than that of the transparent conductive material, thereby lowering the electrode propagation and reducing disconnection defects. Can be.

Third Embodiment

The third embodiment of the present invention focuses on a structure for preventing disconnection defects due to enlargement. More precisely, by forming an auxiliary wiring or an auxiliary electrode in each wiring or electrode, when disconnection occurs, the disconnected wiring or electrode is connected to the auxiliary wiring electrode using a laser by using the auxiliary wiring or auxiliary electrode as a repair pattern. It is to provide an array substrate for a transverse electric field type liquid crystal display device that can remove the.

FIG. 15 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a third exemplary embodiment of the present invention, and FIG. 16 is a cross-sectional view taken along the line G-G of FIG.

Since the planar structure is the same as that of Fig. 6 of the first embodiment, only the differences from Fig. 6 will be described.

Compared with FIG. 6, the difference is that the auxiliary gate line 350 and the auxiliary data line are formed to overlap the gate line 305, the data line 340, and the common electrode 312 except for the pixel electrode 360. 320 and the auxiliary common electrode 363 are not electrically connected to the gate line 305, the data line 340, and the common electrode 363. That is, a gate insulating film (not shown) and protection between the gate wiring 305 and the auxiliary gate wiring 350, the data wiring 340 and the auxiliary data wiring 320, and the common electrode 312 and the auxiliary common electrode 363 are provided. The contact hole is not formed in the layer (not shown), and only overlaps with each other. However, the pixel electrode 360 formed of the transparent conductive material is electrically connected to the auxiliary pixel electrode 322 overlapped with the pixel electrode contact holes 376a and 376b. This is because the pixel electrode 360 is thinner than other wirings or electrodes, so that when the length of the electrode is increased due to large area, the possibility of disconnection is higher than that of other wirings or electrodes. Thus, the pixel electrode 360 is formed in a double wiring structure. This prevents disconnection failure even when one electrode is disconnected.

FIG. 16 is the same as FIG. 7, which is a cross-sectional view of the same part of the first embodiment except for the common electrode contact hole, and thus description thereof is omitted.

As a modified example of the third embodiment, the common electrode and the pixel electrode except for the gate wiring and the data wiring may be formed in an electrically connected structure, respectively. Yes it is possible.

The present invention is not limited to the above embodiments, and various changes and modifications can be made without departing from the spirit of the present invention.

The transverse electric field type liquid crystal display device according to the present invention forms an auxiliary wiring or an auxiliary electrode by overlapping an upper or lower portion of a wiring or an electrode without increasing the line width, and electrically connecting the wiring, the auxiliary wiring, the electrode, and the auxiliary electrode, respectively. By reducing the wiring resistance and forming the auxiliary wiring or the auxiliary electrode itself as a repair wiring, there is an effect of preventing the disconnection due to the enlargement.

1 is a cross-sectional view showing a cross section of a part of a general transverse electric field type liquid crystal display device;

2A and 2B are cross-sectional views showing operations in off and on states of a general transverse electric field type liquid crystal display device.

3 is a plan view showing a part of a pixel portion of a general transverse electric field type liquid crystal display device;

4 is a cross-sectional view taken along the line A-A of FIG.

5 is a cross-sectional view taken along the line B-B of FIG. 3.

6 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a first embodiment of the present invention.

FIG. 7 is a cross-sectional view taken along the line C-C of FIG. 6; FIG.

8 is a cross-sectional view taken along the line D-D of FIG. 6.

9 is a cross-sectional view taken along the line E-E of FIG. 6.

FIG. 11 is a cross-sectional view of a modification of the first embodiment, taken along the line E-E of FIG.

12A to 12D are plan views illustrating manufacturing steps of an array substrate for a transverse electric field type liquid crystal display device according to a first exemplary embodiment of the present invention.

13 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a second embodiment of the present invention.

14A is a cross-sectional view taken along the line F-F of FIG. 13;

Fig. 14B is a sectional view showing a modification of the second embodiment of the present invention.

15 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to a third embodiment of the present invention.

FIG. 16 is a cross-sectional view taken along the line F-F of FIG. 15; FIG.

<Description of the symbols for the main parts of the drawings>

100: substrate 105: gate wiring

106: gate electrode 110: common wiring

112: common electrode 120: data auxiliary wiring

122: auxiliary pixel electrode 133: semiconductor layer

140: data wiring 143: source electrode

147: drain electrode 160: pixel electrode

163: auxiliary common wiring 170a, 170b: auxiliary gate wiring

172a and 172b: data auxiliary wiring 174a and 174b: auxiliary common electrode

176a and 176b auxiliary pixel electrode 178 drain electrode

Claims (21)

A substrate; A plurality of gate wirings formed in the horizontal direction on the substrate; A plurality of data lines crossing the gate lines and having a vertical direction; A pixel region defined by crossing the gate wiring and the data wiring; A switching element formed at an intersection point of the gate and the data line of the pixel region; A common wiring formed in parallel with the gate wiring; A plurality of common electrodes branched into the pixel area from the common wiring; A plurality of pixel electrodes formed between the common electrodes and connected to the switching elements; An auxiliary pixel electrode overlapping the pixel electrode in the pixel region and having both ends in contact with the pixel electrode; Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 1, And an auxiliary gate line overlapping the gate line in the pixel area. The method of claim 2, And both ends of the auxiliary gate line are in contact with the gate line through a contact hole. The method according to any one of claims 1 to 3, And an auxiliary data line overlapping the data line in the pixel area. The method of claim 4, wherein And both ends of the auxiliary data line are in contact with the data line through a contact hole. The method of claim 1, And an auxiliary common electrode overlapping the common electrode in the pixel area. The method of claim 4, wherein And an auxiliary common electrode overlapping the common electrode in the pixel area. The method according to any one of claims 6 to 7, And the both ends of the auxiliary common electrode contact the common electrode through the contact hole. In an array substrate for a transverse electric field type liquid crystal display device comprising a pixel region defined by crossing a gate wiring, a data wiring, and the two wirings, a switching element provided in the pixel region, a common electrode, and a pixel electrode, A substrate; A gate wiring formed on the substrate; A common wiring formed in parallel with the gate wiring; A plurality of common electrodes branched from the common wiring; A gate insulating film formed on an entire surface of the gate wiring and the common wiring; A semiconductor layer formed on the gate insulating layer; A data line crossing the gate line over the gate insulating film; A source electrode branching from the data line and partially overlapping the semiconductor layer; A drain electrode partially overlapping the semiconductor layer and spaced apart from the source electrode by a predetermined distance; A protective layer formed on an entire surface of the data line and the source and drain electrodes; A pixel electrode on the protective layer and in contact with the drain electrode and disposed in a region between the common electrodes; An auxiliary pixel electrode disposed under the pixel electrode and floating on the substrate or the gate insulating layer in an island shape; Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 9, And an island-shaped auxiliary pixel electrode formed by being floated on the substrate or the gate insulating layer, wherein both ends of the island-shaped auxiliary pixel electrode are in contact with each other through a contact hole. The method according to any one of claims 9 to 10, And an island-shaped auxiliary common electrode overlapping the common electrode on the gate insulating layer or the protective layer on the common electrode. The method of claim 11, The auxiliary common electrode formed in an island shape on the gate insulating layer or the protective layer has both ends in contact with a lower common electrode. The method of claim 11, And an auxiliary data line formed in an island shape and overlapping with the data line above the substrate below the data line or above the protective layer above the data line. The method of claim 13, And both ends of the auxiliary data line are in contact with the data line. The method according to claim 13 or 14, And an auxiliary gate wiring formed in an island shape and overlapping with the gate wiring over a gate insulating layer or a protective layer on the gate wiring. The method of claim 15, And both ends of the auxiliary gate line are in contact with the gate line. Forming a plurality of gate wirings in a horizontal direction on the substrate; Forming a plurality of common wirings in parallel with the gate wirings, and simultaneously forming a plurality of common electrodes branched from the common wirings; Forming a plurality of auxiliary pixel electrodes between the common electrodes; Forming a gate insulating film over the gate line, the common electrode, and the auxiliary pixel electrode; Forming a plurality of data lines crossing the gate lines over the gate insulating layer; Forming a switching element at an intersection point of the data line and the gate line; Forming a protective layer on a front surface of the switching element and the data line; Forming a plurality of pixel electrodes connected to the switching element between the common electrodes on the passivation layer, overlapping the auxiliary pixel electrodes below, and contacting both ends of the auxiliary pixel electrodes; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 17, Forming an auxiliary data line at a position overlapping the data line before forming the gate insulating layer; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device further comprising. The method of claim 18, The forming of the gate insulating layer may include exposing portions of both ends of the auxiliary data line. Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device further comprising. The method according to any one of claims 18 or 19, The forming of the pixel electrode may include forming an auxiliary common electrode overlapping the common electrode and having both ends in contact with the common electrode. Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device further comprising. The method of claim 20, The forming of the auxiliary common electrode may include forming an auxiliary gate line overlapping the gate line and having both ends in contact with the gate line. Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device further comprising.