KR20050066558A - Semiconductor device for reinforcing security by using photo detection circuit - Google Patents

Semiconductor device for reinforcing security by using photo detection circuit Download PDF

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KR20050066558A
KR20050066558A KR1020030097861A KR20030097861A KR20050066558A KR 20050066558 A KR20050066558 A KR 20050066558A KR 1020030097861 A KR1020030097861 A KR 1020030097861A KR 20030097861 A KR20030097861 A KR 20030097861A KR 20050066558 A KR20050066558 A KR 20050066558A
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circuit
semiconductor device
security
photodiode
smart card
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민병호
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매그나칩 반도체 유한회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

스마트 카드 집적회로를 제작함에 있어 빛 감지 소자를 제작하고 이 소자를 이용하여 이 소자를 이용 해커들이 패키지를 제거할 경우 빛을 감지하여 칩 전체 동작을 멈추게함으로써 해킹이 불가능하게 되는 빛 감지 방법을 이용하여 보안성을 강화한 스마트 카드 집적회로 칩을 개시한다. 개시된 반도체 소자는 광검출 회로를 이용하여 보호층으로 덮힌 반도체 소자내에 집적된 내부 회로를 보호하기 위한 방법에 있어서, 포토 다이오드 및 포토 다이오드에 연결된 다수의 트랜지스터 및 버퍼 딜레이를 구비하는 회로를 포함하며, 반도체 소자의 보호층이 손상을 받은 경우 빛이 포토 다이오드에 입사되면 상기 회로가 반도체 소자의 모든 동작을 정지시킴으로써 반도체 소자를 보호하는 것을 특징으로 한다. 따라서, 패키지 제거시 바로 보안 회로가 동작하여 해킹을 차단하여, 내부 회로 보안을 강화시킬 수 있는 효과가 있다. 또한, 스마트 카드 집적회로 제품에서 가장 중요한 부분중의 하나인 보안성을 강화할 수 있으므로 중요 데이터 유실시 나타날 수 있는 손실 만큼의 경제적인 이점을 얻게 된다. In the manufacture of smart card integrated circuits, we use a light sensing method that makes light sensing devices and uses them to detect light when hackers remove the package and stop the whole chip operation. A smart card integrated circuit chip having enhanced security is disclosed. Disclosed is a method for protecting an internal circuit integrated in a semiconductor device covered with a protective layer using a photodetector circuit, the method comprising a photodiode and a circuit having a plurality of transistors connected to the photodiode and a buffer delay, When the protective layer of the semiconductor device is damaged, when light is incident on the photodiode, the circuit protects the semiconductor device by stopping all operations of the semiconductor device. Therefore, the security circuit operates immediately upon package removal to block hacking, thereby enhancing internal circuit security. In addition, security can be enhanced, which is one of the most important parts of smart card integrated circuit products, which can be as economical as the loss of sensitive data.

Description

광검출 회로를 이용하여 보안성을 강화한 반도체 소자{SEMICONDUCTOR DEVICE FOR REINFORCING SECURITY BY USING PHOTO DETECTION CIRCUIT} Semiconductor device with enhanced security using photodetector circuits {SEMICONDUCTOR DEVICE FOR REINFORCING SECURITY BY USING PHOTO DETECTION CIRCUIT}

본 발명은 반도체 제조 공정에 관한 것으로서, 보다 상세하게는, 스마트 카드 집적회로를 제작함에 있어 빛 감지 소자를 제작하고 이 소자를 이용하여 이 소자를 이용 해커들이 패키지를 제거할 경우 빛을 감지하여 칩 전체 동작을 멈추게함으로써 해킹이 불가능하게 되는 빛 감지 방법을 이용하여 보안성을 강화한 스마트 카드 집적회로 칩에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing process, and more particularly, to fabricating a smart card integrated circuit. The present invention relates to a smart card integrated circuit chip which has enhanced security by using a light sensing method in which a hacking is impossible by stopping the whole operation.

일반적으로, 해킹을 방지하는 방법으로 사용하던 기술로는, 마지막 메탈층을 이용하여 전기적인 신호 전달 목적외에 메탈 박막 아래 설계된 내용을 눈으로 관찰하는 것을 방해할 목적으로 차폐 패턴을 만드는 방법과, 해커들이 이 차폐 패턴을 제거하고 아래에 설계된 내용을 관찰하고자 전기 신호들을 분석할 목적으로 보호막(passivation layer) 등을 제거할 경우, 마지막 메탈 사이의 정전용량의 변화(passivation detector)를 감지하여 칩의 동작을 멈추게하는 방법등을 사용하고 있다. In general, techniques used to prevent hacking include a method of making a shielding pattern using a final metal layer for the purpose of preventing visual observation of a design under a metal thin film in addition to the electrical signal transmission purpose, and a hacker. When they remove this shielding pattern and remove the passivation layer for the purpose of analyzing the electrical signals to observe the design below, the chip operates by detecting the passivation detector between the last metals. I'm using a way to stop it.

첫 번째 방법은, 시각적으로 혼동을 주어 어려움을 주어 해킹 시간을 늘릴수 있으나, 완전한 보안은 어려우며 또한 단디 차폐층 형성을 위하여 추가적인 메탈 공정을 진행하여야 하기 때문에 경제적인 문제가 있다. The first method can increase the hacking time due to visual confusion and difficulty, but it is economically difficult because complete security is difficult and additional metal processing must be performed to form a shielding layer.

또한, 두 번째 방법은 정전용량의 변화를 감지할 수 있는 회로 부분이 어디인지 찾을 수만 있다면 그 부분의 보호막만을 제거하지 않는다면 해킹방지 회로는 동작하지 않게 되는 단점이 있다. In addition, the second method has a disadvantage in that the hacking prevention circuit does not operate unless the protection layer of the portion is removed if only a portion of the circuit capable of detecting a change in capacitance is found.

본 발명은 상기와 같은 문제점을 해결하기 위해 창작된 것으로서, 본 발명의 주목적은 종래의 스마트 카드 집적회로 제품 생산기술을 가지고 광검출 소자를 개발하여 추가적인 공정이 필요하지 않았으며, 해킹을 위하여 패키지를 제거하는 순간 보안회로가 동작하는 것이므로 어떠한 보안 기술보다 사전에 스마트 가트 집적회로 내용을 보호할 수 있는 빛 감지 방법을 이용하여 보안성을 강화한 스마트 카드 집적회로 칩을 제공하는 것이다. The present invention was created to solve the above problems, and the main purpose of the present invention is to develop a photodetector device with a conventional smart card integrated circuit product production technology, no additional process is required, and a package for hacking. Since the security circuit is activated at the time of removal, it provides a smart card integrated circuit chip with enhanced security by using a light sensing method that can protect the contents of the smart gart integrated circuit before any security technology.

또한, 본 발명의 다른 목적은 NMOS 트랜지스터의 소오스/드레인 접합과 고전압 P-형 웰 접합간의 공핍 커패시턴스를 이용한 광검출 소자를 채택하여, 만약 패키지의 표면이 제거되어 빛이 칩으로 침투할 경우 광검출 소자의 n+/HVpwell 공핍영역에 전자-전공쌍이 공핍 정전용량을 변화시키게 되고 이러한 변화를 스마트 카드 IC의 중앙처리 장치가 인식하게되면 해킹당하고 있다고 판단하여 모든 동작을 멈추게 하는 빛 감지 방법을 이용하여 보안성을 강화한 스마트 카드 집적회로 칩을 제공하는 것이다. Another object of the present invention is to adopt a photodetector using a depletion capacitance between a source / drain junction of a NMOS transistor and a high voltage P-type well junction, so that if the surface of the package is removed and light penetrates into the chip, In the n + / HVpwell depletion region of the device, the electron-electron pair changes the depletion capacitance, and when the central processing unit of the smart card IC recognizes the change, it is determined that it is hacked and secured using a light sensing method that stops all operations. It is to provide smart card integrated circuit chip with enhanced performance.

상기와 같은 목적을 실현하기 위한 본 발명은 광검출 회로를 이용하여 보호층으로 덮힌 반도체 소자내에 집적된 내부 회로를 보호하기 위한 방법에 있어서, 포토 다이오드 및 포토 다이오드에 연결된 다수의 트랜지스터 및 버퍼 딜레이를 구비하는 회로를 포함하며, 반도체 소자의 보호층이 손상을 받은 경우 빛이 포토 다이오드에 입사되면 상기 회로가 반도체 소자의 모든 동작을 정지시킴으로써 반도체 소자를 보호하는 것을 특징으로 하는 광검출 회로를 이용하여 보안성을 강화한 반도체 소자를 제공한다. The present invention for realizing the above object is a method for protecting an internal circuit integrated in a semiconductor device covered with a protective layer by using a photodetector circuit, a plurality of transistors and a buffer delay connected to the photodiode and the photodiode Including a circuit provided, if the protective layer of the semiconductor device is damaged when light is incident on the photodiode using the photodetector circuit characterized in that the circuit protects the semiconductor device by stopping all operations of the semiconductor device Provided is a semiconductor device with enhanced security.

이하, 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 설명한다. 또한 본 실시예는 본 발명의 권리범위를 한정하는 것은 아니고, 단지 예시로 제시된 것이다. Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In addition, this embodiment is not intended to limit the scope of the present invention, but is presented by way of example only.

도 1은 본 발명의 바람직한 실시예에 따른 광검출기인 포토 다이오드의 평면도이다. 1 is a plan view of a photodiode as a photodetector according to a preferred embodiment of the present invention.

도 2는 도 1의 선분 A-A'을 따라서 절개한 포토 다이오드의 단면도이다. FIG. 2 is a cross-sectional view of the photodiode cut along the line segment AA ′ of FIG. 1.

도 1 및 도 2에 도시한 바와 같이, 본 발명의 바람직한 실시예에 따른 포토 다이오드(100)는 반도체 기판(102), 반도체 기판(102) 상에 형성된 p-웰(106), 필드 산화막(108), 공핍 영역(104) 및 n+ 소오스/드레인 영역(110, 112)을 포함한다. 1 and 2, a photodiode 100 according to a preferred embodiment of the present invention includes a semiconductor substrate 102, a p-well 106 formed on the semiconductor substrate 102, and a field oxide film 108. ), The depletion region 104 and the n + source / drain regions 110, 112.

본 발명의 바람직한 실시예에 따르면, n+ 소오스/드레인 영역(110, 112)와 고전압 p-웰(106) 사이에 공핍 커패시터로 사용되는 공핍 영역(104)이 넓게 형성된다. According to a preferred embodiment of the present invention, a depletion region 104 used as a depletion capacitor is widely formed between the n + source / drain regions 110 and 112 and the high voltage p-well 106.

또한, 회로 동작시 p-웰(106) 상에 형성된 p+ p-웰(107)은 0V 전위로 묶이게 되며, 공핍 영역(104)에서 형성되어지는 홀을 흡수한다. 그리고, 회로 동작시 n+ 영역에는 통상 리?? 동작을 통하여 포지티브 전압이 인가된다. In addition, the p + p-well 107 formed on the p-well 106 is bound to a 0V potential in the circuit operation, and absorbs the holes formed in the depletion region 104. During the circuit operation, the n + region is normally reset. In operation, a positive voltage is applied.

한편, 빛이 공핍 영역(104)에 도달하게 되면, 전자-홀 쌍을 형성하게 되고, 공핍 영역(104)의 양단의 전위차에 의해 전자는 n+ 쪽으로 정공은 고전압 p-웰(106) 쪽으로 이동하게 되어 양단의 전위차는 줄어들게 된다. On the other hand, when light reaches the depletion region 104, electron-hole pairs are formed, and electrons move toward n + toward the high voltage p-well 106 by the potential difference between both ends of the depletion region 104. As a result, the potential difference between both ends is reduced.

도 3은 본 발명의 바람직한 실시예에 따른 광검출 회로를 설명하기 위한 개략적인 도면이다. 3 is a schematic diagram illustrating a photodetector circuit according to a preferred embodiment of the present invention.

도 3을 참조하여 본 발명의 바람직한 실시예에 따른 광검출 회로의 동작을 설명하면 다음과 같다. 먼저, 회로의 초기 동작으로 리??을 시키며, 제 3 트랜지스터(Tr. C)의 게이트에 포지티브 전압을 인가하여 트랜지스터를 턴-온(turn-on) 시켜 양의 전위를 노드(A)로 이동시킨다. Referring to Figure 3 describes the operation of the photodetector circuit according to the preferred embodiment of the present invention. First, the circuit is reset by the initial operation of the circuit, and a positive voltage is applied to the gate of the third transistor Tr. C to turn on the transistor to move the positive potential to the node A. Let's do it.

그리고 나서, 포토 다이오드(100)의 기본 동작에서 설명하였듯이 해커가 패키지를 제거하고 내부 회로를 판독하려고 하는 경우처럼 빛이 입사된다면 노드(A)의 전압(Va)은 처음보다 낮아지게 된다. Then, as described in the basic operation of the photodiode 100, if light is incident, such as when a hacker removes a package and reads an internal circuit, the voltage Va of the node A becomes lower than the first time.

제 3 트랜지스터(Tr. C)가 턴-온된 후, 버퍼-디레이(buffer-delay)의 영향으로 어느 정도의 시간이 지나게 되면, 제 1 트랜지스터(Tr. A)가 턴-온되도록 설계한다. 제 1 트랜지스터(Tr. A)와 제 2 트랜지스터(Tr. B)를 통하여 전류가 흐르게 된다. 전류의 양은 제 2 트랜지스터(Tr. B)의 게이트 전압에 따라 결정되어지며, 제 2 트랜지스터(Tr. B)의 전압은 두가지를 가질 수 있는데, 하나는 패키지가 제거되어 빛이 입사되었을때의 포토 다이오드(100)의 공핍 커패시터의 전압값이며, 또 하나는 빛이 전혀들어오지 않을 때, 즉 패키지가 제거되지 않은 정상 상태의 값이다. After the third transistor Tr. C is turned on, if a certain time elapses due to a buffer-delay, the first transistor Tr. A is designed to be turned on. Current flows through the first transistor Tr.A and the second transistor Tr.B. The amount of current is determined by the gate voltage of the second transistor (Tr. B), and the voltage of the second transistor (Tr. B) can have two types, one of which is the photo when the package is removed and light is incident. It is the voltage value of the depletion capacitor of the diode 100, and another value is a steady state value when no light comes in, that is, the package is not removed.

두가지 상태의 값을 비교하여 칩이 정상상태인지 비정상 상태인지를 중앙처리장치(CPU)가 인식한다. By comparing the values of the two states, the CPU recognizes whether the chip is normal or abnormal.

CPU에서 인식한 결과, 제 1 트랜지스터(Tr. A)와 제 2 트랜지스터(Tr. B)를 통하여 흐르는 전압이 급격하게 줄어들었다면 CPU는 패키지가 제거되어 빛이 들어오고 있다고 판단 모든 동작을 멈춤으로써 스마트 카드 IC 내부의 데이터를 보호할 수 있게 된다. If the CPU recognizes that the voltage flowing through the first transistor Tr. A and the second transistor Tr. B has been abruptly reduced, the CPU determines that the package is removed and light is coming in. The data inside the card IC can be protected.

본 발명의 바람직한 실시예에 따르면, 반도체 소자가 스마트 카드 집적회로인 것을 특징으로 한다. According to a preferred embodiment of the present invention, the semiconductor device is a smart card integrated circuit.

또한, 본 발명의 바람직한 실시예에 따르면, 광검출 회로를 CMOS 제조 기술을 이용하여 제조하는 것을 특징으로 한다. In addition, according to a preferred embodiment of the present invention, the photodetector circuit is manufactured using CMOS fabrication techniques.

본 발명을 본 명세서 내에서 몇몇 바람직한 실시예에 따라 기술하였으나, 당업자라면 첨부한 특허 청구 범위에서 개시된 본 발명의 진정한 범주 및 사상으로부터 벗어나지 않고 많은 변형 및 향상이 이루어질 수 있다는 것을 알 수 있을 것이다. While the invention has been described in accordance with some preferred embodiments herein, those skilled in the art will recognize that many modifications and improvements can be made without departing from the true scope and spirit of the invention as set forth in the appended claims.

상기한 바와 같이 본 발명은 패키지 제거시 바로 보안 회로가 동작하여 해킹을 차단하여, 내부 회로 보안을 강화시킬 수 있는 효과가 있다. As described above, the present invention has an effect of enhancing the internal circuit security by blocking the hacking by immediately operating the security circuit when the package is removed.

따라서, 본 발명은 스마트 카드 집적회로 제품에서 가장 중요한 부분중의 하나인 보안성을 강화할 수 있으므로 중요 데이터 유실시 나타날 수 있는 손실 만큼의 경제적인 이점을 얻게 된다. Therefore, the present invention can enhance security, which is one of the most important parts of smart card integrated circuit products, and thus obtains an economic advantage as much as loss of important data may occur.

또한, 본 발명은 정규의 CMOS 제조 기술에 추가적인 공정없이 제작 가능한 광검출 보안 기술이므로 스마트 카드 집적회로 제품군 뿐만 아니라 보안 유지가 필요한 모든 제품에서 사용 가능하다. In addition, the present invention is a photodetection security technology that can be manufactured without additional processing to the normal CMOS manufacturing technology, so it can be used in not only smart card integrated circuit family but also all products requiring security maintenance.

도 1은 본 발명의 바람직한 실시예에 따른 광검출기인 포토 다이오드의 평면도이다. 1 is a plan view of a photodiode as a photodetector according to a preferred embodiment of the present invention.

도 2는 도 1의 선분 A-A'을 따라서 절개한 포토 다이오드의 단면도이다. FIG. 2 is a cross-sectional view of the photodiode cut along the line segment AA ′ of FIG. 1.

도 3은 본 발명의 바람직한 실시예에 따른 광검출 회로를 설명하기 위한 개략적인 도면이다. 3 is a schematic diagram illustrating a photodetector circuit according to a preferred embodiment of the present invention.

- 도면의 주요부분에 대한 부호의 설명 -   -Explanation of symbols for the main parts of the drawings-

100 : 포토 다이오드 102 : 실리콘 기판100: photodiode 102: silicon substrate

104 : 공핍영역 106 : p-웰104: depletion region 106: p-well

108 : 필드 산화막 110. 112 : n+ 소오스/드레인 108: field oxide film 110. 112: n + source / drain

Claims (3)

광검출 회로를 이용하여 보호층으로 덮힌 반도체 소자내에 집적된 내부 회로를 보호하기 위한 방법에 있어서, 포토 다이오드; 및 상기 포토 다이오드에 연결된 다수의 트랜지스터 및 버퍼 딜레이를 구비하는 회로를 포함하며, 상기 반도체 소자의 보호층이 손상을 받은 경우 빛이 포토 다이오드에 입사되면 상기 회로가 상기 반도체 소자의 모든 동작을 정지시킴으로써 상기 반도체 소자를 보호하는 것을 특징으로 하는 광검출 회로를 이용하여 보안성을 강화한 반도체 소자. A method for protecting an internal circuit integrated in a semiconductor device covered with a protective layer using a photodetector circuit, comprising: a photodiode; And a circuit having a plurality of transistors and a buffer delay connected to the photodiode, wherein when the protective layer of the semiconductor element is damaged, the circuit stops all operations of the semiconductor element when light is incident on the photodiode. A semiconductor device having enhanced security by using a photodetector circuit, characterized in that to protect the semiconductor device. 제 1항에 있어서, 상기 반도체 소자가 스마트 카드 집적회로인 것을 특징으로 하는 광검출 회로를 이용하여 보안성을 강화한 반도체 소자. 2. The semiconductor device according to claim 1, wherein the semiconductor device is a smart card integrated circuit. 제 1항에 있어서, 상기 광검출 회로를 CMOS 제조 기술을 이용하여 제조하는 것을 특징으로 하는 광검출 회로를 이용하여 보안성을 강화한 반도체 소자. 2. The semiconductor device according to claim 1, wherein the photodetector circuit is manufactured by using a CMOS fabrication technique.
KR1020030097861A 2003-12-26 2003-12-26 Semiconductor device for reinforcing security by using photo detection circuit KR20050066558A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7748637B2 (en) 2006-11-16 2010-07-06 Samsung Electronics Co., Ltd. Smart card with laser attack detector
US7787315B2 (en) 2007-06-22 2010-08-31 Samsung Electronics Co., Ltd. Semiconductor device and method for detecting abnormal operation
US7813175B2 (en) 2006-12-06 2010-10-12 Samsung Electronics Co., Ltd. Smart card capable of sensing light
WO2017138773A1 (en) * 2016-02-12 2017-08-17 한양대학교 산학협력단 Security semiconductor chip and method for operating same
KR20170095154A (en) * 2016-02-12 2017-08-22 한양대학교 산학협력단 Secure semiconductor chip and operating method thereof
US9891183B2 (en) 2015-07-07 2018-02-13 Nxp B.V. Breach sensor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7748637B2 (en) 2006-11-16 2010-07-06 Samsung Electronics Co., Ltd. Smart card with laser attack detector
US7813175B2 (en) 2006-12-06 2010-10-12 Samsung Electronics Co., Ltd. Smart card capable of sensing light
US7787315B2 (en) 2007-06-22 2010-08-31 Samsung Electronics Co., Ltd. Semiconductor device and method for detecting abnormal operation
US9891183B2 (en) 2015-07-07 2018-02-13 Nxp B.V. Breach sensor
WO2017138773A1 (en) * 2016-02-12 2017-08-17 한양대학교 산학협력단 Security semiconductor chip and method for operating same
KR20170095154A (en) * 2016-02-12 2017-08-22 한양대학교 산학협력단 Secure semiconductor chip and operating method thereof
US10778679B2 (en) 2016-02-12 2020-09-15 Industry-University Cooperation Foundation Hanyang University Secure semiconductor chip and operating method thereof

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