KR20050064361A - Liquid crystal display device and manufacturing method of the same - Google Patents

Abstract

The present invention relates to a transverse electric field type liquid crystal display device, and an object of the present invention is to provide a quad method transverse electric field type liquid crystal display device which can improve the aperture ratio. Another object of the present invention is to provide a shorting bar structure of a quad type transverse electric field type liquid crystal display device.

The present invention includes a first gate shorting bar connected to the gate lines of odd-numbered rows and a second gate shorting bar connected to the gate lines of even-numbered rows, wherein the first and second gate shorting bars have a display area therebetween. The present invention provides a liquid crystal display device and a method of manufacturing the same.

The present invention has the effect of increasing the aperture ratio of the liquid crystal display by sharing two common upper and lower sub-pixels in one pixel in the quad type liquid crystal display. In addition, the gate shorting bar capable of inspecting whether the gate wiring is short-circuited is disposed on both sides of the substrate, whereby the gate wiring short-circuit can be inspected.

Description

Liquid crystal display device and manufacturing method of the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a transverse electric field type liquid crystal display device which drives liquid crystal by a transverse electric field of a pixel electrode and a common electrode formed on the same substrate.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the arrangement of molecules can be controlled by artificially applying an electric field to the liquid crystal. Therefore, by adjusting the molecular arrangement of the liquid crystal, light can be refracted to express image information.

The liquid crystal display is driven by forming an electric field in the liquid crystal layer according to the voltage difference between the common electrode and the pixel electrode to express the image information. The common electrode and the pixel electrode are formed on the same substrate to form a horizontal electric field in the liquid crystal layer. In-plane switching mode (IPS) liquid crystal display is widely used because of its excellent viewing angle characteristics.

1A and 1B are cross-sectional views each showing a general transverse electric field type liquid crystal display device, and schematically show driving of liquid crystal molecules 52 in a voltage off / on state.

As illustrated, the conventional transverse electric field type liquid crystal display device has a pixel electrode 40 and a common electrode 45 formed on the first substrate 10, and a transverse electric field generated by the two electrodes 40 and 45. As a result, the liquid crystal molecules 52 change.

In the voltage-off state, as shown in FIG. 1A, no lateral electric field is formed between the two electrodes 40 and 45, so that no electric field is applied to the liquid crystal molecules 52. Therefore, the orientation change does not occur in the liquid crystal molecules 52.

On the other hand, in the voltage-on state, as shown in FIG. 1B, an electric field 56 is generated between the pixel electrode 40 and the common electrode 45. A vertical electric field is formed on the pixels and the common electrodes 40 and 45 so that the liquid crystal molecules 52a positioned therein have no change in the orientation direction, but the liquid crystal molecules 52b positioned between the common electrode 45 and the pixel electrode 40. Is arranged in parallel with the substrate by a horizontal (or lateral) electric field generated between the common electrode 45 and the pixel electrode 40.

As described above, the transverse electric field type liquid crystal display device is widely used because the liquid crystal molecules are driven by the transverse electric field generated between the pixel electrode and the common electrode.

2 is a plan view illustrating a conventional quad system transverse electric field type liquid crystal display device.

The quad method is a driving method of a liquid crystal display device in which one pixel P for displaying an image is composed of four sub-pixels. For example, four sub-pixels implement colors of red, green, blue, and white.

As shown in the drawing, in the conventional quad system transverse electric field type liquid crystal display, a plurality of gates and data lines 120 and 130 orthogonal to each other are formed in the image display area D, and the gate and data lines 120 and 130 are formed. The sub pixel is defined by. In the sub-pixel, a thin film transistor T as a switching element connected to the gate and data lines 120 and 130, a pixel electrode 140 connected to the thin film transistor T, and a pixel electrode 140. The common electrode 145 is formed to form a transverse electric field. The common electrode 145 is connected to the common line 147 formed in parallel with the gate line 120 to receive a common voltage.

In addition, the gate and data lines 120 and 130 are connected to gates and data pads 125 and 135 positioned in the non-image display area to receive scan and image signals. The gate and data pads 125 and 135 are connected to a gate and data driver (not shown), which are external signal transfer circuits, to receive a scanning and video signal.

The thin film transistor T is formed on the gate electrode 121 branched from the gate wiring 120, the semiconductor layer 115 formed on the gate electrode 121, and the data layer 130 formed on the semiconductor layer 115. ) And a drain electrode 133 spaced apart from the source electrode 131 by a predetermined distance. The thin film transistor T is driven on / off according to a scan signal transmitted to the gate electrode 121, thereby transferring the image signal transmitted to the source electrode 131 to the drain electrode 133. do.

The pixel electrode 140 is connected to the drain electrode 133, and the common electrode 145 is formed in parallel with the pixel electrode 140. The common electrode 145 is connected to the common wire 147 through the contact hole 149 to receive a common voltage.

In the common wiring 147, the common wiring 147 is individually positioned in each of the gate wirings 120, that is, in the upper and lower sub-pixels. The common wiring 147 is formed of the same material in the same process as the gate wiring 120.

On the other hand, each of the gate line 120 and the common line 147 is connected to the gate and the common line shorting bars 127 and 143 positioned in the non-display area N in order to check the antistatic property and the short circuit. Although not shown, the data line 130 is also connected to the data shorting bar.

3 is a diagram illustrating a gate and a common wiring shorting bar formed in a conventional quad type liquid crystal display. For convenience of description, only the gate and the common wiring shorting bar and the gate wiring are shown.

As illustrated, the gate line 120 is connected to the gate shorting bar 127 positioned in the direction formed in the direction of the gate pad 125. The common wiring 147 may include a first common wiring shorting bar 143a formed at both ends in a direction opposite to the direction of the gate pad 125, and a second common wiring shorting bar 143b formed when the pixel electrode is formed. Connected. Here, the second common wiring shorting bar 143b is connected to the common wiring 147 through the contact hole 144.

Since the gate wiring 120 and the common wiring 147 may be shorted by being disposed in close proximity, the gate wiring 120 may be connected by connecting the gates and the common wiring shorting bars 127 and 143 after the gate wiring 120 forming process. And short circuit of the common wiring 147 is checked.

When the gate line 120 and the common line 147 are shorted by performing a short-circuit test, the gate line 120 formed on the substrate is removed, and the gate line 120 is again formed on the substrate. If the gate wiring 120 is not short-circuited, a subsequent step, that is, a gate insulating film (not shown) is formed, and a process for forming a semiconductor layer and a data wiring (refer to 115 and 130 of FIG. 2) is performed. do.

Meanwhile, the gate shorting bar 127 is removed along the scribing line S after the bonding process is performed on the substrate on which the thin film transistor is formed and the color filter substrate (not shown) corresponding thereto.

As described above, in the conventional quad type liquid crystal display, since common wirings are disposed on two upper and lower subpixels in one pixel, the aperture ratio may be reduced by an area occupied by the common wiring.

SUMMARY OF THE INVENTION An object of the present invention for solving the above-described problems is that the quadrature transverse side which can solve the problem that the aperture ratio is reduced by the area occupied by the common wiring, since the common wiring is disposed in each of the two upper and lower sub-pixels in one pixel. It is to provide an electric field type liquid crystal display device.

Another object of the present invention is to provide a shorting bar structure of a quad type transverse electric field type liquid crystal display device which can solve the above problem.

In order to achieve the above object, the present invention provides a plurality of gate and data wiring lines extending in directions of rows and columns on a substrate including a display area and a non-display area; A switching element located in the display area and connected to the gate line and the data line; A pixel electrode positioned in the display area and connected to the switching element; A common electrode positioned in the display area and formed in parallel with the pixel electrode; A common wiring disposed between the gate wiring of an adjacent odd-numbered row and the gate wiring of an even-numbered row and connected to the common electrode; A first gate shorting bar located in said non-display area and connected to said gate wiring of an odd-numbered row; And a second gate shorting bar positioned in the non-display area and connected to the gate lines in even-numbered rows, wherein the first and second gate shorting bars are spaced apart from each other with the display area interposed therebetween. do.

The display device may further include a common wire shorting bar positioned in the non-display area and connected to the common wire. The common wiring shorting bar may include first and second common wiring shorting bars positioned in a direction in which the first and second gate wiring shorting bars are positioned, and the common wiring shorting bar may be formed of the same material as the pixel electrode. And a contact hole connecting the common wiring and the common wiring shorting bar.

The common wiring may be made of the same material as the gate wiring.

In another aspect, the present invention provides a plurality of gate wirings extending in a row direction on a substrate including a display area and a non-display area, first and second gate shorting bars connected to the gate wiring in the non-display area, and adjacent to each other. A common wiring disposed between the odd-numbered gate lines and the even-numbered gate lines to form a common line connected to the common electrode; After forming the gate wirings, forming a plurality of data wirings extending in a column direction and a switching element connected to the gates and data wirings in the display area; And forming a pixel electrode connected to the switching element in the display area, and a common electrode parallel to the pixel electrode, wherein the first gate shorting bar is connected to the gate line in an odd-numbered row. The second gate shorting bar may be connected to the gate lines of even-numbered rows, and the first and second gate shorting bars may be spaced apart from each other with the display area therebetween.

The forming of the common electrode may further include forming a common wiring shorting bar connected to the common wiring in the non-display area. The forming of the common wiring shorting bar may include forming first and second common wiring shorting bars positioned in a direction in which each of the first and second gate wiring shorting bars is positioned, wherein the common wiring shorting bar is a pixel. It may be made of the same material as the electrode, and may further comprise forming a contact hole for connecting the common wiring and the common wiring shorting bar.

The common wiring may be made of the same material as the gate wiring.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

4 is a plan view illustrating a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

In the quad type transverse electric field type liquid crystal display according to the exemplary embodiment of the present invention, the aperture ratio can be improved by sharing the common wiring between two upper and lower sub pixels positioned in one pixel. In addition, the gate shorting bars connected to the odd-numbered and even-numbered gate lines may be disposed on the left and right to effectively check whether the gate lines are shorted.

As shown in the figure, a plurality of gate and data lines 220 and 230 are orthogonal to each other in the image display area D in the quad type transverse electric field type liquid crystal display device, and are formed by the gate and data lines 220 and 230. Sub pixels are defined. In the sub pixel, a thin film transistor T, a pixel electrode 240 connected to the thin film transistor T, and a pixel electrode 240 and a transverse electric field as a switching element connected to the gate and data lines 220 and 230. The common electrode 245 is formed to form a. The common electrode 245 is connected to the common wire 247 shared by the two upper and lower sub pixels to receive the common voltage.

In addition, the gate and data lines 220 and 230 are connected to gates and data pads 225 and 235 positioned in the image non-display area N to receive scan and image signals. The gate and data pads 225 and 235 are connected to a gate and a data driver (not shown), which are external signal transfer circuits, to receive scan and image signals.

The thin film transistor T is formed on the gate electrode 221 branched to the gate wiring 220, the semiconductor layer 215 formed on the gate electrode 221, and on the semiconductor layer 215, and the data wiring 230. ) And a drain electrode 233 spaced apart from the source electrode 231 by a predetermined distance. The thin film transistor T is driven on / off according to the scan signal transmitted to the gate electrode 221, thereby transferring the image signal transferred to the source electrode 231 to the drain electrode 233.

The pixel electrode 240 is connected to the drain electrode 233. The pixel electrode 240 is a transparent conductive metal such as indium tin oxide (hereinafter referred to as ITO) or indium zinc oxide (hereinafter referred to as IZO). Made of matter. The pixel electrode 240 may be formed of the same material in the same process as the drain electrode 233.

The common electrode 245 is formed in parallel with the pixel electrode 240 and is formed in the same process as the pixel electrode 240. The common electrode 245 is made of a transparent conductive metal material such as ITO and IZO. The common electrode 245 is connected to the common wire 247 through the first contact hole 249 to receive a common voltage.

The common line 247 is formed to have a structure shared by two upper and lower subpixels in one pixel P. For such a structure, the pixel electrode 240 is formed between two upper and lower gate lines 220 constituting the pixel P. Therefore, the two upper and lower sub-pixels positioned in one pixel P receive a common voltage through the same common wiring 247, and the aperture ratio is improved due to sharing of the common wiring 247.

On the other hand, each of the gate line 220 and the common line 247 is connected to the gates and the common line shorting bars 227 and 243 positioned in the non-display area N in order to check the antistatic property and the short circuit. Although not shown, the data line 230 is also connected to the data shorting bar.

In the quad type liquid crystal display according to the exemplary embodiment of the present invention, the sub-pixels in one pixel share a common wiring, so that the gate wiring, the 2n row gate wiring, and the 2n + 1 row gate wiring located between adjacent pixels are close to each other. Since the two gate wirings are more likely to be short-circuited by being disposed, two gate shorting bars connected to each of the even-numbered row gate lines and the odd-numbered row gate lines are formed in the non-display area.

Hereinafter, a gate and a common wiring shorting bar formed in a quad type transverse electric field type liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

5 illustrates a gate and a common wiring shorting bar formed according to an exemplary embodiment of the present invention. For convenience of description, only the gate and the common wiring shorting bar and the gate wiring are shown.

As illustrated, the gate lines 220 of odd-numbered rows are connected to the first gate shorting bar 227a located on the left side, that is, in the direction in which the gate pads 225 are formed, and the data lines 220 of even-numbered rows are connected. Is connected to the second gate shorting bar 227b positioned on the right side, that is, in a direction opposite to the direction in which the gate pad 225 is formed. The common wiring 247 positioned between the odd-numbered and even-numbered gate wirings 220 is connected to the first and second common wiring shorting bars 243a and 243b at both ends.

The first and second gate shorting bars 227a and 227b are formed of the same process and the same material as the gate wiring 220. After the gate line 220 forming process, the first and second gate shorting bars 227a and 227b check whether the even and odd rows of the gate lines 220 are shorted.

After the gate wiring 220 is short-circuited, if the gate wiring 220 is short-circuited, the process of removing the gate wiring 220 formed on the substrate and again forming the gate wiring 220 on the substrate, that is, rework ( rework).

If the gate wiring 220 is not short-circuited, a subsequent process, that is, a gate insulating film (not shown) is formed, and a process for forming a semiconductor layer and data wiring (see 215 and 230 in FIG. 4) and the like is performed. do.

Meanwhile, the first and second gate shorting bars 227a and 227b have a scribing line after the bonding process is performed on the substrate on which the thin film transistor (see T in FIG. 4) is formed and the color filter substrate (not shown) corresponding thereto. Removed along the way.

The first and second common wiring shorting bars 243a and 243b are formed of the same process and the same material as the pixel electrode (see 240 of FIG. 4). That is, when the pixel electrode is formed, the first and second common wiring shorting bars 243a and 243b are formed of a transparent conductive metal material. The first and second common wire shorting bars 243a and 243b are connected to the common wire 247 through the second and third contact holes 242 and 244, and the second and third contact holes 242 and 244 are connected to the source and the second and third contact holes 242 and 244. It is formed by patterning a protective film (not shown) formed on the drain electrode (see 231 and 233 in Fig. 4).

As described above, in the quad type liquid crystal display according to the exemplary embodiment of the present invention, the aperture ratio is increased by sharing two common sub-pixels in one pixel. In addition, the gate wirings positioned between adjacent pixels are disposed to be close to each other, so that gate shorting bars that can check whether the gate wirings are short-circuited are disposed on both sides of the substrate, so that the gate wirings can be efficiently inspected.

The above-described embodiment of the present invention corresponds to an example of the present invention, and can be freely modified. As long as such modifications are included in the spirit of the present invention, it is obvious to those skilled in the art that they fall within the scope of the present invention.

As described above, the present invention has the effect of increasing the aperture ratio of the liquid crystal display by sharing two common upper and lower subpixels in one pixel in a common wiring in a quad type liquid crystal display. In addition, since the gate wirings positioned between adjacent pixels are disposed to be close to each other, the gate shorting bars capable of inspecting whether the gate wirings are short-circuited are disposed on both sides of the substrate, thereby inspecting whether the gate wirings are short-circuited. .

1A and 1B are cross-sectional views showing a general transverse electric field type liquid crystal display device, respectively.

2 is a plan view showing a conventional quad system transverse electric field type liquid crystal display device.

3 is a diagram illustrating a shorting bar structure of a conventional quad transverse type liquid crystal display device.

4 is a plan view illustrating a quad system transverse field type liquid crystal display according to an exemplary embodiment of the present invention.

5 is a diagram illustrating a shorting bar structure of a quad type transverse electric field liquid crystal display according to an exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

215: semiconductor layer 220: gate wiring

221: gate electrode 225: gate pad

227: gate shorting bars 227a and 227b: first and second gate shorting bars

230: data wiring 231: source electrode

233: drain electrode 235: data pad

240: pixel electrodes 242 and 244: second and third contact holes

243: common wiring shorting bar

243a and 243b: common wiring first and second shorting bars

245 common electrode 247 common wiring

249: first contact hole

Claims (12)

A plurality of gates and data wires extending in directions of rows and columns on a substrate including a display area and a non-display area; A switching element located in the display area and connected to the gate line and the data line; A pixel electrode positioned in the display area and connected to the switching element; A common electrode positioned in the display area and formed in parallel with the pixel electrode; A common wiring disposed between the gate wiring of an adjacent odd-numbered row and the gate wiring of an even-numbered row and connected to the common electrode; A first gate shorting bar located in said non-display area and connected to said gate wiring of an odd-numbered row; A second gate shorting bar positioned in the non-display area, the second gate shorting bar connected to the gate wirings of even rows; The first and second gate shorting bars are spaced apart from each other with the display area therebetween. LCD display device. The method of claim 1, And a common wiring shorting bar positioned in the non-display area and connected to the common wiring. The method of claim 2, And the common wiring shorting bar comprises first and second common wiring shorting bars positioned in a direction in which each of the first and second gate wiring shorting bars is positioned. The method of claim 2, The common wiring shorting bar is made of the same material as the pixel electrode. The method of claim 2, And a contact hole connecting the common wiring and the common wiring shorting bar. The method of claim 1, And the common wiring is made of the same material as the gate wiring. A plurality of gate wires extending in a row direction on a substrate including a display area and a non-display area, first and second gate shorting bars connected to the gate wires in the non-display area, and an even number of adjacent odd-numbered gate wires A second wiring disposed between the first gate wiring and a common wiring connected to the common electrode; After forming the gate wirings, forming a plurality of data wirings extending in a column direction and a switching element connected to the gates and data wirings in the display area;  Forming a pixel electrode connected to the switching element in the display area and a common electrode parallel to the pixel electrode; The first gate shorting bar is connected to the gate wiring in an odd-numbered row, the second gate shorting bar is connected to the gate wiring in an even-numbered row, and the first and second gate shorting bars are disposed between the display area. Liquid crystal display device manufacturing method spaced apart from each other. The method of claim 7, wherein And forming a common wiring shorting bar connected to the common wiring in the non-display area in the common electrode forming step. The method of claim 8, The forming of the common wiring shorting bar may include forming first and second common wiring shorting bars positioned in a direction in which each of the first and second gate wiring shorting bars is positioned. The method of claim 8, And the common wiring shorting bar is made of the same material as the pixel electrode. The method of claim 8, And forming a contact hole connecting the common wiring and the common wiring shorting bar. The method of claim 7, wherein And the common wiring is made of the same material as the gate wiring.