KR20050064299A - Electro-luminescence display apparatus and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-luminescence display device capable of facilitating gray scale expression by increasing the current driving range of a data integrated circuit.

An electro-luminescence display device according to the present invention comprises a display panel having pixel cells arranged in a matrix at an intersection between first data lines and gate lines, and supplying a video signal to the first data lines. And a current controller positioned between each of the first data lines and the data driver and formed on the display panel, wherein the current controller is configured to generate a first current corresponding to a video signal supplied from the data driver. A first driving thin film transistor having a first channel width and a second channel width having a channel width less than or equal to the first channel width and corresponding to a first current flowing through the first driving thin film transistor so that an image can be displayed in the pixel cell. And a second driving thin film transistor receiving a second current from the pixel cell.

Description

Electro-Luminescence Display Apparatus and Driving Method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-luminescence display device and a driving method thereof, and more particularly, to an electro-luminescence display device and a method for driving the same, by increasing the current driving range of a data integrated circuit. It is about.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include a liquid crystal display, a field emission display, a plasma display panel, and an electro-luminescence (hereinafter, referred to as "EL"). Display).

Here, the EL display device is a self-luminous device that emits a fluorescent material by recombination of electrons and holes, and is roughly divided into inorganic EL and organic EL according to materials and structures. This EL display device has the advantage of having a fast response speed, such as a cathode ray tube, compared to a passive light emitting device that requires a separate light source like a liquid crystal display device.

1 is a cross-sectional view showing a general organic EL structure for explaining the light emission principle of an EL display device. Among the EL display devices, the organic EL includes an electron injection layer 4, an electron transport layer 6, a light emitting layer 8, a hole transport layer 10, and a hole injection layer 12 stacked between the cathode 2 and the anode 14. It is provided.

When a voltage is applied between the anode 14, which is a transparent electrode, and the cathode 2, which is a metal electrode, electrons generated from the cathode 2 are directed toward the light emitting layer 8 through the electron injection layer 4 and the electron transport layer 6. Move. In addition, holes generated from the anode 14 move toward the light emitting layer 8 through the hole injection layer 12 and the hole transport layer 10. Accordingly, in the light emitting layer 8, light is generated by collision between electrons and holes supplied from the electron transport layer 6 and the hole transport layer 10 and recombination, and the light is externally transmitted through the anode 14 which is a transparent electrode. Is emitted so that the image is displayed.

2 is a diagram showing a conventional Active Matrix Type EL display device.

Referring to FIG. 2, the conventional EL display device includes a data driver 20 for supplying video signals to a plurality of first data lines D, and a current control block 40 connected to each first data line D. FIG. ), J (j is a natural number: j = 3 in FIG. 2) current controllers 26, 28, and 30 included in the current control block 40, and current controllers 26, 28, and 30, respectively. The switching block 32 including the switching elements 34 connected to each other, the second data lines DL connected to each of the switching elements 34, and the direction crossing the second data lines DL. Gate lines GL, pixel cells 22 (hereinafter referred to as " PE ") arranged at each intersection of the second data lines DL and the gate lines GL, and a switching block 32 and a control signal supply unit 24 for supplying control signals CS1, CS2, CS3, CS4 to the current control blocks 40.

The current control block 40, the switching block 32 and the PE cells 22 are formed in the EL display panel 16. Here, the PE cells 22 are formed in the display area of the EL display panel 16 to display a predetermined image. Then, the current control block 40 and the switching block 32 are formed in the non-display area of the EL display panel 16 so as to control a predetermined image to be displayed in the PE cells 22.

The data driver 20 supplies a video signal to i first data lines D (i is a natural number). Here, the data driver 20 sequentially supplies j video signals to each of the first data lines D during a part of one horizontal period. Detailed description thereof will be described later.

The current control block 40 has j current controllers 26, 28, 30. Here, since the current control block 40 is formed for each first data line D, the current controllers 26, 28, and 30 belonging to the same current control block 40 have one first data line D. FIG. Connected with. The current controllers 26, 28, and 30 are j videos supplied from the first data line D in response to the first and third control signals CS1 to CS3 supplied from the control signal supply unit 24. The video signal of any one of the signals is supplied. Here, the current controllers 26, 28, and 30 differ only in the time of the input control signals CS1 to CS3, and have the same configuration and operation process.

The switching block 32 includes a switching element 34 formed between each of the current controllers 26, 28, and 30 and the second data lines DL. The switching element 34 is turned on in response to the fourth control signal CS4 supplied from the control signal supply unit 24.

The gate driver 18 sequentially supplies gate signals to the gate lines GL. Here, the gate signal is supplied to have a width of one horizontal period (1H).

The PE cells 22 correspond to the video signal by emitting light corresponding to the video signal (ie, the current signal) supplied from the current controllers 26, 28, and 30 when the switching element 34 is turned on. Display an image.

To this end, the PE cells 22 and the first current controller 26 are configured as shown in FIG. 3. In FIG. 3, only the configuration of the first current controller 26 is illustrated for convenience of description, but the configuration of the second and third current controllers 28 is the same as that of the first current controller 26.

Each of the PE cells 22 includes a light emitting cell driving circuit 42 for driving the light emitting cell OLED according to a driving signal supplied from each of the second data line DL and the gate lines GL, and a light emitting cell driving circuit. The light emitting cell OLED is connected between the furnace 42 and the ground voltage source GND.

The light emitting cell driving circuit 42 includes a first driving thin film transistor (TFT) T1 connected between the voltage supply line VDD and the light emitting cell OLED, and the gate line GL. ) And the first switching TFT T3 connected between the second data line DL and the first switching TFT T3 and the voltage supply line VDD to connect the first driving TFT T1 and the current mirror. A second driving TFT (T2) forming a circuit, a second switching TFT (T4) connected between the gate line (GL) and the second driving TFT (T2), and first and second driving TFTs (T1, T2); The storage capacitor Cst is connected between the node () and the voltage supply line (VDD). Here, the TFTs are P-type electron metal oxide semiconductor field effect transistors (MOSFETs).

The gate terminal of the first driving TFT T1 is connected to the gate terminal of the second driving TFT T2, and the source terminal is connected to the voltage supply line VDD. The drain terminal of the first driving TFT T1 is connected to the light emitting cell OLED. The source terminal of the second driving TFT T2 is connected to the voltage supply line VDD, and the drain terminal is connected to the drain terminal of the first switching TFT T3 and the source terminal of the second switching TFT T4. The source terminal of the first switching TFT T3 is connected to the second data line DL, and the gate terminal is connected to the gate line GL. The drain terminal of the second switching TFT T4 is connected to the gate terminals of the first and second driving TFTs T1 and T2 and the storage capacitor Cst. The gate terminal of the second switching TFT T4 is connected to the gate electrode line GL.

Here, the first and second driving TFTs T1 and T2 are connected to form a current mirror. Therefore, assuming that the first and second driving TFTs T1 and T2 have the same channel width, the amount of current flowing through the first and second driving TFTs T1 and T2 is set the same.

The first current controller 26 includes a third switching TFT T5 connected between the first data line D and the switching element 34, and a fourth switching TFT T6 connected with the third switching TFT T5. ), A capacitor C connected between the fourth switching TFT T6 and the ground voltage source GND, and a third driving TFT T7 connected between the fourth switching TFT T6 and the ground voltage source GND. It is provided. Here, the TFTs included in the current controller 26 are N-type electron metal oxide semiconductor field effect transistors (MOSFETs).

The source terminal of the third switching TFT T5 is connected to the second data line D, and the drain terminal is connected to the switching element 34. The gate terminal of the third switching TFT T5 is connected to the gate terminal of the fourth switching TFT T6. The source terminal of the fourth switching TFT T6 is connected to the capacitor C, and the drain terminal is connected to the switching element 34. The gate terminal of the third driving TFT T7 is connected to the source terminal of the fourth switching TFT T6, and the drain terminal is connected to the ground voltage source GND. The source terminal of the third driving TFT T7 is connected to the drain terminal of the fourth switching TFT T6.

An operation process of the first current controller 26 and the PE cell 22 will be described in detail with reference to FIGS. 2 to 4. First, the first control signal CS1 is supplied from the control signal supply unit 24 during a part of the horizontal period T1. When the first control signal CS1 is supplied, the third switching TFT T5 and the fourth switching TFT T6 are turned on. When the third switching TFT T5 is turned on, the video signal (current signal DA) supplied from the first data line D1 flows through the third switching TFT T5. At this time, most of the current flowing through the third switching TFT T5 is supplied to the ground voltage source GND via the third driving TFT T7, and at this time, the capacitor C is supplied to the third driving TFT T7. The voltage corresponding to the flowing current is charged. That is, during the period T1, the capacitor of the first current controller 26 is charged with a voltage value corresponding to the video signal (current signal DA).

On the other hand, the second control signal CS2 and the third control signal CS3 are continuously supplied after the first control signal CS. Here, when the second control signal CS2 is supplied, the capacitor C formed in the second current controller 28 is also charged with a voltage value corresponding to the video signal DB. When the third control signal CS3 is supplied, the capacitor C formed in the third current controller 30 is also charged with a voltage value corresponding to the video signal DC. That is, during the period in which the first to third control signals CS1 to CS3 are supplied, the voltage values corresponding to the video signals are charged in the capacitors C of the current control units 26, 28, and 30.

After the first to third control signals CS1 to CS3 are supplied, the fourth control signal CS4 is supplied to all the switching elements 34 included in the switching block 32 from the control signal supply unit 24. Then, the switching elements 34 are turned on. Here, the fourth control signal CS4 has a width T2 equal to or wider than the width T1 of each of the first to third control signals CS1 to CS3.

On the other hand, the gate signal is supplied to the gate line GL for one horizontal period. When the gate signal is supplied, the first and second switching TFTs T3 and T4 are turned on. When the first and second switching TFTs T3 and T4 are turned on and the switching elements 34 are turned on, the gate terminals and the current controller 26 of the first and second driving TFTs T1 and T2 are turned on. Are electrically connected so that the first and second driving TFTs (T1, T2) are turned on.

At this time, the capacitor C included in the current control unit 26 turns on the third driving TFT T7 while limiting the channel width of the third driving TFT T7 so as to correspond to the voltage charged thereto. Then, a predetermined current id from the voltage supply line VDD is supplied to the data electrode line DL via the second driving TFT T2 and the first switching TFT T3. Here, since the first and second driving TFTs T1 and T2 form a current mirror circuit, the same current flows through the first and second driving TFTs T1 and T2. Accordingly, the voltage charged in the capacitor C, that is, the current corresponding to the video signal is supplied from the source terminal of the first driving TFT T1 to the light emitting cell OLED via the drain terminal, thereby allowing the video from the light emitting cell OLED. Light of brightness corresponding to the signal is emitted.

 Meanwhile, the storage capacitor Cst stores the voltage from the voltage supply line VDD so as to correspond to the amount of current id flowing to the second driving TFT T2. The storage capacitor Cst turns on the first driving TFT T1 using a voltage stored therein when the gate signal is turned off so that the first and second switching TFTs T3 and T4 are turned off. By turning on, a current corresponding to the video signal is supplied to the light emitting cell OLED.

That is, conventionally, the light emitting cell OLED is charged by charging a voltage corresponding to a video signal with current control units installed in the EL display panel 16 and supplying a current corresponding to the voltage from the PE cell 22 to the current control units. ), A predetermined image corresponding to the video signal is displayed. However, since the data driver 20 of such a conventional EL display device displays a gray scale using a current, there is a limit to the gray scale that can be expressed.

In detail, as the material of the organic EL is gradually improved, the range of gray scales that can be displayed corresponding to the current is gradually improved. For example, in the past, the data driver 20 may supply a current between 1 mA and 100 mA to display gray scales. However, as the material of the organic EL is gradually improved, in order to express the same gray scale, the data driver 20 must supply a current of between 1 mA and 10 mA (an example). However, the data driver 20 has a limitation in supplying low current because current must be supplied using electronic circuit components. In other words, the data driver 20 needs to supply gradually lower current to express gray scale, but the problem is that the gray scale cannot be represented in the PE cell 22 because the current range that can be actually supplied is limited.

On the other hand, it is possible to adjust the current range flowing by adjusting the channel width of the second driving TFT (T2) included in the light emitting cell driving circuit 42. In other words, by setting the channel width of the first driving TFT T1 and the second driving TFT T2 forming the current mirror large, the current driving range can be improved to some extent. However, since the second driving TFT (T2) formed in the display area must be included in the PE cell 22, the size of the channel width of the second driving TFT (T2) is limited, and thus the current driving range is limited. In addition, the higher the resolution, the smaller the size of the second driving TFT (T2).

Accordingly, an object of the present invention is to provide an electro-luminescence display device and a method of driving the same, which allow easy gray scale expression by increasing the current driving range of a data integrated circuit.

In order to achieve the above object, an electroluminescent display device of the present invention includes a display panel including pixel cells arranged in a matrix at an intersection between first data lines and gate lines, and first data lines. And a current controller positioned between each of the first data lines and the data driver and formed on the display panel, wherein the current controller corresponds to a first signal corresponding to the video signal supplied from the data driver. A first driving thin film transistor having a first channel width as well as a current flows, and a second channel width having a channel width less than or equal to the first channel width, and the first driving thin film transistor to display an image in the pixel cell. And a second driving thin film transistor receiving a second current corresponding to the flowing first current from the pixel cell.

The first channel width is set to a channel width larger than the second channel width.

The first current is a higher current than the second current.

The first driving thin film transistor and the second driving thin film transistor are connected to form a current mirror.

It is installed to be connected between the gate terminal and the base voltage source of the first driving thin film transistor and the second driving thin film transistor to charge the voltage value corresponding to the first current when the first current flows and using the charged voltage value Capacitor for controlling the channel width of the second driving thin film transistor so that the second current flows.

The data driver supplies j (j is a natural number) video signals to the second data line during one horizontal period, and the current controllers are provided for each of the second data lines.

The current control unit is disposed between the second data line and the first driving thin film transistor and turned on by a control signal supplied from the outside, and is installed between the first switching thin film transistor and the capacitor to provide a control signal. And a second switching thin film transistor turned on.

The control signal is sequentially supplied to each of the j current controllers during the one horizontal period so that the j video signals can be charged to the capacitors of the current controllers during the one horizontal period.

The current controller is located in the non-display area of the display panel.

According to an embodiment of the present invention, a method of driving an electro-luminescence display device includes supplying a video signal to a current control unit installed in a display panel, and a first current corresponding to the video signal is supplied to the first driving thin film transistor included in the current control unit. And flowing a second current equal to or lower than the first current through the second driving thin film transistor included in the current control unit and formed to form a current mirror with the first driving thin film transistor.

The second current is supplied to the base potential from the pixel cell via the second driving thin film transistor, and the gray level image corresponding to the second current is displayed in the pixel cell.

The channel width of the first driving thin film transistor is equal to or larger than the channel width of the second driving thin film transistor.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIG. 5.

5 is a circuit diagram illustrating a current controller and a pixel cell according to an exemplary embodiment of the present invention. Here, since the block of the EL display device of the present invention is the same as that of FIG. 2, it will be described with reference to FIG.

The PE cells 52 arranged in a matrix type display an image by emitting predetermined light under the control of the current controller 50. To this end, each of the PE cells 52 includes a light emitting cell driving circuit 56 for driving the light emitting cell OLED according to a driving signal supplied from each of the second data line DL and the gate lines GL, The light emitting cell OLED is connected between the light emitting cell driving circuit 56 and the ground voltage source GND.

The light emitting cell driving circuit 56 is connected between the first driving TFT T1 connected between the voltage supply line VDD and the light emitting cell OLED, and is connected between the gate line GL and the second data line DL. A second driving TFT (T2) connected between the first switching TFT (T3), the first switching TFT (T3), and the voltage supply line (VDD) to form a first mirror TFT (T1) and a current mirror circuit; Between the second switching TFT T4 connected between the gate line GL and the second driving TFT T2, and between the node between the first and second driving TFTs T1 and T2 and the voltage supply line VDD. The storage capacitor Cst is connected. Here, the TFTs are P-type electron metal oxide semiconductor field effect transistors (MOSFETs). The TFTs may be formed of an N-type electron metal oxide semiconductor field effect transistor (MOSFET).

The gate terminal of the first driving TFT T1 is connected to the gate terminal of the second driving TFT T2, and the source terminal is connected to the voltage supply line VDD. The drain terminal of the first driving TFT T1 is connected to the light emitting cell OLED. The source terminal of the second driving TFT T2 is connected to the voltage supply line VDD, and the drain terminal is connected to the drain terminal of the first switching TFT T3 and the source terminal of the second switching TFT T4. The source terminal of the first switching TFT T3 is connected to the second data line DL, and the gate terminal is connected to the gate line GL. The drain terminal of the second switching TFT T4 is connected to the gate terminals of the first and second driving TFTs T1 and T2 and the storage capacitor Cst. The gate terminal of the second switching TFT T4 is connected to the gate electrode line GL.

Here, the first and second driving TFTs T1 and T2 are connected to form a current mirror. Therefore, assuming that the first and second driving TFTs T1 and T2 have the same channel width, the amount of current flowing through the first and second driving TFTs T1 and T2 is set the same. The operation of the light emitting cell driving circuit 56 will be described later.

The current controller 50 includes j (j is a natural number, for example, j = 3) in the current control block 40. In other words, among the j video signals supplied through the first data line D for one horizontal period (1H), j current controllers 50 are provided in each of the first data line D. The voltage value corresponding to any one video signal is charged. Each of the current controllers 50 is connected to the second data line DL via the switching element 54, respectively. Therefore, in the present invention, the j second data lines DL may be driven by one first data line D. FIG.

The current controller 50 includes a third switching TFT T5 connected to the first data line D and the control line 58, and a third switching TFT T5 and a control line 58 connected to the third switching TFT T5. 4 switching TFT (T6), the third driving TFT (T7) connected between the third switching TFT (T5) and the ground voltage source (GND), and the connection between the second data line (DL) and the ground voltage source (GND) In addition, between the third driving TFT (T7) and the fourth driving TFT (T8) forming the current mirror, and between the gate terminal and the ground voltage source (GND) of the third driving TFT (T7) and the fourth driving TFT (T8) Capacitor C is formed. Here, the TFTs included in the current controller 26 are set to an N-type electron metal oxide semiconductor field effect transistor (MOSFET). However, in the present invention, the TFTs may be formed of a P type electron metal oxide semiconductor field effect transistor (MOSFET).

On the other hand, the channel size of the third driving TFT T7 forming the current mirror is set to be equal to or larger than the channel size of the fourth driving TFT T8. For example, the channel of the third driving TFT (T7) may be formed 10 times larger than the channel of the fourth driving TFT (T8). Then, a current corresponding to 1/10 of the current value flowing through the third driving TFT T7 flows through the fourth driving TFT T8. That is, in the present invention, the current driving range of the data driver 20 can be improved by setting the channel size of the third driving TFT T7 to be equal to or larger than the channel (preferably large).

In detail, in the present invention, the data driver 20 supplies the current controller 50 with a current value having a wide range corresponding to the gray scale regardless of the material characteristics of the organic EL. Here, a current corresponding to the video signal supplied from the data driver 20 flows through the third driving TFT T7. At this time, if the channel width of the fourth driving TFT (T8) forming the current mirror with the third driving TFT (T7) is smaller than the third driving TFT (T7), the third driving TFT (T8) is provided in the fourth driving TFT (T8). A current lower than the current flowing in T7) flows. That is, in the present invention, since the current value supplied to the light emitting cell OLED can be adjusted by adjusting the channel ratio of the third driving TFT T7 and the fourth driving TFT T8, the data driver 20 has a wide range. The current value can be supplied. A detailed operation process thereof will be described later.

The source terminal of the third switching TFT T5 is connected to the first data line D, and the drain terminal is connected to the source terminal of the third driving TFT T7. The gate terminal of the third switching TFT T5 is connected to the control line 58. The source terminal of the fourth switching TFT T6 is connected to the drain terminal of the third switching TFT T5, and the drain terminal is connected to the capacitor C. FIG. The gate terminal of the fourth switching TFT T6 is connected to the control line 58. The drain terminal of the third driving TFT T7 is connected to the ground voltage source GND, and the gate terminal is connected to the gate terminal of the fourth driving TFT T8. The source terminal of the fourth driving TFT T8 is connected to the data line DL, and the drain terminal is connected to the ground voltage source GND.

Referring to the operation of the current control unit 50, first, j (assuming j = 3), that is, three control signals CS1 to CS3, as shown in FIG. 4 during a part of one horizontal period from the control control supply unit 24. FIG. Are supplied sequentially. In other words, any one of the first to third control signals CS1 to CS3 is supplied to the three current controllers 50 included in the current control block 40. Three video signals DA, DB, and DC are sequentially supplied to the first data line D so as to be synchronized with each of the control signals CS1 to CS3.

When the control signal CS is supplied to the control line 58, the third and fourth switching TFTs T5 and T6 are turned on. When the third and fourth switching TFTs T5 and T6 are turned on, the video signal (i.e., current value) supplied to the data line D is transferred to the base voltage source GND via the third driving TFT T7. Supplied. At this time, the capacitor C is charged with a voltage corresponding to the current flowing through the third driving TFT T7. In fact, when the first to third control signals CS1 to CS3 are supplied, voltage values corresponding to the video signals DA, DB, and DC are charged in each of the capacitors C of the three current controllers 50.

After the voltage values corresponding to the video signals are charged in the three current controllers 50, the switching element 54 is turned on by the fourth control signal CS4 supplied from the control signal supply unit 24.

On the other hand, the gate signal is supplied to the gate line GL for one horizontal period. When the gate signal is supplied, the first and second switching TFTs T3 and T4 are turned on. When the first and second switching TFTs T3 and T4 are turned on and the switching elements 34 are turned on, the gate terminals and the current controller 26 of the first and second driving TFTs T1 and T2 are turned on. Are electrically connected so that the first and second driving TFTs (T1, T2) are turned on.

At this time, the capacitor C included in the current control unit 26 turns on the fourth driving TFT T8 while limiting the channel width of the fourth driving TFT T8 so as to correspond to the voltage charged thereto. At this time, since the channel size of the fourth driving TFT T8 is set to be less than or equal to the third driving TFT T7 channel, it is turned on so that a current corresponding to the channel ratio flows. Then, the predetermined current id from the voltage supply line VDD is supplied to the data line DL via the second driving TFT T2 and the first switching TFT T3. Here, since the first and second driving TFTs T1 and T2 form a current mirror circuit, the same current flows through the first and second driving TFTs T1 and T2. Accordingly, the voltage charged in the capacitor C, that is, the current corresponding to the video signal is supplied from the source terminal of the first driving TFT T1 to the light emitting cell OLED via the drain terminal, thereby allowing the video from the light emitting cell OLED. Light of brightness corresponding to the signal is emitted.

 Meanwhile, the storage capacitor Cst stores the voltage from the voltage supply line VDD so as to correspond to the amount of current id flowing to the second driving TFT T2. The storage capacitor Cst turns on the first driving TFT T1 using a voltage stored therein when the gate signal is turned off so that the first and second switching TFTs T3 and T4 are turned off. By turning on, a current corresponding to the video signal is supplied to the light emitting cell OLED.

As described above, according to the electro-luminescence display device and the driving method thereof according to the present invention, the current control unit is configured in the form of a current mirror, and the channel width of the first driving thin film transistor supplied with the current from the data driver is the pixel cell. The channel width of the second driving thin film transistor supplied with current from the transistor is set to be equal to or greater than. In this way, therefore, even if the data driver supplies a current having a wide driving range, the current flowing from the pixel cell is set low. That is, in the present invention, the data driver can supply a wide range of currents, and accordingly, sufficient gradation can be expressed.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a cross-sectional view showing an organic light emitting cell of a general electroluminescent display panel.

2 shows a conventional electro-luminescence display.

3 is a circuit diagram illustrating a pixel cell and a current controller shown in FIG. 2.

4 is a waveform diagram illustrating a control signal supplied from the control signal supply unit shown in FIG. 2.

5 is a circuit diagram illustrating a current control unit and a pixel cell according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

2: cathode 4: electron injection layer

6: electron transport layer 8: light emitting layer

10 hole transport layer 12 hole injection layer

14 anode 16 EL display panel

18: gate driver 20: data driver

22,52: pixel cell 24: control signal supply unit

26, 28, 30, 50: current controller 32: switching block

34,54: switching element 40: current control block

42,56: light emitting cell driving circuit 58: control Raan

Claims (12)

A display panel including pixel cells arranged in a matrix at an intersection between the first data lines and the gate lines; A data driver for supplying a video signal to the first data lines; A current controller disposed between each of the first data lines and the data driver and formed in the display panel; The current control unit A first driving thin film transistor having a first channel width and a first current corresponding to the video signal supplied from the data driver; A second current corresponding to a first current flowing through the first driving thin film transistor so as to display an image in the pixel cell while having a second channel width equal to or less than the first channel width, from the pixel cell; An electroluminescent display device comprising a second driving thin film transistor supplied. The method of claim 1, And the first channel width is set to a channel width larger than the second channel width. The method of claim 2, And the first current is a higher current than the second current. The method of claim 1, And the first driving thin film transistor and the second driving thin film transistor are connected to form a current mirror. The method of claim 4, wherein The first and second driving thin film transistors are installed to be connected between the gate terminal and the ground voltage source of the second driving thin film transistor, and when the first current flows and charges a voltage value corresponding to the first current and the charged voltage. And a capacitor for controlling a channel width of the second driving thin film transistor so that the second current flows using a value. The method of claim 5, The data driver supplies j (j is a natural number) of the video signals to a second data line for one horizontal period, and the current controller is provided with j of each of the second data lines. Ness display. The method of claim 6, The current control unit A first switching thin film transistor disposed between the second data line and the first driving thin film transistor and turned on by a control signal supplied from the outside; And a second switching thin film transistor disposed between the first switching thin film transistor and the capacitor, the second switching thin film transistor being turned on by the control signal. The method of claim 7, wherein And the control signal is sequentially supplied to each of the j current controllers for one horizontal period so that the j video signals can be charged to the capacitors of the current controllers for one horizontal period. . The method of claim 1, And the current controller is positioned in a non-display area of the display panel. A driving method of an electro-luminescence display device comprising pixel cells arranged in a matrix form on a display panel, Supplying a video signal to a current control unit provided in the display panel; Flowing a first current corresponding to the video signal through a first driving thin film transistor included in the current control unit; Electro-luminescence is included in the current control unit and a second current flowing in the second driving thin film transistor formed to form a current mirror with the first driving thin film transistor is equal to or lower than the first current. Method of driving display device. The method of claim 10, The second current is supplied to the base potential from the pixel cell via the second driving thin film transistor, and the pixel cell displays an image of a gray level corresponding to the second current. Method of driving display device. The method of claim 10, And a channel width of the first driving thin film transistor is equal to or larger than a channel width of the second driving thin film transistor.