KR20050062272A - Liquid crystal display panel - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel, wherein the liquid crystal display panel of the present invention is first and second substrates bonded to each other such that a constant cell gap is maintained, and a first region and a first substrate that separate the first substrate. And a plurality of test patterns formed in the second area to measure the wire resistance through the test pattern before actually forming the line-on-glass wiring to remove the redesigned line-on-glass wiring. By forming in one area, the defective rate of the liquid crystal display device can be reduced, and it is not necessary to form a test pad in TCP, so that the TCP area can be optimized.

Description

Liquid Crystal Display Panel {LIQUID CRYSTAL DISPLAY PANEL}

The present invention relates to a liquid crystal display panel, and more particularly, to a liquid crystal display panel in which a test pattern for measuring wiring resistance of line-on-glass wiring is formed.

In general, a liquid crystal display includes a thin film transistor array substrate and a color filter substrate facing each other so that a constant cell-gal is maintained. The liquid crystal display panel includes a liquid crystal layer in a cell gap between the thin film transistor array substrate and the color filter substrate, and a driving circuit for driving the liquid crystal display panel.

In the thin film transistor array substrate, a plurality of gate lines arranged at regular intervals in the lateral direction and a plurality of data lines arranged at regular intervals in the longitudinal direction cross each other, and the data lines and the gate lines intersect and partition each other. Are provided with a plurality of pixels. The pixels are arranged in a matrix, and each pixel is individually provided with a pixel electrode.

In addition, a color filter layer of red, green, and blue is formed at a position corresponding to the pixels on the color filter substrate, and a black matrix for preventing color interference of light passing through the color filter layer has the color. The common electrode is formed in a net shape surrounding the filter layer, and applies an electric field to the liquid crystal layer together with the pixel electrode of the thin film transistor array substrate.

A pixel electrode and a common electrode are provided on an inner surface of the thin film transistor array substrate and the color filter substrate facing each other, and the liquid crystal is driven by a voltage difference between the pixel electrode and the common electrode, and the size of image information applied to the pixels. Accordingly, the luminance of the image displayed on the liquid crystal display panel is changed.

Switching elements such as thin film transistors are individually connected to the pixels, and the switching elements are electrically connected to pixel electrodes provided in the pixels to receive image information through the data lines, and to receive the image information. It is applied to the pixel electrode. Accordingly, a voltage difference is generated between the pixel electrode to which the image information is applied and the common electrode to which the common voltage is applied, thereby driving the liquid crystal.

The driving circuit may include a gate driving circuit sequentially applying a scanning signal to the gate lines every frame to the liquid crystal display panel, and image information through the data lines corresponding to the scanning signal of the gate driving circuit. A data driver circuit applied to the pixel, a timing controller for controlling the data driver circuit and the gate driver circuit, and a power supply unit for supplying various driving voltages used in the liquid crystal display device.

The gate driving circuit sequentially applies a scan signal to the gate lines every frame unit. At this time, the switching elements in which the gate electrode is electrically connected to the gate line to which the scan signal is applied are turned on, and the image information supplied from the data driving circuit to the data lines is a scan signal. Is applied to the pixel via the switching element turned on. Accordingly, the liquid crystal display displays an image by controlling the light transmittance by driving the liquid crystal by an electric field applied between the pixel electrode and the common electrode.

In general, a method of connecting the driving circuit to a liquid crystal display panel includes a tap automated bonding (TAB) method and a chip-on-glass (COG) method. The tap method is made of a polymer material. A method of connecting the drive circuit to the liquid crystal display panel by connecting a tape carrier package (TCP) mounted on a thin flexible film to the liquid crystal display panel, the chip-on-glass method The driving circuit is directly mounted on the glass substrate of the liquid crystal display panel and connected thereto.

In the tap method, since the area of the thin film transistor array substrate is larger than that of the color filter substrate, a part of the thin film transistor array substrate is exposed to the outside when the two substrates are bonded together, and the TCP is attached to the exposed area. Here, the driving circuits mounted on the TCP are supplied with control signals and voltages input from the outside through wires mounted on a printed circuit board (PCB) connected to the TCP.

Recently, in the case of a tab type, a liquid crystal display panel in which a gate printed circuit board is removed is frequently used. A tab type liquid crystal display panel in which such a gate printed circuit board is removed will be described in detail with reference to the accompanying drawings. As follows.

1 is a plan view briefly illustrating a general tab type liquid crystal display.

Referring to FIG. 1, a liquid crystal display device includes a liquid crystal display panel 1 in which a thin film transistor array substrate 2 and a color filter substrate 4 are bonded together, the liquid crystal display panel 1, and a data printed circuit board 12. A plurality of data TCPs 8 connected to the plurality of gates, a plurality of gate TCPs 14 connected to the liquid crystal display panel 1, and a data driving circuit 10 mounted separately on the data TCPs 8; And the gate driving circuits 16 mounted separately on the gate TCPs 14, respectively.

The liquid crystal display panel 1 is provided with an image display area 21 for displaying images by arranging pixels defined by crossing gate lines 18 and data lines 20 in a matrix form.

In the liquid crystal display panel 1, when the thin film transistor array substrate 2 having a relatively larger area than the color filter substrate 4 is bonded to the color filter substrate 4, a part of the substrate is exposed to the outside. One side and one side of the thin film transistor array substrate are called pads. As shown in the drawing, a gate TCP 14 and a data TCP 8 are connected to the pad portion.

A data driving circuit 10 is mounted on the data TCP 8, and TCP input lines 24 and TCP output lines 25 electrically connected to the data driving circuit 10 are formed. At this time, the TCP input lines 24 of the data TCP 10 are electrically connected to the output lines (not shown) of the data printed circuit board 12 and the TCP output lines 25 of the data TCP 10. ) Are electrically connected to the link lines 23 of the pad portion. In particular, the first data TCP 8 is further provided with TCP supply lines 22 electrically connected to the line-on-glass wirings 26 on the thin film transistor array substrate 2. . The TCP supply line 22 applies gate driving signals of the time control unit and the power supply unit applied through the data printed circuit board 12 to the line-on-glass wiring 26.

The data driving circuits 10 convert the image information applied in a digital form into image information in an analog form and apply it to the data lines 18 on the liquid crystal display panel 1.

A gate driving circuit 16 is mounted on the gate TCP 14, and the gate driving circuit 16 is electrically connected to the TCP supply lines 28 and the TCP output lines 30. The gate driving circuit 16 receives various control signals through the TCP supply line 28 and applies output signals to the TCP output line 30. That is, the gate driving circuit 16 sequentially applies a scan signal to the gate lines 20 in response to the input control signals. At this time, the low potential scan signal Vgl is supplied to the gate lines 20 in the period except for the period during which the high potential scan signal Vgh is supplied.

The line-on-glass wirings 26 are typically, such as a high potential scan signal Vgh, a low potential scan signal Vgl, a common voltage signal Vcom, a ground signal GND, and a power supply voltage signal Vcc. Voltage signals supplied from the power supply unit, such as a gate start pulse (GSP), a gate shift clock signal (GSC), a gate enable signal (gate output enable (GOE)), and a time control unit. Apply gate control signals. The line-on-glass wirings 26 are formed in a fine pattern in a limited space such as a pad portion.

As described above, the line-on-glass wiring 26 and the TCP supply lines 22 and 28 are electrically connected, and various control signals and voltage signals applied from the data printed circuit board 12 are lines. It is sequentially applied to the respective gate TCPs 14 through the on-glass wiring 26 and the TCP supply line 28.

However, since the resistance value of the line-on-glass wiring 26 is proportional to the line length, the resistance value of the line-on-glass 26 increases as the distance from the data printed circuit board 12 increases. Control signals and voltage signals are attenuated. This is because all the gate TCPs 14 receive control signals and voltage signals through one line-on-glass wiring 26. The control signals and the voltage signals supplied through the line-on-glass wiring 26 are distorted by the line resistance, thereby degrading the quality of the image displayed on the image display unit 21.

Therefore, by measuring the resistance of the line-on-glass wiring as described above during the manufacturing process of the liquid crystal display device, to determine whether the resistance is defective, it is possible to lower the defective rate of the liquid crystal display device completed by the method such as discarding the liquid crystal display panel. do.

Two methods are usually used to check the wiring resistance. The first is to measure the resistance through a test pad, and the second is to use a test equipment such as a probe station.

The wiring resistance measuring method as described above will be described in detail with reference to the accompanying drawings.

Figure 2a is a view showing a portion of the pad portion of the liquid crystal display panel to explain the line-on-glass wiring resistance measurement using a conventional test pad, Figure 2b is a line-on-glass wiring resistance using a conventional probe-station It is a figure which shows the pad part of a liquid crystal display panel in order to demonstrate a measurement.

In general, in order to manufacture a liquid crystal display, first, two large-area substrates facing each other are bonded to each other with a constant cell-gap, and a large area in which a liquid crystal layer is filled in the cell-gap between the two substrates. A liquid crystal display panel is manufactured. The large area liquid crystal display panel is cut into a plurality of unit liquid crystal display panels. Here, the two substrates bonded to each other are a thin film transistor array substrate and a color filter substrate. There is a dummy area of a predetermined area which is not actually used outside the thin film transistor array substrate of the unit liquid crystal display panel. When cutting a large area liquid crystal display panel to form a plurality of unit liquid crystal display panels, there is a sufficient margin. Because it cuts.

As described above, after the plurality of liquid crystal display panels are separated from the large-area substrate, the dummy region outside the thin film transistor array substrate is processed to form a pad portion to which TCP is attached or a driving circuit is directly mounted.

As shown in FIG. 2A, the pad part is patterned with line-on-glass wiring 126 to which various control signals and driving voltages are applied, and further, TCP having a signal line pattern formed on the back surface of the film is provided on the pad part. The signal line 128 of the TCP and the line-on-glass wiring 126 are in electrical contact with each other in a one-to-one correspondence. At this time, the TCP signal line 128 is formed such that the test pad 114 electrically contacted through a contact hole has a predetermined area. As such, since the test pad 114 occupies a certain area on the TCP, it is virtually impossible to form the test pad 114 individually on every line that supplies a control signal and a driving voltage on the TCP. Therefore, the test pads 114 are formed only in a few TCP signal lines 128. In addition, since the area for forming the test pads 114 must be secured, the area of TCP can be increased.

The increase in the TCP area as described above causes an increase in the production cost in the mass-produced liquid crystal display device.

Referring to FIG. 2B, only the line-on-glass wiring is patterned before TCP is attached to a part of the illustrated pad part. A portion of the line-on-glass wiring has a portion in which a metal pattern for contacting and electrically contacting the TCP is exposed. Probe pins of the probe station equipment are connected to both ends of the exposed metal pattern. Contact to measure the resistance of the line-on-glass wiring.

However, since the line-on-glass wirings connected to the gate TCP are actually formed to have a small width of several micrometers, the resistance value may be different depending on the position where the probe pin contacts the line-on-glass wiring. In addition, the error can be caused by the resistance value of the long and thin probe pin.

In addition, the resistance measurement method through the test pad or the probe station as described above is performed after the line-on-glass wiring is patterned on the pad portion or after the TCP is electrically contacted with the line-on-glass wiring. In other words, since the wiring resistance is measured in a state where the process has been progressed to some extent, even if a wiring resistance defect is found, it is difficult to redesign, and thus, only a passive response such as stopping the process to be performed and discarding the liquid crystal display panel can be performed.

Accordingly, an object of the present invention is to solve the conventional problems as described above, and an object of the present invention is to pattern a line-on-glass wiring for a test in a dummy region of a liquid crystal display panel, thereby actually forming a line- The on-glass wiring resistance can be accurately measured in advance, and after the resistance measurement, an active response can be made to the resistance failure by redesign, etc. to provide a test pattern that can reduce the defective rate of the liquid crystal display device.

In order to achieve the object of the present invention as described above, a liquid crystal display panel includes a first substrate and a second substrate bonded to each other so that a constant cell gap is maintained, and a first region and a second substrate provided on the first substrate. A region, a plurality of line-on-glass wirings formed in the second region, and conductive pads formed at both ends of the line-on-glass wirings.

As described above, the present invention is to form a test pattern for measuring line-on-glass wiring resistance in a dummy area provided on the outer side of a unit liquid crystal display panel cut from a large area substrate. It is formed before line-on-glass wiring patterning and TCP is attached to it, and accurately measures the line-on-glass wiring resistance in advance, so that in case of poor wiring resistance, the line-on-glass wiring can be formed on the liquid crystal display panel. The defect rate of the liquid crystal display device can be reduced. In addition, since it is not necessary to form a test pad on TCP as in the prior art, the TCP area can be optimized.

A unit liquid crystal display panel in which such a test pattern is formed will be described with reference to the accompanying drawings.

3 is a schematic view of a unit liquid crystal display panel cut from a large area substrate.

Referring to FIG. 3, the liquid crystal display panel 301 includes a first substrate 302 and a second substrate 304.

The first substrate 302 and the second substrate 304 are bonded to each other to maintain a constant cell gap, and a liquid crystal layer is formed in the cell gap between the two substrates. The first substrate 302 is divided into a first region 351 in which a pad portion is to be formed, and a second region 352 to be cut and removed before TCP is attached to the first region 351. In this case, the first area 351 and the second area 352 are divided based on the dotted line shown in the drawing.

The second region 352 is a dummy region which is provided in the outer region of the pad portion to which the TCP or the driving circuit is attached and is not actually used. As shown in FIG. 4, the second region 352 has a line-on-glass. A test pattern 460 for measuring wiring resistance is formed.

4 illustrates a part of a dummy region of a liquid crystal display panel in which a test pattern is formed according to the present invention.

As described above in FIG. 3, the first substrate 302 is divided into a first region 351 and a second region 352.

Referring to FIG. 4, the first substrate 402 includes a first region 451 and a second region 452. The second region 452 is a region to be removed before the TCP is attached to the pad portion in the manufacturing process of the liquid crystal display, and the second region 452 is a resistance measurement of line-on-glass wiring to be actually formed in the pad portion. Can be used for That is, before the plurality of line-on-glass wirings are actually formed in the first region 451, the same pattern as the line-on-glass wiring is formed in the second region 452 to make the same electrical characteristics. . Since the first region 451 and the second region 452 are provided on the same substrate, line-on-glass wiring to be formed in the first region 451 is formed in the second region 452. If formed to the same size, the same electrical properties are shown.

As shown, a plurality of line-on-glass patterns 486 is formed in the second region 452. In addition, test pads 460 are formed at both ends of the line-on-glass pattern 486 to have a constant area to facilitate resistance measurement. As such, the resistance of the line-on-glass pattern 460 may be measured through the test pads 460 at both ends of the test pattern 455 formed in the second region 452.

When the resistance of the line-on-glass pattern 460 becomes poor when the resistance is measured, the line-on-glass pattern 460 is redesigned to be line-on again on the second region 452. By repeating the process of forming and measuring the glass pattern 460, the resistance failure can be solved. In this case, the redesigned line-on-glass pattern 460 is re-lined in the first region 451. -Formed with glass wiring.

As described above, the wiring resistance is measured in advance through the test pattern 455 formed in the second region 452 before the line-on-glass wiring is actually formed in the first region 451 during the process of the liquid crystal display. According to the redesign, the line-on-glass wiring having improved resistance defects can be formed in the first region 451, thereby reducing the defective rate of the liquid crystal display.

And since there is no need to form the test pad conventionally formed on TCP, it can manufacture by optimizing TCP area.

As described above, the liquid crystal display panel of the present invention utilizes the dummy region of the liquid crystal display panel to be removed during the process, measures resistance in advance through a test pattern formed in the dummy region, and redesigns the line-on-glass wiring. By forming in the pad part, the defective rate of a liquid crystal display device can be reduced and a yield can be improved.

In addition, since it is not necessary to form a test pad on the TCP as in the related art, it is possible to optimize the area of the TCP to be manufactured, thereby reducing the production cost.

1 is a plan view briefly showing a general tab type liquid crystal display;

2A is a view showing a part of a pad portion of a liquid crystal display panel to explain line-on-glass wiring resistance measurement using a conventional test pad.

Fig. 2B is a view showing a pad portion of a liquid crystal display panel for explaining line-on-glass wiring resistance measurement using a conventional probe-station.

3 is a simplified view of a unit liquid crystal display panel cut from a large area substrate.

4 is a view showing a part of a dummy region of a liquid crystal display panel in which a test pattern is formed according to the present invention.

** Description of the symbols for the main parts of the drawings **

451: first region 452: second region

455: test pattern 460: test pad

486: line-on-glass pattern

Claims (6)

A first substrate and a second substrate which are bonded to face each other so that a constant cell gap is maintained; A first region and a second region that divide the first substrate; And And a plurality of test patterns formed in the second region. The liquid crystal display panel of claim 1, wherein the first region of the first substrate is a region in which a plurality of line-on-glass wirings are formed. The liquid crystal display panel of claim 1, wherein the second region of the first substrate is a dummy region to be cut and removed during the process. The method of claim 1, wherein the test pattern comprises: a line-on-glass pattern; And a test pad formed at both ends of the line-on-glass pattern. The liquid crystal display panel of claim 1, wherein the line-on-glass pattern of the test pattern formed in the second region is formed in the first region by line-on-glass wiring. The liquid crystal display panel of claim 4, wherein the test pattern has a predetermined area.