KR20050022542A - Driving apparatus of plasma display panel - Google Patents

Abstract

PURPOSE: An apparatus for driving a plasma display panel is provided to prevent the switching loss of the switching device by connecting impedance device to reduce the slope of the displacement current on the path of the displacement current. CONSTITUTION: An apparatus for driving a plasma display panel includes an address driving circuit(220). The address circuit is divided into a charge and discharge circuit(222) and a clamping circuit(224). The charge and discharge circuit is resonated by using the half voltage(VA/2) of the address voltage. The clamping circuit performs the clamping when the address voltage of the panel is risen. The panel capacitor(Cp) is connected with the contacts between the inductor(L3), the switching devices(Aa,Ag) and the ground.

Description

Driving device of plasma display panel {DRIVING APPARATUS OF PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus for a plasma display panel (PDP), and more particularly to an address driving circuit for applying an addressing voltage.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel have been actively developed. Among these flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Therefore, the plasma display panel is in the spotlight as a display device to replace a conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display panel is classified into a direct current type and an alternating current type according to a shape of a driving voltage waveform applied and a structure of a discharge cell.

In the DC plasma display panel, the discharge space of the electrode is exposed without being insulated, so that the current flows in the discharge space while the voltage is applied, and there is a disadvantage in that a resistance for limiting the current must be made. On the other hand, in the AC plasma display panel, since the electrode covers the dielectric layer, the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

In such an AC plasma display panel, scan electrodes and sustain electrodes parallel to each other are formed on one surface thereof, and address electrodes are formed on the other surface in a direction orthogonal to these electrodes. The sustain electrode is formed corresponding to each scan electrode, and one end thereof is connected in common to each other.

In general, the driving method of the AC plasma display panel includes a reset period, an addressing period, a sustain period, and an erase period.

The reset period is a period of initializing the state of each cell in order to perform an addressing operation smoothly on the cell. The addressing period is an address voltage for a cell (addressed cell) turned on to select a cell that is turned on and a cell that is not turned on in a panel. It is a period of time to perform the operation of accumulating wall charge by applying a. The sustain period is a period in which discharge for actually displaying an image is performed on the addressed cell by applying a sustain discharge voltage pulse, and the erase period is a period in which the wall discharge of the cell is reduced to end the sustain discharge.

At this time, since the discharge space between the scan electrode and the sustain electrode, the surface where the address electrode is formed, and the surface where the scan and sustain electrode are formed acts as a capacitive load (hereinafter referred to as a panel capacitor), capacitance exists in the panel. Therefore, in order to apply the waveform for addressing, reactive power is required in addition to the power for addressing. Therefore, the address driving circuit of the plasma display panel generally includes a power recovery circuit that recovers and reuses reactive power. As such a power recovery circuit, L.F. There is a circuit proposed by Weber (US Pat. Nos. 4,866,349 and 5,081,400).

1 is a conventional technique of L.F. It is a figure which shows the address power recovery circuit proposed by Weber. The conventional address power recovery circuit as shown in FIG. 1 operates in a four-stage mode, in which the switching element Ar is turned on and the switching elements Af, Aa and Ag are turned off. ) Is turned on and the second mode in which the switching elements Af and Ag are turned off, the third mode in which the switching element Af is turned on and the switching elements Ar, Aa and Ag are turned off, and the switching elements Af and Ag ) Is turned on and the switching elements Ar and Aa are turned off. This mode of addressing is performed in the mode operation of the four-stage mode, and since the voltage applied to the device changes suddenly at the start of the first mode and the third mode operation, a sudden current flows through the parasitic capacitors Cpar1 and Cpar2 so that the switching element (Ar The switching loss of (Af) is severe.

That is, in the first mode operation, when the switching element Ar is turned on and the remaining switching elements Af, Aa, and Ag are turned off as shown in FIG. 1, the capacitor Cr, the switching element Ar, and the diode ( D1) and a current path is formed through the inductor L1 to the panel capacitor Cp to generate LC resonance. In this case, immediately before the first mode is operated, the potentials of the contacts of the diodes D1 and D2 are in a ground state. In the first mode of operation, the potentials of the contacts of the diodes D1 and D2 are changed to VA / 2. The voltage is rapidly changed in the device Af and the diode Dc2. In addition, as shown in FIG. 1, parasitic capacitors Cpar1 and Cpar2 respectively present in the switching element Af and the diode Dc2 exist. In the first mode operation as described above, the switching element Af and the diode Dc2 Since the voltage applied is drastically changed, displacement currents such as Ip1 and Ip2 flow to cause a switching loss in the switching element Ar. FIG. 2 is a diagram illustrating equivalent parasitic capacitances and displacement currents at the start of the first mode operation.

In operation of the third mode, the voltage applied to the switching element Ar and the diode Dc1 changes rapidly, as opposed to the operation of the first mode, thereby causing a problem in that switching loss occurs in the switching element Af.

As described above, in the conventional address driving circuit, a switching loss occurs in the switching elements Ar and Af. Furthermore, the address driving circuit has a large amount of switching compared with the sustain driving circuit. It is very large and consumes a lot of power.

The technical problem to be achieved by the present invention is to solve the problems of the prior art, the problem of switching loss due to the sudden change in the voltage applied to the device during the switching operation and the generation of the displacement current, the displacement current in the path of the displacement current It is to provide a method of reducing switching loss by placing a device to reduce the slope of the.

Driving apparatus for a plasma display according to an aspect of the present invention for achieving the above object is

A driving apparatus of a plasma display panel for driving a plasma display panel including a panel capacitor formed between a first electrode and a second electrode,

An inductor having a first end electrically connected to the first end of the panel capacitor;

A first switch electrically connected between a first end of the inductor and a first power supply for supplying a first voltage;

A second switch electrically connected between a first end of the inductor and a second power supply for supplying a second voltage;

A first impedance element and a second impedance element each having a first end electrically connected to a second end of the inductor;

A third switch electrically connected to a second end of the first impedance element and switching a path for charging the panel capacitor; And

And a fourth switch electrically connected to a second end of the second impedance element and switching a path for discharging the panel capacitor.

In addition, the driving device of the plasma display panel may be an address driving device.

In this case, the first impedance element and the second impedance element are generated when the panel capacitor is charged or discharged by the turn-on of the third switch or the turn-on of the fourth switching and by the resonance of the inductor and the panel capacitor. It is characterized by reducing the displacement current.

A driving apparatus of a plasma display panel according to another aspect of the present invention is

A driving apparatus of a plasma display panel for driving a plasma display panel including a panel capacitor formed between a first electrode and a second electrode,

An inductor having a first end electrically connected to the first end of the panel capacitor;

A first switch electrically connected between a first end of the inductor and a first power supply for supplying a first voltage;

A second switch electrically connected between a first end of the inductor and a second power supply for supplying a second voltage;

A first impedance element electrically connected between a second end of the inductor and a second power supply for supplying the second voltage;

A third switch electrically connected to the second end of the inductor and switching a path for charging the panel capacitor; And

And a fourth switch electrically connected to the second end of the inductor and switching a path for discharging the panel capacitor.

The apparatus further includes a second impedance element electrically connected between the second end of the inductor and the second power supply for supplying the first voltage.

In addition, the driving device of the plasma display panel may be an address driving device.

In this case, the first impedance element and the second impedance element are generated when the panel capacitor is charged or discharged by the turn-on of the third switch or the turn-on of the fourth switching and by the resonance of the inductor and the panel capacitor. It is characterized by reducing the displacement current.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

An address driving circuit according to an embodiment of the present invention will now be described in detail with reference to the drawings.

First, a plasma display panel according to an exemplary embodiment of the present invention will be described with reference to FIG. 3.

3 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 3, the plasma display panel according to the exemplary embodiment of the present invention includes a plasma panel 100, an address driver 200, a scan / sustain driver 300, and a controller 400.

The plasma panel 100 includes a plurality of address electrodes A1-Am arranged in the column direction, a plurality of scan electrodes Y1-Yn (hereinafter referred to as Y electrodes) and a plurality of sustain electrodes arranged side by side in the row direction. (X1-Xn) (hereinafter referred to as X electrode). The X electrodes X1 to Xn are formed corresponding to the respective Y electrodes Y1 to Yn, and are generally connected to each other in common.

The address driver 200 includes an address driver circuit 220. The address driver circuit receives an address drive control signal from the controller 400 and displays a display data signal for selecting a discharge cell to be displayed on each address electrode. Is authorized. The scan and sustain drive unit 300 includes a sustain discharge circuit, which receives an oil discharge signal from the controller and alternately inputs a sustain pulse voltage to the Y electrode and the X electrode. The sustain discharge occurs in the discharge cell selected by the input sustain pulse voltage.

Hereinafter, the structure and operation of the address driver circuit 220 included in the address driver 200 will be described in detail with reference to FIGS. 4 to 6.

4A is a diagram showing a schematic circuit of the address driving circuit according to the first embodiment of the present invention.

In FIG. 4A, for convenience of description, a voltage such that the voltage across the panel capacitor can select a discharge cell is applied to the other terminal of the panel capacitor Cp to which the address voltage V _A is applied. Is assumed to be the ground voltage (0V).

As shown in FIG. 4A, the address driving circuit 220 is largely divided into two parts. The charge / discharge circuit unit 222 which resonates using the half voltage (V _A / 2) of the address voltage and the address voltage of the panel about to And a clamping circuit portion 224, which clamps in the raised state. The panel capacitor Cp is connected between the contact point of the inductor L3 and the switching elements Aa and Ag and the ground terminal 0.

The charge / discharge circuit unit 222 may include the power recovery capacitor Cr, the inductor L3, the freewheeling diodes Df1 and Df2, the impedance elements Z1 and Z2 for reducing the displacement current, and the switching elements Ar and Af. The clamping circuit portion 224 includes switching elements Aa and Ag and clamping diodes (not shown in FIG. 4A). In this case, another active element that allows the freewheeling current to flow to the power supply V _A or the ground terminal 0 may be used instead of the frill wheeling diodes Df1 and Df2. In addition, although the switching elements Ar, Af, Aa, and Ag are represented by MOSFETs in FIG. 4A, the switching elements Ar, Af, Aa, and Ag are represented as MOSFETs. In addition, the switching elements Ar, Af, Aa, and Ag preferably have a body diode such as a pn junction isolation structure of a semiconductor integrated circuit.

In the charge / discharge circuit unit 222, the inductor L3 is electrically connected to the panel capacitor Cp, and the freewheeling diodes Df1 and Df2 are connected between the impedance element Z1 and the power supply VA and the impedance element Z2. ) And ground terminal (0) are each electrically connected. Impedance elements Z1 and Z2 are electrically connected between inductor L3 and freewheeling diode Df1 and to inductor L3 and freewheeling diode Df2, respectively. The switching elements Ar and Af are connected between the impedance element Z1 and the capacitor Cr and between the impedance element Z2 and the capacitor Cr, respectively, and the capacitor Cr is connected to the ground terminal 0. . In addition, diodes D1 and D2 may be additionally formed between the impedance elements Z1 and Z2 and the capacitor Cr to block a current that may flow through the body diodes of the switching elements Ar and Af. The switching elements Ar and Af serve as charging and discharging means for charging and discharging the panel capacitor Cp.

In the clamping circuit section 224, the switching elements Aa and Ag are connected between the contact of the inductor L3 and the panel capacitor Cp and the power supply V _A and the contact of the inductor L3 and the panel capacitor Cp. And ground terminal (0) are respectively connected. In this case, the switching elements Aa and Ag are used to clamp the panel capacitor Cp after charging or discharging. Although not shown in FIG. 4A, clamping diodes may be formed in parallel to the switching elements Aa and Ag, respectively, in which the voltage of the panel capacitor Cp is greater than or equal to the address voltage V _A in the actual circuit. It prevents it from becoming below 0V.

Hereinafter, the role of the impedance elements Z1 and Z2 for reducing the displacement current in the operation of the address driving circuit according to the first embodiment of the present invention will be described with reference to FIGS. 4B and 4C.

The switching element Aa is turned on and the switching elements Af, Aa and Ag are turned off so that the current flows through the capacitor Cr, the switching element Ar, the diode D1, and the inductor L1 to the panel capacitor Cp. At the start of the first mode operation of the LC resonance in which the path is formed, as described with reference to FIG. ), It rapidly changes from V _A / 2 to parasitic capacitance present in the switching element Af and the freewheeling diode Df2. 4B is a diagram illustrating the flow of the displacement current. At this time, when impedance elements Z1 and Z2 for reducing the displacement current are connected to the path of the displacement current generated by the parasitic capacitance of the switching element Af and the freewheeling diode Df2, the displacement current is It doesn't change dramatically. As the impedance element for reducing the displacement current, an element capable of reducing the slope of the current such as a bead, an inductor, and a resistor may be disposed. That is, by reducing the inclination of the displacement current generated by the devices such as beads, inductors, and resistors, the switching loss generated in the switching element Aa at the moment when the switching element Aa is turned on is prevented. Can be. In this case, when the impedance elements Z1 and Z2 are the inductors L1 and L2, the inductors L1, L2 and L3 are designed such that L1 + L3 = L and L2 + L3 = L between the inductors L1, L2 and L3. L is designed to be appropriate for resonance with the panel capacitor (Cp).

In the second mode, the switching element Ar is turned on and the switching element Aa is turned on while the voltage of the panel capacitor Cp is raised to some extent. The second mode operation is an operation of clamping and maintaining the address voltage V _A.

At the moment of the change from the second mode to the third mode, the switching element Af is turned on and the switching elements Ar, Aa, Ag are turned off, due to the LC resonance formed by the panel capacitor Cp and the inductor L3. The power charged in the panel capacitor Cp is recovered to the capacitor Cr. At the moment of changing from the second mode to the third mode, the voltage applied to the switching element Ar and the freewheeling diode Df1 changes rapidly, and parasitics present in the switching element Ar and the freewheeling diode Df1 are changed. The capacitance component causes displacement current. This displacement current is shown in Figure 4c. When a displacement current as shown in FIG. 4C is generated, impedance elements Z1 and Z2 for reducing the displacement current are disposed on the displacement current path as shown in FIG. 4C, and thus the displacement current is generated in the switching element Af. Can prevent switching losses.

In the fourth mode operation, the panel capacitor Cp is turned on by turning on the switching element Ag and turning off the switching elements Ar, Af, and Aa while power is almost recovered to the capacitor Cr in the third mode operation. This is the operation to clamp.

As can be seen from the above, the switching losses that may occur in the switching elements Ar and Af at the moment of the first mode operation and the second mode operation start are shown in FIG. 4A by the impedance elements Z1 and Z2 on the displacement current path. It can be prevented by arrange | positioning.

5A is a diagram showing a schematic circuit of an address driving circuit according to a second embodiment of the present invention.

As shown in Fig. 5A, the address driving circuit of the second embodiment of the present invention is the same as that of the first embodiment of the present invention except that the impedance elements Z1 and Z2 for reducing the displacement current are different. Omitted explanation is omitted. That is, as shown in FIG. 5A, the positions of the impedance elements Z1 and Z2 are positioned between the contacts of the freewheeling diode Df1 and the inductor L3 and the diode D1, and the freewheeling diode Df2 and the inductor L3. The arrangement of the other elements is the same as that of the first embodiment except that they are connected between the contacts of and the diode D2, respectively, and the operation thereof is also the same as the first embodiment.

The operation of the second embodiment of the present invention is also the same as the first embodiment, due to the parasitic capacitance present in the elements Ar, Af, Df1, Df2 at the start of the first mode and the third mode operation as described above. Displacement current may occur. 5B and 5C show the path of the displacement current due to parasitic capacitance. FIG. 5B shows the path of the displacement current at the moment when the first mode is in operation, and FIG. 5C is a diagram showing the path of the displacement current at the moment when the third mode is in operation. As shown in FIGS. 5B and 5C, the impedance elements Z1 and Z2 are positioned in the path of the displacement current, thereby reducing the slope of the displacement current, thereby preventing switching losses that may occur in the switching elements Ar and Af. Also in the second embodiment of the present invention, the impedance elements Z1 and Z2 are elements that can reduce the inclination of the current such as beads, inductors, and resistors.

6A is a schematic diagram of a circuit of an address driving circuit according to a third embodiment of the present invention.

As shown in Fig. 6A, the address driving circuit of the third embodiment of the present invention is the same as the first embodiment of the present invention except that the impedance elements Z1 and Z2 for reducing the displacement current are different. Omit the description. That is, as shown in FIG. 6A, the positions of the impedance elements Z1 and Z2 are positioned between the freewheeling diode Df1 and the power supply and between the freewheeling diode Df2 and the ground terminal 0V to reduce the displacement current. Except that each is connected, the arrangement of the other elements is the same as in the first embodiment, and the operation thereof is also the same as in the first embodiment.

The operation of the third embodiment of the present invention is also the same as the first embodiment, due to the parasitic capacitance present in the elements Ar, Af, Df1, and Df2 at the start of the first mode and the third mode operation as described above. Displacement current may occur. 6B and 6C illustrate the path of the displacement current due to parasitic capacitance. FIG. 6B illustrates a path of the displacement current at the moment when the first mode is operated, and FIG. 6C is a diagram illustrating a path of the displacement current at the moment when the third mode is operated. As shown in FIGS. 6B and 6C, the impedance elements Z1 and Z2 are positioned in the path of the displacement current, thereby reducing the slope of the displacement current, thereby preventing switching losses that may occur in the switching elements Ar and Af. Also in the third embodiment of the present invention, the impedance elements Z1 and Z2 are elements that can reduce the inclination of the current such as beads, inductors, and resistors.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, by connecting an impedance element that reduces the slope of the displacement current on the path of the displacement current, the switching loss of the switching element is reduced by the influence of the displacement current generated by the parasitic capacitance present in the element. This can prevent problems. In addition, it is possible to reduce the temperature generated in the switch element that can be generated through the switching loss.

1 is a diagram showing a conventional technology relating to an address driving device of a plasma display panel.

FIG. 2 is a diagram illustrating an equivalent circuit and a path of a displacement current in the first mode operation of the address driving device as shown in FIG. 1.

3 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

4A is a diagram showing a schematic circuit of an address driving circuit according to a first embodiment of the present invention.

4B and 4C are diagrams showing a path of a displacement current generated in the address driving circuit according to the first embodiment of the present invention.

5A is a diagram showing a schematic circuit of an address driving circuit according to a second embodiment of the present invention.

5B and 5C are diagrams illustrating a path of a displacement current generated in the address driving apparatus of the plasma display panel according to the second embodiment of the present invention.

6A is a schematic circuit diagram of an address driving circuit according to a third embodiment of the present invention.

6B and 6C are diagrams illustrating a path of a displacement current generated in the address driving apparatus of the plasma display panel according to the third embodiment of the present invention.

Claims (13)

A driving apparatus of a plasma display panel for driving a plasma display panel including a panel capacitor formed between a first electrode and a second electrode, An inductor having a first end electrically connected to the first end of the panel capacitor; A first switch electrically connected between a first end of the inductor and a first power supply for supplying a first voltage; A second switch electrically connected between a first end of the inductor and a second power supply for supplying a second voltage; A first impedance element and a second impedance element each having a first end electrically connected to a second end of the inductor; A third switch electrically connected to a second end of the first impedance element and switching a path for charging the panel capacitor; And And a fourth switch electrically connected to a second end of the second impedance element and switching a path for discharging the panel capacitor. The method of claim 1, The driving device of the plasma display panel is an address driving device. The method of claim 1, And first and second freewheeling diodes electrically connected between second ends of the first and second impedance elements and the first and second power sources, respectively. The method of claim 1, And a first and a second freewheeling diode electrically connected between the first end of the first and second impedance elements and the first and second power sources, respectively. The method according to any one of claims 1 to 4, The first impedance element and the second impedance element are displacements generated when the panel capacitor is charged or discharged by the turn-on of the third switch or the turn-on of the fourth switching, and the resonance of the inductor and the panel capacitor. A device for driving a plasma display panel, which reduces current. The method of claim 1, And the first impedance element and the second impedance element are inductor elements. The method of claim 1, And the first impedance element and the second impedance element are resistors or bead elements. The method of claim 1, And a capacitor electrically connected to a contact point of the third switch and the fourth switch electrically connected to each other. A driving apparatus of a plasma display panel for driving a plasma display panel including a panel capacitor formed between a first electrode and a second electrode, An inductor having a first end electrically connected to the first end of the panel capacitor; A first switch electrically connected between a first end of the inductor and a first power supply for supplying a first voltage; A second switch electrically connected between a first end of the inductor and a second power supply for supplying a second voltage; A first impedance element electrically connected between a second end of the inductor and a second power supply for supplying the second voltage; A third switch electrically connected to the second end of the inductor and switching a path for charging the panel capacitor; And And a fourth switch electrically connected to the second end of the inductor and switching a path for discharging the panel capacitor. The method of claim 9, The driving device of the plasma display panel is an address driving device. The method of claim 9, And a second impedance element electrically connected between a second end of the inductor and a second power supply for supplying the first voltage. The method of claim 9, And a first and a second freewheeling diode electrically connected between the first and second impedance elements and the third inductor, respectively. The method of claim 11, The first impedance element and the second impedance element are displacements generated when the panel capacitor is charged or discharged by the turn-on of the third switch or the turn-on of the fourth switching, and the resonance of the inductor and the panel capacitor. A device for driving a plasma display panel, which reduces current.