KR20050011185A - A method for forming a transistor of a semiconductor device - Google Patents

Abstract

PURPOSE: A method of forming a transistor of a semiconductor device is provided to improve reliability of the semiconductor device by forming an amorphous layer on a semiconductor substrate and crystallizing the amorphous layer. CONSTITUTION: Impurity ions are implanted into a semiconductor substrate(31) to form a well. Nitrogen ions are implanted into the well. A first thermal process for the semiconductor substrate is performed. A gate electrode as a stacked structure of a gate oxide layer(40) and a conductive layer(41) for gate electrode is formed on the semiconductor substrate. An oxide layer is formed on the conductive layer and the semiconductor substrate. An LDD junction region is formed by implanting low-density impurity ions into the semiconductor substrate. Anti-diffusion impurity ions are implanted into the semiconductor substrate. The oxide layer is removed therefrom. A re-oxide layer(49) is formed on the entire surface of the semiconductor substrate. An extended source/drain junction region(50) is formed by performing a second thermal process for the semiconductor substrate. A buffer oxide layer(51) is formed on the re-oxide layer. An insulating layer spacer(53) is formed on the buffer oxide layer. A transistor having an LDD structure is fabricated by forming a heavily doped junction region on the semiconductor substrate.

Description

A method for forming a transistor of a semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a transistor of a semiconductor device, and more particularly, to a technique for improving the characteristics of an extension source / drain junction region included in a transistor according to high integration of a semiconductor device.

1A to 1C are cross-sectional views illustrating transistors of a semiconductor device formed according to an embodiment of the prior art.

Referring to FIG. 1A, an isolation layer 13 defining an active region is formed on the semiconductor substrate 11.

A gate electrode having a stacked structure of a gate oxide film 15 and a gate electrode conductive layer 17 is formed on the semiconductor substrate 11 on the active region.

Referring to FIG. 1B, the LDD junction region 19 is formed by ion implanting impurities of low concentration into the active region of the semiconductor substrate 11 using the gate electrode as a mask.

Referring to FIG. 1C, an extension source / drain junction region 25 is formed by driving the LDD junction region 19 by a heat treatment process.

An insulating film spacer 21 is formed on the sidewalls of the gate electrode.

A high concentration source / drain junction region 23 is formed by implanting a high concentration of impurities into the semiconductor substrate 11 using the insulating film spacer 21 as a mask to form a source / drain junction region having an LDD structure.

In the subsequent high temperature heat treatment process, impurities of the extension source / drain junction region 25 are diffused laterally to deteriorate operating characteristics of the semiconductor device.

As described above, in the method of forming a transistor of a semiconductor device according to the related art, a punch in which impurities of the extension source / drain junction region are diffused toward a channel during a subsequent heat treatment process and turned on before an operating voltage of the device is applied. There is a problem in that the operation characteristics of the semiconductor device are degraded by causing a through phenomenon or a short channel effect.

In particular, if the microstructure is excessively formed beyond the conventional equipment performance, there is a problem that the reproducibility of the same size is deteriorated and thus the productivity and yield of the device may be lowered.

The present invention to solve this problem of the prior art,

In the process of forming an oxide film on the surface of the gate electrode and removing it, it is possible to reduce the size of the gate electrode required for high integration of the semiconductor device, and to provide a method of forming a transistor of the semiconductor device, thereby improving the operation characteristics of the semiconductor device. Its purpose is to.

1A to 1C are cross-sectional views showing a transistor forming method of a semiconductor device according to an embodiment of the prior art.

2A to 2J are cross-sectional views showing a transistor forming method of a semiconductor device according to an embodiment of the present invention.

<Description of Signs of Major Parts of Drawings>

11,31: semiconductor substrate 13,33: device isolation film

15,40 gate oxide film 17,41 conductive layer for gate electrode

19,47: LDD junction region 21,53: insulating film spacer

23,55: High concentration source / drain junction region

25,50: extended source / drain junction region 35: first buffer oxide layer

37 photosensitive film pattern 39: nitrogen ion layer

43,45: oxide film 49: reoxidation film

51: second buffer oxide film

In order to achieve the above object, a method of forming a transistor of a semiconductor device according to the present invention,

Implanting impurity ions for well formation into a semiconductor substrate;

Ion implanting nitrogen ions into the wells;

First heat treating the semiconductor substrate;

Forming a gate electrode provided on the semiconductor substrate in a stacked structure of a gate oxide film and a conductive layer for a gate electrode;

Forming an oxide film on the surfaces of the gate electrode conductive layer and the semiconductor substrate;

Forming an LDD junction region by implanting impurities of low concentration into the semiconductor substrate using the gate electrode as a mask;

Implanting ions for preventing impurity diffusion into the semiconductor substrate using the gate electrode as a mask;

Removing the oxide film;

Forming a reoxidation film on the entire surface by a predetermined thickness;

Forming an extended source / drain junction region by performing a second heat treatment on the semiconductor substrate at a low temperature for a long time;

Forming a buffer oxide film a predetermined thickness on the reoxidation film;

Forming an insulating film spacer on the buffer oxide film on the sidewalls of the gate electrode;

Forming a transistor having an LDD structure by ion implanting a high concentration of impurities into the semiconductor substrate to form a high concentration of impurity junction region;

The well-forming impurities may include SB, As, or In,

The ion implantation step of the nitrogen ion is to perform 1E13 ~ 1E14 atoms / ㎠ by the energy of 10-50 KeV,

The ion implantation process of the nitrogen ions are implanted to be distributed to the depth of 100 ~ 1000 으로부터 from the surface of the semiconductor substrate

The first heat treatment step is carried out by performing a heat treatment for 1 to 3 seconds at a temperature of 900 to 1020 ℃ with a temperature rising rate of 150 to 200 ℃ / sec, and cooling the temperature drop rate of 100 ℃ / sec or more,

The first heat treatment step is carried out in an oxygen-free nitrogen gas atmosphere,

The oxide film on the surface of the gate electrode conductive layer is formed to have a thickness of 130 to 170 Å,

The implantation step of the impurity diffusion preventing ion is to use any one selected from the group consisting of nitrogen ions, Ge ions, Ar ions and combinations thereof,

The implantation step of implanting ions for preventing impurity diffusion is ion implantation by rotating 1E13 to 5E14 atoms / cm 2 4 times at 0 °, 90 °, 180 ° and 270 ° at an inclined angle of 3 to 8 degrees,

The implantation of the impurity diffusion preventing ions is implanted with an energy of 5 to 20 KeV to be equal to the Rp (projection range) of the LDD junction region impurities,

The impurity diffusion preventing ion implantation step includes implanting ions to a position of 50 to 600 mm depth from the surface of the semiconductor substrate;

The step of removing the oxide film is carried out using HF solution or BOE solution,

The second heat treatment process is characterized in that carried out for 5 to 9 hours at a temperature of 500 ~ 600 ℃.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2A to 2J are cross-sectional views illustrating a transistor forming method of a semiconductor device according to the present invention.

Referring to FIG. 2A, an isolation layer 33 is formed on the semiconductor substrate 31.

A first buffered oxide film 35 is formed on the semiconductor substrate 31, and a photosensitive film pattern 37 is formed on the first buffered oxide film 35. In this case, the photoresist pattern 37 is formed by an exposure and development process using a well mask (not shown) for forming a pewell or an enwell.

Using the photoresist pattern 37 as a mask, a well formation impurity ion is implanted into the semiconductor substrate 31 to form a pewell (not shown) or an enwell (not shown). In this case, the well-forming impurities may be formed using atoms having a large mass such as Sb, As, and In to suppress diffusion of impurities during a subsequent heat treatment process.

Nitrogen ions are implanted into the semiconductor substrate 31 using the photoresist pattern 37 as a mask to form a nitrogen ion layer 39 so that impurities formed in the pewell or enwell can be prevented from diffusing into other regions. do. Here, the first buffer oxide layer 35 serves to prevent damage to the semiconductor substrate 31.

In this case, the implantation process of nitrogen ions is implanted with impurities of 1E13 to 1E14 atoms / cm 2 at an energy of 10 to 50 KeV, but distributed from the surface of the semiconductor substrate 31 to a depth of 100 to 1000 GPa.

Referring to FIG. 2B, the photosensitive film pattern 37 is removed and a first heat treatment process is performed.

Here, the first heat treatment process diffuses the nitrogen ions along the silicon lattice structure of the semiconductor substrate to form a stable lattice structure of nitrogen ions instead of the silicon lattice structure. In addition, the nitrogen ions prevent the diffusion of other impurities.

The first heat treatment step is carried out at a temperature of 900 to 1020 ℃ for 1 to 3 seconds, the temperature rise rate to the target temperature is 150 to 200 ℃ / sec and the temperature drop rate is carried out to 100 ℃ / sec or more. The first heat treatment process is performed in an oxygen-free nitrogen gas atmosphere to prevent out-gassing of nitrogen ions.

Next, the first buffer oxide layer 35 pattern is removed.

A lamination structure of the gate oxide film 40 and the gate electrode conductive layer 41 is formed on the entire surface.

The stacked structure is etched by a photolithography process using a gate electrode mask (not shown) to form a gate electrode.

In this case, the gate electrode mask is designed to form a gate electrode having a length of 0.18 μm.

Referring to FIG. 2C, the surface of the gate electrode conductive layer 41 is oxidized to form an oxide film 43 having a thickness of 130 to 170 Å on the surface of the gate electrode conductive layer 41. At this time, the oxide film 45 is also formed on the surface of the semiconductor substrate 31.

Here, the oxidation process is performed in a state where the target length of the gate electrode is set to 0.15 μm, so that a gate electrode having a length of 0.15 μm can be formed using an exposure apparatus that can define a gate electrode having a length of 0.18 μm. It was done.

Referring to FIG. 2D, low concentration impurities are implanted into the semiconductor substrate 31 on which the amorphous silicon layer is formed to form the LDD junction region 47.

Subsequently, nitrogen ions, Ge ions, or Ar ions, which are impurities for preventing impurity diffusion, are implanted into the semiconductor substrate 31, that is, the LDD junction region 47, using the gate electrode and the oxide film 43 formed on the surface thereof as a mask. do.

At this time, the implantation step of the impurity diffusion prevention ion is 4 times by 0 °, 90 °, 180 ° and 270 ° at an angle of 3 to 8 degrees of nitrogen ions, Ge ions or Ar ions by 1E13 to 5E14 atoms / cm 2. Rotate to do it.

The implantation of the impurity diffusion preventing ions is performed at a position of 50 to 600 Å deep from the surface of the semiconductor substrate 31 with an energy of 5 to 20 KeV to be equal to the Rp (projection range) of the impurities of the LDD junction region 47. In order to prevent short channel effects by suppressing the diffusion of impurities in a subsequent heat treatment process.

Referring to FIG. 2E, the oxide film 43 formed on the surface of the gate electrode conductive layer 41 is removed and the oxide film 45 formed on the semiconductor substrate 31 is removed.

At this time, the removal process of the oxide film (43, 45) is performed using HF solution or BOE solution.

Referring to FIG. 2F, a re-oxide film 49 is formed on the surface of the semiconductor substrate 31 and the conductive layer 41 for the gate electrode.

Referring to FIG. 2G, an extended source / drain junction region 50 is formed by a second heat treatment process in which the LDD junction region 47 is performed at a low temperature for a long time.

The second heat treatment is carried out at a temperature of 500 to 600 ° C. for 5 to 9 hours to crystallize the LDD junction region 47 formed of the amorphous silicon layer by solid phase epitaxial growth (hereinafter referred to as SPE). To form a flawless expansion source / drain junction region 50.

In this case, since the amorphous silicon layer 43 grows along the lattice structure of the conductive substrate 31, which is the lower silicon layer, the heat treatment process may have a complete silicon lattice structure without defects, thereby suppressing rapid diffusion during the subsequent heat treatment process. Make sure

In addition, the heat treatment process is performed in an atmosphere without oxygen gas to prevent deterioration of characteristics due to oxygen ions.

Next, a second buffered oxide film 51 is formed over the entire surface.

Referring to FIG. 2H, a nitride film 53 is formed on the second buffer oxide film 51.

Referring to FIG. 2I, the nitride film 53 is anisotropically etched to form a nitride film 53 spacer on the sidewall of the gate electrode.

A transistor having an LDD structure is formed by forming a high concentration source / drain junction region 55 by ion implanting a high concentration of impurities into the semiconductor substrate 31 using the gate electrode and the nitride film 53 spacer as a mask.

As described above, in the method of forming a transistor of a semiconductor device according to the present invention, by forming an amorphous layer grown along crystals of a semiconductor substrate formed of silicon and crystallizing it to form a transistor having improved electrical characteristics, It provides an effect of improving the reliability and thereby high integration of the semiconductor device.

Claims (13)

Implanting impurity ions for well formation into a semiconductor substrate; Ion implanting nitrogen ions into the wells; First heat treating the semiconductor substrate; Forming a gate electrode provided on the semiconductor substrate in a stacked structure of a gate oxide film and a conductive layer for a gate electrode; Forming an oxide film on the surfaces of the gate electrode conductive layer and the semiconductor substrate; Forming an LDD junction region by implanting impurities of low concentration into the semiconductor substrate using the gate electrode as a mask; Implanting ions for preventing impurity diffusion into the semiconductor substrate using the gate electrode as a mask; Removing the oxide film; Forming a reoxidation film on the entire surface by a predetermined thickness; Forming an extended source / drain junction region by performing a second heat treatment on the semiconductor substrate at a low temperature for a long time; Forming a buffer oxide film a predetermined thickness on the reoxidation film; Forming an insulating film spacer on the buffer oxide film on the sidewalls of the gate electrode; Forming a transistor having an LDD structure by ion implanting a high concentration of impurities into the semiconductor substrate to form a high concentration of impurity junction regions. The method of claim 1, The well-forming impurity is Sb, As or In using a transistor forming method of a semiconductor device. The method of claim 1, The ion implantation step of the nitrogen ion is a method of forming a transistor of a semiconductor device, characterized in that for each 1E13 ~ 1E14 atoms / ㎠ to 10 ~ 50 KeV energy. The method of claim 1, The ion implantation process of nitrogen ions is implanted so as to be distributed from the surface of the semiconductor substrate to a depth of 100 ~ 1000 Å. The method of claim 1, The first heat treatment step is performed by heat treatment at a temperature of 900 to 1020 ℃ for 1 to 3 seconds at a temperature rising rate of 150 to 200 ℃ / sec and cooling the temperature drop rate of 100 ℃ / sec or more. Transistor Formation Method. The method of claim 1, And the first heat treatment step is performed in an oxygen-free nitrogen gas atmosphere. The method of claim 1, And an oxide film on the surface of said conductive layer for gate electrodes is formed to have a thickness of 130 to 170 kHz. The method of claim 1, The implantation step of the impurity diffusion preventing ion is any one selected from the group consisting of nitrogen ions, Ge ions, Ar ions and combinations thereof. The method of claim 1, The implantation step of implanting the ion for preventing impurity diffusion is a semiconductor device characterized in that the ion implantation by rotating 1E13 to 5E14 atoms / ㎠ 4 times by 0 °, 90 °, 180 ° and 270 ° at an inclined angle of 3 to 8 degrees Transistor formation method. The method of claim 1, The implantation process of the impurity diffusion preventing ion is ion implanted with energy of 5 ~ 20 KeV so as to equal the Rp (projection range) of the LDD junction region impurities. The method of claim 1, The implantation step of implanting the ion for preventing the diffusion of impurities is ion implantation method of the semiconductor device, characterized in that the ion implantation to a position of 50 ~ 600 Å depth from the surface of the semiconductor substrate. The method of claim 1, And removing the oxide film using a HF solution or a BOE solution. The method of claim 1, The second heat treatment process is a transistor forming method of a semiconductor device, characterized in that performed for 5 to 9 hours at a temperature of 500 ~ 600 ℃.