KR20050003144A - Fabricating method of semiconductor device depressing native oxide with hydrogen gas - Google Patents

Abstract

PURPOSE: A method for manufacturing a semiconductor device is provided to remove a native oxide layer at interface between silicon layers by using H2 gas. CONSTITUTION: A lower silicon layer is formed on a semiconductor substrate. A junction part is formed on the substrate. The resultant structure is then cleaned. The substrate is loaded in a silicon deposition equipment and a native oxide layer is removed by using H2 gas. Then, an upper silicon layer is formed to connect the lower silicon layer through the junction part.

Description

Method for manufacturing semiconductor device from which natural oxide film is removed using hydrogen {FABRICATING METHOD OF SEMICONDUCTOR DEVICE DEPRESSING NATIVE OXIDE WITH HYDROGEN GAS}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device from which a natural oxide film existing at an interface between silicon and silicon is removed. In particular, the present invention removes a natural oxide film by introducing a reduction process using hydrogen (H ₂ ) gas.

When fabricating a device using a junction between a silicon film (Si) and a silicon film (Si) in a semiconductor device, the native oxide formed on the junction between Si and Si has an important effect on device characteristics.

1 is a data showing the change of contact resistance at the Si-Si interface according to the ozone concentration in the atmosphere. As shown in FIG. 1, when the ozone concentration in the air is increased, the contact resistance is increased, and when the ozone concentration exceeds 0.015 PPM, it can be seen that the tendency of the contact resistance is increased.

In the case of forming a very small sized hole (e.g., a contact hole), the surface of silicon tends to be easily oxidized by ozone in the air. In this case, there is a problem in that a large amount of natural oxide film is formed at the interface at the initial stage of bonding.

This will be described with reference to the drawings. 2 is a cross-sectional view of a conventional semiconductor device using silicon as a plug material.

Referring to FIG. 2, a trench isolation layer 11 defining an active region and a field region is formed on a silicon substrate 10, and a gate electrode 12 (in the case of a memory element, corresponds to a word line) on the active region. Is formed.

A first interlayer insulating film 13 is formed on the semiconductor substrate including the gate electrode 12, and the first plug silicon 14 is connected to the substrate 10 through the first interlayer insulating film 13. ) Is shown.

The bit line 16 is formed on the first interlayer insulating layer 13, and the bit line contact 15 electrically connecting the bit line 16 and the semiconductor substrate 10 forms the first interlayer insulating layer 13. It is formed through.

In addition, a second interlayer insulating film 17 is formed on the bit line 16 and the first interlayer insulating film 13, and is connected to the first plug silicon 14 through the second interlayer insulating film 17. The second plug silicon 18 is formed.

As described above, a natural oxide film as described above is present at the interface A in which silicon and silicon are in contact with each other, which adversely affects device characteristics, and thus a process for removing the same has been applied. .

First, a photo / etch process is performed to form a junction for bonding silicon and silicon. This corresponds to a process of forming a contact hole penetrating the first interlayer insulating film 13 to form the first plug silicon 14 with reference to FIG. 2.

Next, after the photo / etching process, a post-treatment process is performed to clean the surface of the silicon substrate. The post-treatment includes a light etch method using a low power plasma.

In the light etch method, the silicon bulk substrate is removed to 300 Å or less to clean the surface of the substrate, and then wet cleaning is performed. In the wet cleaning process, an oxide etchant is used to remove the native oxide film.

However, even after the complicated post-treatment process described above, it was not possible to fundamentally control or remove the occurrence of the natural oxide film. Therefore, such a natural oxide film causes deterioration of the device such as increasing contact resistance, and in the case of a memory device, it causes a decrease in data storage voltage and a leakage current.

The present invention is to solve the above-mentioned conventional problems, and to provide a method for manufacturing a semiconductor device suppressing the natural oxide film by applying a reduction process using H ₂ gas.

1 is a graph showing the relationship between ozone concentration in air and natural oxide film;

2 is a cross-sectional view of a device illustrating a case where a junction between silicon and silicon is used in a conventional semiconductor device;

3 is a view illustrating an unstable coupling of silicon and oxygen atoms before the natural oxide film removing process according to an embodiment of the present invention;

4 is a view showing the coupling after the natural oxide film removing process according to an embodiment of the present invention,

5 is a graph showing a relationship between temperature and pressure in a semiconductor device manufacturing process according to an embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

10: silicon substrate

11: trench isolation film

12: gate electrode

13: first interlayer insulating film

14: first plug silicone

15: bitline contact

16: bit line

17: second interlayer insulating film

18: second plug silicon

The present invention for achieving the above object, forming a lower silicon film on a substrate; Forming a junction on the wafer for bonding with the lower silicon film; Proceeding with the cleaning process; Inserting the wafer into a silicon deposition apparatus and performing a reduction process using H ₂ gas to remove the native oxide film; And forming an upper silicon film in contact with the lower silicon film.

The present invention relates to a method for fabricating a semiconductor device in which a natural oxide film existing at an interface between a silicon film and a silicon film is removed by applying a reduction process using hydrogen (H ₂ ) gas. It is the invention which suppressed natural oxide film by reducing oxygen of O bond.

In the present invention, when the lower silicon film (the first plug silicon) is in an amorphous state, the hydrogen reduction process is performed at a low temperature so that the lower silicon film (the first plug silicon) can be maintained in the amorphous state, thereby making contact. Reduced resistance.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention.

2 is a cross-sectional view of a conventional semiconductor device using silicon as a plug material as described in the prior art, with reference to this an embodiment of the present invention.

First, referring to FIG. 2, two interfaces are illustrated as the interface A between the silicon film and the silicon film. Therefore, the hydrogen reduction process according to the exemplary embodiment of the present invention is also performed twice.

That is, the first hydrogen reduction process for removing the natural oxide film between the silicon substrate 10 and the first plug silicon 14 and the natural oxide film between the first plug silicon 14 and the second plug silicon 18 are performed. A second hydrogen reduction step for removal proceeds.

Referring to this point, first, a process of forming a series of elements (element isolation film, gate electrode, first interlayer insulating film, etc.) on a semiconductor substrate and forming a contact hole for silicon bonding is the same as in the prior art. Do.

Referring to FIG. 2, a trench isolation layer 11 defining an active region and a field region is formed on a silicon substrate 10, and a gate electrode 12 (in the case of a memory device, corresponds to a word line) on the active region. ) Is formed.

That is, after forming the first interlayer insulating film 13 on the semiconductor substrate, the contact selectively exposes a predetermined region of the semiconductor substrate 10 by selectively etching the first interlayer insulating film 13 through a photo / etch process. Form a hole.

After forming the contact holes as described above, a post-treatment process for cleaning the surface of the silicon substrate is performed. As a post-treatment process, a conventional wet cleaning process or a dry cleaning process using lightetch may be applied.

Next, the wafer is charged into a silicon deposition apparatus. Silicon deposition equipment used in one embodiment of the present invention is a low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition (LPCVD) equipment) and may be used as a single (single) type or batch (batch) type LPCVD equipment.

The pressure in the low pressure chemical vapor deposition equipment may vary depending on the integration of the device and the depth of the contact hole, but to maintain a stable pressure within 0.01 ~ 100 Torr.

In addition, in an embodiment of the present invention, when the wafer is charged into a low pressure chemical vapor deposition apparatus, a purge process using an inert gas (He, Ne, Ar, etc.) is further performed to minimize generation of a natural oxide film. It was.

Next, after the pressure in a chamber maintains the state of 0.01-100 Torr stably, a 1st hydrogen reduction process advances. That is, H ₂ gas is flowed to reduce oxygen existing on the surface of the silicon substrate. This first hydrogen reduction process is carried out at a pressure of 0.01 to 100 Torr and a temperature range of 400 to 700 ℃.

The reaction between H ₂ gas introduced into the chamber and oxygen (O ₂ ) present on the surface of the silicon substrate occurs in two stages, and can be expressed by the following reaction formula.

First stage reaction: 2SiO _x (s) + 2H ₂ → 2SiO _x-1 (s) + H ₂ O (g) + 2H (g)

2nd step reaction: 2SiO _x-1 (s) + 2H ₂ → 2SiO (s) + H ₂ O (g) + 2H (g)

Through this reaction, the oxygen present in the unstable Si-O bond on the surface of the silicon substrate is reduced by hydrogen, so that the natural oxide film is removed.

3 is a diagram illustrating an unstable Si-O bond present on a surface of a silicon substrate before flowing hydrogen gas, and FIG. 4 is a diagram showing a natural oxide film in which oxygen is reduced after flowing hydrogen gas according to an embodiment of the present invention. In the drawing, the natural oxide film existing on the surface of the silicon film is removed through the two-step reaction as described above.

Next, the first plug silicon 14 is deposited using a source gas such as SiH ₄ , Si ₂ H _6, and the like. The first plug silicon is deposited in an amorphous state and then transformed into a crystalline state through a subsequent thermal process, or It may be deposited in a crystalline state from the beginning.

According to the case where the first plug silicon 14 is in an amorphous state or in a crystalline state, there may be a change in the subsequent second hydrogen reduction process, which will be described later. After depositing the first plug silicon 14, an in-situ doping process is performed.

Next, as shown in FIG. 2, the bit line 16 and the bit line contact 15 are formed, and a second interlayer insulating film 17 is formed thereon.

Next, a portion of the second interlayer insulating layer 17 is selectively etched to form a contact hole exposing the first plug silicon 14.

After the contact hole is formed in this manner, a post-treatment process for cleaning the surface of the first plug silicon 14 is performed and the wafer is charged into a low pressure chemical vapor deposition apparatus. The post-treatment process and the purge process using an inert gas Since the same process as described above, it will not be described in detail.

Next, after stably maintaining the state in which the pressure in a chamber is 0.01-100 Torr, a 2nd hydrogen reduction process advances. The temperature at which the second hydrogen reduction process is performed may vary depending on whether the first plug silicon 14 is in an amorphous state or a crystalline state.

If the first plug silicon 14 is in an amorphous state, the second hydrogen reduction process is performed at a low temperature of 400 ° C or lower, and in the crystalline state, the second hydrogen reduction process is performed at a temperature of 400 to 700 ° C. do.

This will be described in detail below. As described above, the first plug silicon 14 is first deposited in an amorphous state and then changed into a crystalline state through a subsequent thermal process to be used as a plug, or is deposited from the beginning and used as a plug. There may be occasions.

At this time, when comparing the grain size when forming the first plug silicon in the crystalline state and the grain size when changing from the amorphous state to the crystalline state, the grain when changing from the amorphous state to the crystalline state It is larger in size than it is in the crystal state from the beginning. Since the increase in grain size leads to a decrease in resistance, the process temperature of the second hydrogen reduction process is set in consideration of this.

That is, when the first plug silicon 14 is deposited in an amorphous state, the second hydrogen reduction process is performed at a low temperature of room temperature to 400 ° C. or lower, whereby the first plug silicon 14 in the amorphous state is changed into a crystalline state. Suppress it.

In addition, when the first plug silicon 14 is changed to the crystalline state, since the Si-O bonding force of the silicon surface is stronger than that of the amorphous state, oxygen is less likely to be reduced in the second hydrogen reduction step. Even for this reason, it is preferable to keep the first plug silicon in an amorphous state.

If the first plug silicon 14 is deposited in a crystalline state from the beginning, since the low temperature of 400 ° C or lower as described above is not necessary, the second hydrogen reduction process is performed at a temperature of 400 to 700 ° C.

In the second hydrogen reduction process, oxygen is reduced through the two-step reaction described above to remove the natural oxide film.

After the second hydrogen reduction process is completed, an in-situ doping process is performed. In an embodiment of the present invention, the phosphorus (P) is doped by flowing PH ₃ gas. At this time, H ₂ , N ₂ , Ar, SiH ₄ or the like is used as the diluting gas. Next, the second plug silicon 18 is deposited using a source gas such as SiH ₄ , Si ₂ H _6, or the like.

5 is a graph showing the temperature change and the pressure change during the second hydrogen reduction process according to an embodiment of the present invention. Referring to this, when the wafer is charged into the LPCVD apparatus, the pressure in the chamber is at atmospheric pressure (760 Torr). ).

Referring to FIG. 5, as the pressure pump operates, the pressure in the chamber gradually decreases, the pressure is stably maintained at a low pressure of about 0.01 Torr, and the substrate temperature is also gradually increased.

In addition, referring to Figure 5 it can be seen that when the hydrogen is injected into the chamber for the hydrogen reduction process, the pressure in the chamber is increased, the chamber temperature at this time is represented by two lines.

That is, the temperature indicated by the solid line indicates that the second hydrogen reduction process is performed at a temperature of 400 ° C. or lower, which is to maintain the amorphous state of the first plug silicon when the first plug silicon is deposited in an amorphous state. It shows that the hydrogen reduction process proceeds below 400 ℃.

In addition, the temperature indicated by the dotted line indicates that the second hydrogen reduction process proceeds at 400 ~ 700 ℃.

After the second hydrogen reduction process proceeds as described above, SiH ₄ , Si ₂ H ₆ gas, which is a source gas for silicon deposition, is introduced into the chamber to increase the pressure of the chamber, and silicon is deposited at a temperature of 400 to 650 ° C. It can be seen that.

When the present invention as described above is applied to the manufacture of semiconductor devices, it is possible to suppress the natural oxide film present at the interface between the silicon film and the silicon film, thereby reducing contact resistance, increasing data retention time, and increasing refresh time. The same device characteristics can be improved.

As described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and the present invention may be variously substituted, modified, and changed without departing from the spirit of the present invention. It will be apparent to those of ordinary skill in the art.

According to the present invention, since the natural oxide film between the silicon films can be suppressed, device characteristics are improved, such as a decrease in contact resistance in the fine contact holes, an increase in data retention time in the memory device, and an increase in refresh time. There is.

Claims (5)

Forming a lower silicon film on the substrate; Forming a junction on the wafer for bonding with the lower silicon film; Proceeding with the cleaning process; Inserting the wafer into a silicon deposition apparatus and performing a reduction process using H ₂ gas to remove the native oxide film; And Forming an upper silicon film in contact with the lower silicon film Method of manufacturing a semiconductor device comprising a. The method of claim 1, The H ₂ reduction process is a method of manufacturing a semiconductor device, characterized in that carried out at a temperature of room temperature ~ 700 ℃ and pressure of 0.01 ~ 100 Torr. The method of claim 2, If the lower silicon film is amorphous, The H ₂ reduction process is a method of manufacturing a semiconductor device, characterized in that carried out under a temperature of room temperature ~ 400 ℃ and pressure of 0.01 ~ 100 Torr. The method according to claim 2 or 3 The silicon deposition equipment manufacturing method of a semiconductor device, characterized in that the low pressure chemical vapor deposition equipment. The method of claim 4 Forming an upper silicon film to be connected to the lower silicon film, Method for manufacturing a semiconductor device, characterized in that carried out at 400 ~ 650 ℃ using SiH ₄ , Si ₂ H ₆ gas.