KR20040090082A - Liquid crystal display panel of horizontal electronic field applying type - Google Patents

Abstract

PURPOSE: An IPS(In Plane Switching) mode LCD(Liquid Crystal Display) panel is provided to display a uniform image by reducing the line resistance of common lines and supplying a uniform common voltage to the entire part of the panel. CONSTITUTION: A conductive line(65) is formed on a non-display area except for a display area of the first substrate. The first and second common lines formed on the second substrate opposite with the first substrate supply a common voltage. At least one dot connects the conductive line with the first and second common lines. The first common line is formed on a non-display region of the second substrate. The second common line is formed on a display region of the second substrate, and is connected with the first common line.

Description

Horizontal electric field-type liquid crystal display panel {LIQUID CRYSTAL DISPLAY PANEL OF HORIZONTAL ELECTRONIC FIELD APPLYING TYPE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel using a horizontal electric field, and more particularly to a horizontal field application type liquid crystal display panel capable of improving image quality.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such liquid crystal displays are roughly classified into a vertical electric field type shown in FIG. 1A and a horizontal electric field type type shown in FIG. 1B according to a direction of an electric field for driving a liquid crystal.

In the vertical field type liquid crystal display shown in FIG. 1A, the common electrode 18 formed on the upper substrate 44 and the pixel electrode 14 formed on the lower substrate 44 are disposed to face each other, and are vertically formed therebetween. The electric field drives the liquid crystal of TN (Twisted Nemastic) mode. If no electric field is applied between the pixel electrode 14 and the common electrode 18 (off). The lower liquid crystal has a horizontal arrangement in which it is twisted by 90 degrees, but when an electric field is applied (on), the liquid crystal molecules twisted by 90 degrees are rearranged in the direction of the electric field to realize an image. Such a vertical field type liquid crystal display device has a large aperture ratio, but has a narrow viewing angle of about 90 degrees.

In the horizontal electric field type axial device shown in FIG. 1B, an in-plane switch (hereinafter referred to as IPS) is formed by a horizontal electric field between the pixel electrode 41 and the common electrode 58 arranged side by side on the lower substrate 55. The liquid crystal of the mode is driven. When the electric field is not applied between the pixel electrode 14 and the common electrode 58 (off), the long axes of the liquid crystals have an arrangement state in which the long axis is twisted by 90 degrees in the horizontal electric field direction. By arranging the liquid crystals so as to be parallel to, an image is realized. The horizontal field type liquid crystal display device has an advantage that a viewing angle is about 160 degrees. Hereinafter, the horizontal field type liquid crystal display device will be described in detail.

2 is a plan view illustrating a conventional horizontal field application liquid crystal display panel.

The horizontal field type liquid crystal display panel illustrated in FIG. 2 includes a top plate and a bottom plate joined to face each other, a spacer for maintaining a constant cell gap between the two substrates, and a liquid crystal filled in a liquid crystal space provided by the spacer.

The top plate is composed of a color filter for color implementation, a black matrix for preventing light leakage, and an alignment film coated thereon for liquid crystal alignment.

The lower plate is divided into a display area 70 having a pixel matrix and a non-display area 80 except for the display area 70.

The lower display area 70 includes a gate line, a data line, a common line, a pixel electrode, and a thin film transistor for forming a horizontal electric field in pixels, and an alignment layer coated thereon for liquid crystal alignment.

The non-display area 80 of the lower panel has a pad unit for supplying a driving signal from the outside to a signal line including a gate line and a data line and a common line of the display area 70, and a common part to the second common line 16. And a first common line 26 connected to the second common line 16 to supply a common voltage to the second common line 16.

The pad part includes a gate pad (not shown) connected to the gate line, a data pad 15 connected to the data line 25, and a common pad 35 connected to the first common line 26. The gate pad (not shown) supplies a scan signal supplied from the gate driver to the gate line. The data pad 15 supplies the pixel signal from the data driver to the data line. The common pad 35 is positioned adjacent to the first data pad and the last data pad, and the common voltage generated from the common voltage generator (not shown) is transferred to the second common line 16 through the first common line 26. Supply. Here, the common voltage is a reference voltage which is a reference when driving the liquid crystal cell.

In addition, the liquid crystal display panel includes a parasitic capacitor by lines overlapping with an insulating film interposed therebetween.

In the conventional IPS mode liquid crystal display panel, as the distance from the common pad 35 increases, the line resistance of the first common line 26 and the second common line 16 overlap each other with a signal line and an insulating layer interposed therebetween. As the parasitic capacitors are formed, the common voltage decreases as shown in FIG. 3. That is, the difference d between the effective voltage A of the pixels adjacent to the common pad 35 and the effective voltage applied to the pixel far from the common pad 35 occurs.

In particular, the liquid crystal display panel of the TN mode has a larger distance between the common electrode and the pixel electrode than the liquid crystal display panel of the IPS mode. For example, the interval between the common electrode and the pixel electrode in the TN mode is about 4-5 μm, and the interval between the common electrode and the pixel electrode in the IPS mode is about 9-10 μm. As such, since the distance between the common electrode 18 and the pixel electrode 14 of the liquid crystal display panel in the IPS mode is relatively wide, a relatively large common voltage is required to form a horizontal electric field. As the common voltage is relatively large, the decrease due to the line resistance increases, resulting in a difference between the effective voltage applied to the adjacent pixel from the common pad 35 and the effective voltage applied to the pixel far from the common pad 35. The image difference for each position of the panel is generated by this effective voltage difference, resulting in problems of image irregularity including luminance unevenness and flicker.

This problem is caused by an increase in the resistance and capacitors as the panel gradually increases in size, resulting in more difference in common voltage, resulting in more uneven luminance.

Accordingly, an object of the present invention is to provide a horizontal field application type liquid crystal display panel capable of improving image quality.

1A and 1B illustrate driving principles of a conventional vertical and horizontal field application liquid crystal display panel.

2 is a plan view illustrating a conventional horizontal field application liquid crystal display panel.

3 is a waveform diagram illustrating a common voltage and a data voltage supplied to the liquid crystal panel illustrated in FIG. 2.

4A and 4B are plan views illustrating an upper plate and a lower plate of a horizontal field application type liquid crystal display panel according to an exemplary embodiment of the present invention.

FIG. 5 is a plan view illustrating a display unit of the lower plate illustrated in FIG. 4. FIG.

6 is a waveform diagram illustrating a common voltage and a data voltage supplied to the liquid crystal panel illustrated in FIG. 4.

<Description of Symbols for Main Parts of Drawings>

2: gate line 4: data line

6: thin film transistor 8: gate electrode

10 source electrode 12 drain electrode

139 contact hole 14 pixel electrode

16: second common line 18: common electrode

26: first common line 65: conductive line 150: dot

In order to achieve the above object, a horizontal electric field application type liquid crystal display panel according to an embodiment of the present invention includes a conductive line formed in a non-display area other than the display area on the first substrate; A common line formed on a second substrate facing the first substrate to supply a common voltage; And at least one dot for electrically connecting the common line and the conductive line.

The common line includes a first common line formed in the non-display area of the second substrate;

And a second common line formed in the display area of the second substrate and connected to the first common line.

The first common line and the conductive line may be formed to overlap in a parallel direction.

The first common line may be formed at left and right sides of the display area of the second substrate.

The conductive line may be formed at left and right sides of the display area of the first substrate.

The conductive line may be further formed at a lower end of the display area of the first substrate.

The dot is characterized in that it contains silver (Ag).

A data line parallel to the common supply line in the display area of the second substrate; A gate line intersecting and insulated from the data line; A common line connected to the common supply line and parallel to the gate line; A common electrode connected to the common line and parallel to the data line; A thin film transistor array substrate formed at an intersection of the gate line and the data line; And a pixel electrode which forms a horizontal electric field with the common electrode and is connected to the thin film transistor array substrate.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 6.

4A and 4B are plan views briefly illustrating structures of an upper plate and a lower plate of a horizontal field type liquid crystal display panel according to an exemplary embodiment of the present invention.

The horizontal field type liquid crystal display panel illustrated in FIGS. 4A and 4B includes a lower plate 300 and an upper plate 200 which are bonded to face each other, a spacer for maintaining a constant cell gap between the two substrates, and a liquid crystal space provided by the spacers. Liquid crystal filled in.

As illustrated in FIG. 4A, the upper plate 200 is divided into an upper display area 170a in which a color filter array is formed and an upper non-display area 170b positioned outside the upper display area 170a. In the upper display area 170a, a color filter, a black matrix for preventing light leakage, and an alignment layer coated for liquid crystal alignment are formed thereon. The upper non-display area 170b includes conductive lines 65 on left and right sides of the upper display area 170a. In addition, an auxiliary conductive line 66 may be formed at a lower end of the upper display area 170a in order to increase conductivity in the non-display area 170b of the upper plate 200. The conductive line 65 is connected to the dot 150 of the lower plate 300 to be in contact with the first common line 126 formed in the non-display area 170b of the lower plate 300 in parallel. The conductive lines 65 and the auxiliary conductive line 66 may be formed of a conductive metal, indium tin oxide (ITO), tin oxide (TO), or indium zinc oxide (Indium Zinc Oxide). : IZO) or Indium Tin Zinc Oxide (ITZO).

The lower plate 300 includes a lower display area 180a in which a thin film transistor array is formed, and a lower non-display area 180b positioned outside the lower display area 180a as illustrated in FIG. 4B. The lower display area 180a is formed to overlap the upper display area 170a, and the lower non-display area 180b is formed to overlap the upper non-display area 170b.

In the display area 180a of the lower panel 300, as shown in FIG. 5, the gate line 2 and the data line 125 formed to intersect with each other, the thin film transistor 6 formed at each intersection thereof, and the cross structure thereof. The pixel electrode 14 and the common electrode 118 formed to form a horizontal electric field in the provided pixel region are provided, and the second common line 116 connected to the common electrode 118 is provided.

The gate line 2 supplies a gate signal to the gate electrode 8 of the thin film transistor 6. The data line 125 supplies the pixel signal to the pixel electrode 14 through the drain electrode 12 of the thin film transistor 6. The gate line 2 and the data line 125 are formed in an intersecting structure to define the pixel region 5.

The second common line 116 is formed in parallel with the gate line 2 with the pixel region 5 therebetween, and supplies a reference voltage for driving the liquid crystal to the common electrode 118.

The thin film transistor 6 keeps the pixel signal of the data line 125 charged and held in the pixel electrode 14 in response to the gate signal of the gate line 2. To this end, the thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 125, and a drain electrode connected to the pixel electrode 14. 12).

The pixel electrode 14 is connected to the drain electrode 12 of the thin film transistor 6 through a contact hole 13 penetrating a protective film (not shown) and is formed in the pixel region 5. In particular, the pixel electrode 14 is connected to the drain electrode 12 and is formed parallel to the adjacent gate line 2, and is connected to the horizontal part 14A and is formed to be parallel to the common electrode 118. 14 C of finger parts are provided.

The common electrode 118 is connected to the second common line 116 and is formed in the pixel region 5. In particular, the common electrode 118 is formed parallel to the finger portion 14C of the pixel electrode 14 in the pixel region 5.

Accordingly, a horizontal electric field is formed between the pixel electrode 14 supplied with the pixel signal through the thin film transistor 6 and the common electrode 118 supplied with the reference voltage through the second common line 116. In particular, a horizontal electric field is formed between the finger portion 14C of the pixel electrode 14 and the common electrode 118. The horizontal electric field causes liquid crystal molecules arranged in the horizontal direction between the lower and upper plates to rotate by dielectric anisotropy. According to the degree of rotation of the liquid crystal molecules, the light transmittance passing through the pixel region 5 is changed, thereby realizing an image.

In the lower non-display area 180b of the lower panel 300, a driving signal is supplied to a signal line including a gate line 2, a data line 125, and a second common line 116 of the lower display area 180a. The first common line 126, the first common line 126, and the conductive line 65, which are commonly connected to the pad unit and the second common line 116, to supply a common voltage to the second common line 116. ) Is further provided with a plurality of dots 150 for contacting.

The pad part includes a gate pad (not shown) connected to the gate line 2, a data pad 115 connected to the data line 125, and a common pad 135 connected to the first common line 126. do. The gate pad (not shown) supplies the scan signal supplied from the gate driver to the gate line 2. The data pad 115 supplies the pixel signal from the data driver to the data line 125. The common pad 135 is positioned adjacent to the first data pad and the last data pad, and the common voltage generated from the common voltage generator (not shown) is transferred to the second common line 116 through the first common line 126. Supply.

The dot 150 is formed of a highly conductive metal, for example, silver (Ag) to connect the first common line 126 and the conductive line 65 in parallel. The resistance of the first common line 126 is reduced by connecting the first common line 126 and the conductive line 65 in parallel by the dots 150. As the resistance of the first common line 126 decreases as described above, the common voltage C supplied to the liquid crystal cell connected to the first first common line 116 and the last first common line 116 as shown in FIG. 8. Differences with the common voltage D supplied to the liquid crystal cell connected to do not occur.

As described above, in the horizontal field application type display panel according to the present invention, the resistance of the common supply line 126 is reduced to supply a constant common voltage to all parts of the panel.

As described above, the horizontal field application type liquid crystal display panel according to the present invention forms a conductive metal line in a non-display area on the upper plate and connects it with a common line formed on the lower plate to reduce the line resistance of the common line. Ensure that a constant common voltage is supplied to As a result, the image is uniformly implemented in the panel, thereby improving image quality.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (8)

Conductive lines formed in the non-display area except for the display area on the first substrate; A common line formed on a second substrate facing the first substrate to supply a common voltage; And at least one dot electrically connecting the common line and the conductive line to each other. The method of claim 1, The common line A first common line formed in the non-display area of the second substrate; And a second common line formed in the display area of the second substrate and connected to the first common line. The method of claim 2, And wherein the first common line and the conductive line overlap each other in a parallel direction. The method of claim 2, And the first common line is formed at left and right sides of the display area of the second substrate. The method of claim 1, And the conductive lines are formed on the left and right sides of the display area of the first substrate. The method of claim 5, wherein And the conductive line is further formed at a lower end of the display area of the first substrate. The method of claim 1, And wherein the dot includes silver (Ag). The method of claim 1, In the display area of the second substrate A data line parallel to the common supply line; A gate line intersecting and insulated from the data line; A common line connected to the common supply line and parallel to the gate line; A common electrode connected to the common line and parallel to the data line; A thin film transistor array substrate formed at an intersection of the gate line and the data line; And a pixel electrode which forms a horizontal electric field with the common electrode and is connected to the thin film transistor array substrate.