KR20070092896A - Liquid crystal display device - Google Patents

Abstract

An LCD(Liquid Crystal Display) device is provided to reduce an area by forming an aperture in a plate type common electrode, thereby preventing storage capacitance from being formed more than needed. An LCD(Liquid Crystal Display) device comprises the followings: a gate line and a data line which are vertically crossed on a substrate and define a pixel; a TFT(Thin Film Transistor)(111) which is arranged at an intersection of the gate line and the data line; a common line in parallel to the gate line; a pixel electrode(117) which is connected to the TFT, and insulated from the common line and has plural slits(160); and a plate type common electrode(124) which is contacted with the common line, and insulated from the pixel electrode and has an aperture(161) in an area between the slits.

Description

Liquid Crystal Display Device

1 is a plan view of a liquid crystal display device according to the prior art.

FIG. 2 is a cross-sectional view taken along line II ′ of FIG. 1. FIG.

3 is a plan view of a liquid crystal display device according to the present invention;

4 is a cross-sectional view taken along line II-II ′ of FIG. 3.

FIG. 5 is a cross-sectional view taken along line III-III ′ of FIG. 3.

* Explanation of symbols on the main parts of the drawings

111: TFT array substrate 112: gate wiring

113: gate insulating film 115: data wiring

116: protective film 117: pixel electrode

124: common electrode 125: common wiring

160: slit 161: opening

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device (LCD), and more particularly to a liquid crystal display device for forming a TFT size to an appropriate size by reducing a storage capacitance that is larger than necessary.

In recent years, active matrix liquid crystal display devices have been widely used in flat panel TVs, portable computers, monitors, and the like, as their performance is rapidly developed.

Among the active matrix liquid crystal display devices, twisted nematic (TN) type liquid crystal display devices are mainly used. In the twisted nematic method, electrodes are installed on two substrates and the liquid crystal directors are arranged to be twisted by 90 °. It is a technique of driving a liquid crystal director by applying a voltage to an electrode.

Twisted nematic liquid crystal display devices are spotlighted for providing excellent contrast and color reproducibility, but suffer from the chronic problem of narrow viewing angles.

In order to solve the TN-type viewing angle problem, an IPS mode (In-Plane Switching Mode) in which two electrodes are formed on one substrate and the liquid crystal is twisted in a parallel plane of the alignment layer, and the common electrode and the pixel electrode are transparent. The FFS mode (Fringe Field Switching), in which a liquid crystal molecule is operated by a fringe field formed between the common electrode and the pixel electrode while forming a conductor and forming a narrow gap between the common electrode and the pixel electrode, has been introduced.

In recent years, the two modes have been further developed so that the structure of the electrode is gradually changed. However, the principle of driving the liquid crystal by the electric field formed between the two electrodes and the pixel electrode and the common electrode on the same substrate is the same.

The liquid crystal display device will be described in detail as follows.

1 is a plan view of a liquid crystal display device according to the prior art, and FIG. 2 is a cutaway view taken along the line II ′ of FIG. 1.

In the TFT array substrate 11 of the conventional liquid crystal display device, as shown in FIGS. 1 and 2, a gate wiring 12 and a data wiring 15 formed of an opaque metal and vertically intersecting with each other to define a subpixel. And a common wiring 25 arranged in parallel with the gate wiring 12, a thin film transistor for switching voltage on / off at the intersection of the two wirings, a transparent metal and a gate insulating film 13 and The common electrode 24 and the pixel electrode 17 which are insulated by the laminated film of the protective film 16 and overlap each other in the pixel area are formed. At this time, the common electrode 24 and the common wiring 25 are in contact with each other.

The TFT array substrate as described above is opposed to each other by an opposing substrate provided with a color filter layer, and a liquid crystal layer is provided therebetween.

In detail, the common electrode 24 is formed in a plate shape in the pixel area, and the pixel electrode 17 is divided into a plurality of pixel electrodes in the data line direction, and a slit 60 exists between the pixel electrodes branched from each other. It is formed in a structure. At this time, the Vcom signal is transmitted to the common electrode 24, and the pixel signal passing through the thin film transistor is transmitted to the pixel electrode 17, so that an electric field is generated between the common electrode 24 and the pixel electrode 17.

The width of the slit 60 has a value between approximately 2 μm and 6 μm, and the liquid crystal is driven by an electric field formed between the pixel electrode 17 and the common electrode 24. That is, the liquid crystals that were initially oriented by rubbing when no voltage is applied are rotated by an electric field to transmit light.

In this case, storage capacitance is required to maintain the voltage charged in the liquid crystal capacitor in the turn-off period of the corresponding thin film transistor in order to prevent deterioration of image quality due to parasitic capacitance, and the storage capacitance is overlapped with each other. And between the pixel electrodes. That is, as shown in FIG. 2, the common wiring 25 and the pixel electrode 17 overlap each other at the edge of the pixel region to form a storage capacitance Cst1, and the common electrode 24 and the pixel electrode ( 17) overlaps to form the storage capacitance Cst2.

However, the conventional liquid crystal display device as described above has the following problems.

That is, in the pixel area, the plate-shaped common electrode and the pixel electrode having the slit overlap each other, and the storage capacitance Cst2 is formed at the overlapped portion, and the overlapping area is large, thereby increasing the storage capacitance.

Specifically, in the general IPS mode liquid crystal display device, only storage capacitance is formed by overlapping the common wiring and the pixel electrode at the edge of the pixel region. However, in the case of a liquid crystal display device having a plate-type common electrode under the pixel electrode, storage capacitance is increased due to the overlap of the common electrode and the pixel electrode inside the pixel region in addition to the edge of the pixel region, thereby increasing the storage capacitance beyond the required amount. It becomes bigger.

As such, when the storage capacitance is increased, it serves as an advantage in improving characteristics such as flicker due to ΔVp, but there is a problem in that the size of the TFT must be increased to charge the storage capacitor. That is, when the size of the storage capacitor increases, the TFT must be driven for a sufficient time to charge the storage capacitor. However, since the time is limited, the size of the TFT needs to be large.

However, since the TFT is a portion through which light cannot be transmitted, the larger the size of the TFT, the lower the aperture ratio of the device.

The present invention has been made to solve the above problems, and in the liquid crystal display device having a plate-type common electrode under the pixel electrode, the TFT size is appropriately reduced by reducing the storage capacitance in the pixel area that is larger than necessary. It is an object of the present invention to provide a liquid crystal display device which is formed to improve the charging characteristics.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a gate wiring and a data wiring defining a pixel region by vertically crossing a substrate, a thin film transistor disposed at an intersection point of the gate wiring and the data wiring, and A common wiring parallel to a gate wiring, a pixel electrode connected to the thin film transistor and insulated from the common wiring, and having a plurality of slits; a pixel electrode contacting the common wiring and insulated from the pixel electrode; It characterized in that it comprises a plate-shaped common electrode having an opening.

In this case, a storage capacitance is formed between the pixel electrode and the plate-type common electrode. Since an opening is formed in the plate-type common electrode, the area of the plate-type common electrode is reduced, thereby lowering the storage capacitance.

Therefore, unlike the conventional case in which the storage capacitance is formed more than the required amount to form a large channel of the TFT, an appropriate amount of storage capacitance is formed to form the size of the TFT smaller than before. As a result, the size of the TFT is reduced and the light shielding area in the pixel area is reduced, thereby improving the aperture ratio of the device.

Hereinafter, a liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view of a liquid crystal display device according to the present invention, FIG. 4 is a cutaway view taken along line II-II 'of FIG. 3, and FIG. 5 is a cutaway view taken along line III-III' of FIG.

First, as illustrated in FIGS. 3 and 4, the TFT array substrate 111 of the liquid crystal display device according to the present invention is insulated from each other by the gate insulating film 113 and vertically intersects with each other. A pixel region is defined by the wiring 115, and a thin film transistor TFT is formed at an intersection point of the gate wiring and the data wiring, and a plate shape is formed in a channel inside the pixel region and partially has an opening 161. The pixel electrode is applied to the common electrode 124 and the drain electrode 115b of the thin film transistor, and is insulated from the common electrode 124 to form a pixel electrode 117 having a plurality of slits 160.

The common electrode 124 contacts the common wiring 125 to receive a Vcom signal, and the common wiring 125 is parallel to the gate wiring and parallel to the gate wiring formed on the same layer as the gate wiring. It is formed to receive the Vcom signal from the outside of the active area.

The pixel electrode 117 passes through the passivation layer 116 and contacts the drain electrode 115b of the thin film transistor to receive the pixel signal.

In this case, an electric field is formed between the common electrode to which the Vcom signal is applied and the pixel electrode to which the pixel voltage is applied through the slit 160 to drive the liquid crystal layer.

At the same time, storage capacitances Cst1 and Cst2 are also formed between the common electrode and the pixel electrode, and the area of the common electrode is reduced by the opening 161, which reduces the storage capacitance.

That is, the common wiring 125 and the pixel electrode 117 overlap at the edge of the pixel region to form a storage capacitance Cst1, and the common electrode 124 and the pixel electrode 117 overlap within the pixel region to form a storage capacitance ( As a result of forming Cst2), the area of the common electrode in the pixel region is reduced, and the storage capacitance Cst2 is reduced.

In general, the storage capacitance is composed of an insulating film provided between a conductive capacitor upper and lower electrodes and the two electrodes, the smaller the area of the capacitor upper and lower electrodes, the smaller the thickness of the insulating film, the smaller the storage capacitance. Lose.

Therefore, unnecessary excess storage of the entire storage capacitances Cst1 and Cst2 can be prevented, and only an appropriate amount of storage capacitance can be supplied. Increasing the storage capacitance prevents flicker, image sticking, and unevenness of the screen brightness caused by △ Vp, which greatly improves image quality, but it is necessary to charge the storage capacitance There is a disadvantage that the charging time or the size of the TFT channel region must be increased. As a result, an appropriate amount of storage capacitance is required to reflect the above factors, and a large storage capacitance is not necessarily good. Proper amount of storage capacitance prevents flicker, image sticking, and unevenness of screen brightness caused by ΔVp, while increasing aperture ratio, brightness, contrast ratio, and driving voltage. The effect can be obtained.

In detail, the pixel electrode 117 overlaps the common electrode 124, and the opening 161 of the common electrode is formed to overlap the pixel electrode between the slit and the slit of the pixel electrode. That is, the opening is formed by removing the common electrode overlapping the pixel electrode.

5, the width of the opening of the common electrode is 2 μm or more, and the distance β between the opening 161 of the common electrode and the slit 160 of the pixel electrode is 1.5 μm. It forms so that it may become abnormal. Therefore, the width of the pixel electrode 117 overlapping the upper part of the opening of the common electrode should be (α + 2β), and since α ≧ 2 μm and β≥1.5 μm, a relation of (α + 2β) ≥5 μm must be satisfied. do.

However, the above relation is the pixel electrode width design value when the etch bias of the pixel electrode is not taken into consideration, and the width of the pixel electrode is designed to be (α + 2β + γ) when the etch bias width γ of the pixel electrode is taken into account. do. That is, since the width of the pixel electrode will be reduced by γ during the etching of the pixel electrode, the etching bias should be considered in the design value.

The common electrode 124 and the pixel electrode 117 are formed by depositing and patterning a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In this case, the common electrode may be provided below the gate wiring layer or above the data wiring layer. When the common electrode is provided above the data wiring layer, the common electrode may be insulated from the pixel electrode through an insulating film. When the common electrode is formed under the gate wiring layer, the common electrode overlaps the pixel electrode with the stacked layers of the gate insulating layer 113 and the passivation layer 116 interposed therebetween.

The slit 160 of the pixel electrode may be formed such that its major axis is disposed in the gate wiring or data wiring direction, and may be formed in the data wiring direction to narrow the left and right viewing angles. The slits of the pixel electrodes can be arranged in the same direction with respect to all the pixel areas.

The thin film transistor serves to control on / off of the voltage. The thin film transistor includes a gate electrode branched from the gate line 112 and a gate insulating layer 113 formed on the entire surface including the gate line 112. ), A semiconductor layer formed by depositing amorphous silicon (a-Si) on the gate insulating layer on the gate electrode, and a source / drain electrode branched from the data line 115 to be formed on the semiconductor layer. It serves as a switching control to turn on / off the voltage. A protective film is provided on the front surface including the thin film transistor.

In this case, the gate wiring 112, the gate electrode, the data wiring 115, and the source / drain electrodes may include aluminum (Al), copper (Cu), tungsten (W), molybdenum (Mo), titanium (Ti), and tantalum ( Low-resistance metals such as Ta) and Al alloys are deposited by sputtering and patterned by photolithography.

The gate insulating layer 113 is formed by depositing an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx), and the protective layer 116 is formed of an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx). It is formed by depositing or by coating an organic insulating film such as BCB, acrylic resin, and the like, the semiconductor layer is formed by depositing amorphous silicon.

As described above, when the size of the storage capacitor increases, a thin film transistor including the semiconductor layer must be formed to fill the storage capacitance accordingly, and the gate electrode, the source / drain electrode, and the like, which are components of the thin film transistor, are used as light blocking materials. Because the formed light does not transmit light, the size of the thin film transistor can be reduced by reducing the storage capacitance, thereby improving the aperture ratio, luminance, contrast ratio of the device and lowering the driving voltage.

Although not shown, the thin film transistor array substrate is oppositely bonded to the color filter layer array substrate with the liquid crystal layer interposed therebetween. The color filter layer array substrate may include a black matrix which serves to distinguish between R, G, and B cells and to block light. Red color, green color, and blue color filter layers arranged in a predetermined order to implement colors are provided.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

The liquid crystal display device according to the present invention as described above has the following effects.

First, a storage capacitance is formed between the plate-shaped common electrode and the pixel electrode overlapping in the pixel area. An opening is formed in the plate-shaped common electrode to reduce the area so that the storage capacitance more than the required amount can be prevented.

Second, since an appropriate amount of storage capacitance can be formed, it is possible to reduce the size of the TFT that was unnecessarily large in order to charge more storage capacitance than necessary.

Therefore, the size of the TFT is reduced and the light shielding area in the pixel area is reduced, thereby improving the aperture ratio, brightness, and contrast ratio of the device.

Claims (11)

Gate wirings and data wirings defining vertically crossing pixel regions on a substrate; A thin film transistor disposed at an intersection point of the gate line and the data line; A common wiring parallel to the gate wiring; A pixel electrode connected to the thin film transistor and insulated from the common wiring and having a plurality of slits; And a plate type common electrode contacting the common wiring, insulated from the pixel electrode, and having an opening in a region between the slit and the slit. The method of claim 1, The opening of the common electrode is formed to overlap the pixel electrode. The method of claim 1, The opening of the common electrode has a width of 2㎛ or more. The method of claim 1, And a distance between the opening of the common electrode and the slit of the pixel electrode is 1.5 μm or more. The method of claim 1, And a width of the pixel electrode overlapping the upper portion of the opening of the common electrode is 5 μm or more. The method of claim 5, The width of the pixel electrode does not take into account the etching bias. The method of claim 1, The pixel electrode is formed on a gate insulating film and a protective film provided on the common electrode and the common wiring. The method of claim 1, The common electrode and the pixel electrode are formed of a transparent conductive material. The method of claim 1, And the common wiring is formed on the same layer as the gate wiring. The method of claim 1, And the slits of the pixel electrode are arranged in the gate wiring or data wiring direction. The method of claim 1, And a storage capacitance formed between the plate-shaped common electrode and the pixel electrode in the pixel region.

Images